[Committed] RISC-V: Tweak generic vector COST model

Notice current generic vector cost model make PR112387 failed to vectorize. Adapt it same as ARM SVE generic vector cost model which can fix it. Committed as it is obvious fix. PR target/112387 gcc/ChangeLog: * config/riscv/riscv.cc: Adapt generic cost model same ARM SVE. gcc/

[PATCH] match.pd: Optimize sign-extension followed by truncation [PR113024]

Hi! While looking at a bitint ICE, I've noticed we don't optimize in f1 and f5 functions below the 2 casts into just one at GIMPLE, even when optimize it in convert_to_integer if it appears in the same stmt. The large match.pd simplification of two conversions in a row has many complex rules and

Re: [PATCH 1/2] libstdc++: Atomic wait/notify ABI stabilization

On Thu, 14 Dec 2023, Thomas Rodgers wrote: I need to look at this a bit more (and not on my phone, at lunch). Ultimately, C++26 expects to add predicate waits and returning a ‘tri-state’ result isn’t something that’s been considered or likely to be approved. Ok, then that seems to fit best wit

Re: [PR target/110201] Fix operand types for various scalar crypto insns

On 12/14/23 02:46, Christoph Müllner wrote: On Tue, Jun 20, 2023 at 12:34 AM Jeff Law via Gcc-patches wrote: A handful of the scalar crypto instructions are supposed to take a constant integer argument 0..3 inclusive. A suitable constraint was created and used for this purpose (D03), but t

[committed] libstdc++: Add dg-output to two tests

Tested x86_64-linux. Pushed to trunk. -- >8 -- These tests are expected to run interactively, with the output checked by eye. Nobody ever does that, but we can at least use dg-output to check that the output is as expected. libstdc++-v3/ChangeLog: * testsuite/27_io/objects/char/2.cc: Us

[committed] libstdc++: Fix %S format of duration with floating-point rep

Tested x86_64-linux. Pushed to trunk. Backport needed too. -- >8 -- I got the order of arguments to std::format_to wrong. It was in a discarded statement, for a case which wasn't being tested. libstdc++-v3/ChangeLog: * include/bits/chrono_io.h (__formatter_chrono::_M_S): Fix order

[committed] libstdc++: Tweaks for std::format fast path

Tested x86_64-linux. Pushed to trunk. -- >8 -- Fix an incorrect call to _Sink::_M_reserve() which should have passed the __n parameter. This was not actually a problem because it was in an discarded statement, because only the _Seq_sink> specialization was used. Also add some branch prediction h

[committed] libstdc++: Fix filebuf::native_handle() for Windows

Tested x86_64-linux. Pushed to trunk. -- >8 -- libstdc++-v3/ChangeLog: * acinclude.m4 (GLIBCXX_CHECK_FILEBUF_NATIVE_HANDLES): Add missing header to configure test. Check correct variable. * config/io/basic_file_stdio.cc (__basic_file::native_handle): Fix typo.

[committed] libstdc++: Implement C++23 header [PR107760]

Tested x86_64-linux. Pushed to trunk. -- >8 -- This adds the C++23 std::print functions, which use std::format to write to a FILE stream or std::ostream (defaulting to stdout). The new extern symbols are in the libstdc++exp.a archive, so we aren't committing to stable symbols in the DSO yet. The

Re: [PR target/110201] Fix operand types for various scalar crypto insns

On Fri, Dec 15, 2023 at 12:36 AM Jeff Law wrote: > > > > On 12/14/23 02:46, Christoph Müllner wrote: > > On Tue, Jun 20, 2023 at 12:34 AM Jeff Law via Gcc-patches > > wrote: > >> > >> > >> A handful of the scalar crypto instructions are supposed to take a > >> constant integer argument 0..3 inclu

Re: Re: [PATCH] Middle-end: Do not model address cost for SELECT_VL style vectorization

Thanks Richard. Committed. juzhe.zh...@rivai.ai From: Richard Biener Date: 2023-12-14 23:10 To: Juzhe-Zhong CC: gcc-patches; richard.sandiford Subject: Re: [PATCH] Middle-end: Do not model address cost for SELECT_VL style vectorization On Thu, 14 Dec 2023, Juzhe-Zhong wrote: > Follow Richar

Re: [PATCH 0/4] v3 of: Option handling: add documentation URLs

Hi David, On Thu, Dec 14, 2023 at 10:01:39AM -0500, David Malcolm wrote: > > Once your patch is in please feel free to sent an email to > > build...@sourceware.org > > https://sourceware.org/mailman/listinfo/buildbot > > And we'll add the above build steps and update the autotools > > Containerfil

Re: [PATCH] c++: abi_tag attribute on templates [PR109715]

On Thu, 14 Dec 2023, Jason Merrill wrote: > On 12/14/23 16:08, Patrick Palka wrote: > > On Thu, 14 Dec 2023, Jason Merrill wrote: > > > > > On 12/14/23 14:17, Patrick Palka wrote: > > > > Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for > > > > trunk? Do we want to condit

Re: [committed] libstdc++: Implement C++23 header [PR107760]

On Thu, Dec 14, 2023 at 6:05 PM Jonathan Wakely wrote: > Tested x86_64-linux. Pushed to trunk. > > -- >8 -- > > This adds the C++23 std::print functions, which use std::format to write > to a FILE stream or std::ostream (defaulting to stdout). > > The new extern symbols are in the libstdc++exp.a

[PING^1][PATCH] RISC-V: Add Zvfbfmin extension to the -march= option

This patch would like to add new sub extension (aka Zvfbfmin) to the -march= option. It introduces a new data type BF16. Depending on different usage scenarios, the Zvfbfmin extension may depend on 'V' or 'Zve32f'. This patch only implements dependencies in scenario of Embedded Processor. In scena

[r14-6559 Regression] FAIL: gcc.dg/guality/pr58791-4.c -Os -DPREVENT_OPTIMIZATION line pr58791-4.c:32 i == 486 on Linux/x86_64

On Linux/x86_64, 8afdbcdd7abe1e3c7a81e07f34c256e7f2dbc652 is the first bad commit commit 8afdbcdd7abe1e3c7a81e07f34c256e7f2dbc652 Author: Di Zhao Date: Fri Dec 15 03:22:32 2023 +0800 Consider fully pipelined FMA in get_reassociation_width caused FAIL: gcc.dg/guality/pr58791-4.c -O2 -D

Re: [PATCH] c++: abi_tag attribute on templates [PR109715]

On 12/14/23 19:59, Patrick Palka wrote: On Thu, 14 Dec 2023, Jason Merrill wrote: On 12/14/23 16:08, Patrick Palka wrote: On Thu, 14 Dec 2023, Jason Merrill wrote: On 12/14/23 14:17, Patrick Palka wrote: Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk? Do we

Re: [PING^1][PATCH] RISC-V: Add Zvfbfmin extension to the -march= option

CCing Kito. I am sorry I can't review ABI even though it is vector related, this patch needs kito's review. But I will be available on reviewing the following real vector BF16 intrinsic and auto-vectorization support. Thanks. juzhe.zh...@rivai.ai From: Xiao Zeng Date: 2023-12-15 09:22 To:

Re: Re: [PING^1][PATCH] RISC-V: Add Zvfbfmin extension to the -march= option

2023-12-15 09:27  juzhe.zhong wrote: >   >CCing Kito. > >I am sorry I can't review ABI even though it is vector related, this patch >needs kito's review. Thank you for a reminder In fact, in , Palmer Dabbelt has already comple

Re: Re: [PATCH] RISC-V: Add Zvfbfmin extension to the -march= option

2023-12-13 11:55  Palmer Dabbelt wrote: >   >On Tue, 12 Dec 2023 19:24:51 PST (-0800), zengx...@eswincomputing.com wrote: >> This patch would like to add new sub extension (aka Zvfbfmin) to the >> -march= option. It introduces a new data type BF16. >> >> Depending on different usage scenarios, the

Re: Fwd: [PATCH v2] extend.texi: Fix typos in LSX intrinsics

在 2023-12-14四的 20:27 +0800，chenglulu写道： > > > > > > > > 转发的消息 > > > > 主题: > [PATCH v2] extend.texi: Fix typos in LSX intrinsics > > > 日期: > Wed, 13 Dec

Re: [PATCH] i386: Sync move_max/store_max with prefer-vector-width [PR112824]

On Thu, Dec 14, 2023 at 3:54 PM Hongyu Wang wrote: > > Hi, > > Currently move_max follows the tuning feature first, but ideally it > should sync with prefer-vector-width when it is explicitly set to keep > vector move and operation with same vector size. > > Bootstrapped/regtested on x86-64-pc-lin

[PATCH] i386: Allow 64 bit mask register for -mno-evex512

Hi all, There is a recent change in AVX10 documentation which allows 64 bit mask register instructions in AVX10-256, the documentation comes following: Intel Advanced Vector Extensions 10 (Intel AVX10) Architecture Specification https://cdrdv2.intel.com/v1/dl/getContent/784267 The Converged Vecto

[PATCH] RISC-V: Fix vmerge optimization bug in vec_perm vectorization

This patch fixes the following FAILs in "full coverage" testing: Running target riscv-sim/-march=rv64gcv_zvl256b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m8/--param=riscv-autovec-preference=fixed-vlmax FAIL: gcc.dg/vect/vect-strided-mult-char-ls.c -flto -ffat-lto-objects execution

[PATCH] testsuite: Require dfp for pr112943.c

Hi, As Coudert points out, this test fails on darwin as it does not support _Decimal64, so require dfp for it. Pushed as obvious fix. gcc/testsuite/ChangeLog: * gcc.target/i386/pr112943.c: Require dfp. --- gcc/testsuite/gcc.target/i386/pr112943.c | 2 +- 1 file changed, 1 insertion(+)

Re: [PATCH V2] rs6000: Change GPR2 to volatile & non-fixed register for function that does not use TOC [PR110320]

On 7/16/23 10:40 PM, P Jeevitha via Gcc-patches wrote: > Normally, GPR2 is the TOC pointer and is defined as a fixed and non-volatile > register. However, it can be used as volatile for PCREL addressing. Therefore, > modified r2 to be non-fixed in FIXED_REGISTERS and set it to fixed if it is > not

Re: [PATCH V2] rs6000: Change GPR2 to volatile & non-fixed register for function that does not use TOC [PR110320]

On 12/14/23 9:57 PM, Peter Bergner wrote: > On 7/16/23 10:40 PM, P Jeevitha via Gcc-patches wrote: >> + /* For non PC-relative code, GPR2 is unavailable for register allocation. >> */ >> + if (FIXED_R2 && !rs6000_pcrel_p ()) >> +fixed_regs[2] = 1; [snip] > On a related note, Jeevitha's patc

RE: [PATCH v7] libgfortran: Replace mutex with rwlock

On 2023/12/14 20:39, Jakub Jelinek wrote: > On Thu, Dec 14, 2023 at 01:29:01PM +0100, Thomas Schwinge wrote: >>> Sure, I will look into that. >>> >>> BTW, I didn’t have the PowerPC in hands, do you mind granting the access of >>> your >>> test environment to me to help reproduce the issue? >> >>

Re: [PATCH] strub: avoid lto inlining

On Thu, Dec 14, 2023 at 8:53 PM Alexandre Oliva wrote: > > > The strub builtins are not suited for cross-unit inlining, they should > only be inlined by the builtin expanders, if at all. While testing on > sparc64, it occurred to me that, if libgcc was built with LTO enabled, > lto1 might inline

Re: [PATCH] strub: use opt_for_fn during ipa

On Thu, 14 Dec 2023, Alexandre Oliva wrote: > > Instead of global optimization levels and flags, check per-function > ones. > > Regstrapped on x86_64-linux-gnu, also testing on sparc-solaris2.11.3. > Ok to install? You have to be generally careful when working within IPA with function bodies wi

Re: [PATCH v4] [tree-optimization/110279] Consider FMA in get_reassociation_width

On Thu, Dec 14, 2023 at 9:55 PM Di Zhao OS wrote: > > > > -Original Message- > > From: Richard Biener > > Sent: Wednesday, December 13, 2023 5:01 PM > > To: Di Zhao OS > > Cc: gcc-patches@gcc.gnu.org > > Subject: Re: [PATCH v4] [tree-optimization/110279] Consider FMA in > > get_reassocia

Re: [PATCH #2/2] strub: sparc64: unbias the stack address [PR112917]

On Thu, Dec 14, 2023 at 10:29 PM Alexandre Oliva wrote: > > > The stack pointer is biased by 2047 bytes on sparc64, so the range it > delimits is way off. Unbias the addresses returned by > __builtin_stack_address (), so that the strub builtins, inlined or > not, can function correctly. I've con

Re: [PATCH] middle-end: Fix up constant handling in emit_conditional_move [PR111260]

On Thu, Dec 14, 2023 at 6:42 PM Andrew Pinski (QUIC) wrote: > > > > -Original Message- > > From: Richard Biener > > Sent: Thursday, December 14, 2023 5:23 AM > > To: Andrew Pinski (QUIC) > > Cc: gcc-patches@gcc.gnu.org > > Subject: Re: [PATCH] middle-end: Fix up constant handling in > >

Re: [PATCH 5/6] Allow poly_uint64 for group_size args to vector type query routines

On Thu, 14 Dec 2023, Richard Sandiford wrote: > Richard Biener writes: > > The following changes the unsigned group_size argument to a poly_uint64 > > one to avoid too much special-casing in callers for VLA vectors when > > passing down the effective maximum desirable vector size to vector > > ty

Re: [PATCH] lower-bitint: Fix .{ADD,SUB,MUL}_OVERFLOW with _BitInt large/huge INTEGER_CST arguments [PR113003]

On Thu, 14 Dec 2023, Jakub Jelinek wrote: > Hi! > > As shown in the testcase, .{ADD,SUB,MUL}_OVERFLOW calls are another > exception to the middle/large/huge _BitInt discovery through SSA_NAMEs > next to stores of INTEGER_CSTs to memory and their conversions to > floating point. > The calls can ha

Re: [PATCH] match.pd: Optimize sign-extension followed by truncation [PR113024]

On Thu, 14 Dec 2023, Jakub Jelinek wrote: > Hi! > > While looking at a bitint ICE, I've noticed we don't optimize > in f1 and f5 functions below the 2 casts into just one at GIMPLE, > even when optimize it in convert_to_integer if it appears in the same > stmt. The large match.pd simplification

Re: [PATCH 2/3] LoongArch: Fix instruction costs [PR112936]

在 2023/12/14 上午9:16, chenglulu 写道: 在 2023/12/13 下午9:20, Xi Ruoyao 写道: On Wed, 2023-12-13 at 20:22 +0800, chenglulu wrote: 在 2023/12/10 上午1:03, Xi Ruoyao 写道: Replace the instruction costs in loongarch_rtx_cost_data constructor based on micro-benchmark results on LA464 and LA664. This allows

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