[PATCH V2 0/3] RISC-V: Add an experimental vector calling convention

Hi RISC-V folks, This patch implement the proposal of RISC-V vector calling convention[1] and this feature can be enabled by `--param=riscv-vector-abi` option. Currently, all vector type arguments and return values are pass by reference. With this patch, these arguments and return values can pass

[PATCH V2 1/3] RISC-V: Part-1: Select suitable vector registers for vector type args and returns

I have posted below the vector register calling convention rules from in the proposal[1]: v0 is used to pass the first vector mask argument to a function, and to return vector mask result from a function. v8-v23 are used to pass vector data arguments, vector tuple arguments and the rest vector mas

[PATCH V2 2/3] RISC-V: Part-2: Save/Restore vector registers which need to be preversed

Because functions which follow vector calling convention variant has callee-saved vector reigsters but functions which follow standard calling convention don't have. We need to distinguish which function callee is so that we can tell GCC exactly which vector registers callee will clobber. So I enco

[PATCH V2 3/3] RISC-V: Part-3: Output .variant_cc directive for vector function

Functions which follow vector calling convention variant need be annotated by .variant_cc directive according the RISC-V Assembly Programmer's Manual and RISC-V ELF Specification[2]. [1] https://github.com/riscv-non-isa/riscv-asm-manual/blob/master/riscv-asm.md#pseudo-ops [2] https://github.com/

Re: [PATCH 1/3] RISC-V: Part-1: Select suitable vector registers for vector type args and returns

Thanks so much for Kito's online and offline comments. I have upload V2 patchs which address all comments. https://gcc.gnu.org/pipermail/gcc-patches/2023-August/626935.html Best, Lehua -- Original -- From:

Re: [PATCH 0/12] GCC _BitInt support [PR102989]

On Thu, Aug 10, 2023 at 06:55:05AM +, Richard Biener wrote: > On Wed, 9 Aug 2023, Joseph Myers wrote: > > > On Wed, 9 Aug 2023, Jakub Jelinek via Gcc-patches wrote: > > > > > - _Complex _BitInt(N) isn't supported; again mainly because none of the > > > psABIs > > > mention how those should

Re: [PATCH] VR-VALUES: Simplify comparison using range pairs

On Wed, Aug 9, 2023 at 6:16 PM Andrew Pinski via Gcc-patches wrote: > > If `A` has a range of `[0,0][100,INF]` and the comparison > of `A < 50`. This should be optimized to `A <= 0` (which then > will be optimized to just `A == 0`). > This patch implement this via a new function which sees if > th

Re: [PATCH 1/12] expr: Small optimization [PR102989]

On Wed, 9 Aug 2023, Jakub Jelinek wrote: > Hi! > > Small optimization to avoid testing modifier multiple times. OK. Richard. > 2023-08-09 Jakub Jelinek > > PR c/102989 > * expr.cc (expand_expr_real_1) : Add an early return for > EXPAND_WRITE or EXPAND_MEMORY modifiers to

Re: [PATCH 2/12] lto-streamer-in: Adjust assert [PR102989]

On Wed, 9 Aug 2023, Jakub Jelinek wrote: > Hi! > > With _BitInt(575) or any other _BitInt(513) or larger constants we can > run into this assertion. MAX_BITSIZE_MODE_ANY_INT is just a value from > which WIDE_INT_MAX_PRECISION is derived. OK. Richard. > 2023-08-09 Jakub Jelinek > > P

Re: [PATCH 0/12] GCC _BitInt support [PR102989]

On Thu, Aug 10, 2023 at 12:13 AM Jakub Jelinek via Gcc-patches wrote: > > On Thu, Aug 10, 2023 at 06:55:05AM +, Richard Biener wrote: > > On Wed, 9 Aug 2023, Joseph Myers wrote: > > > > > On Wed, 9 Aug 2023, Jakub Jelinek via Gcc-patches wrote: > > > > > > > - _Complex _BitInt(N) isn't support

Re: [PATCH] Fix PR 110954: wrong code with cmp | !cmp

On Thu, Aug 10, 2023 at 2:21 AM Andrew Pinski via Gcc-patches wrote: > > This was an oversight on my part not realizing that > comparisons in generic can have a non-boolean type. > This means if we have `(f < 0) | !(f < 0)` we would > optimize this to -1 rather than just 1. > This patch just adds

Re: [PATCH] Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter instructions.

On Thu, Aug 10, 2023 at 3:13 AM liuhongt wrote: > > Currently we have 3 different independent tunes for gather > "use_gather,use_gather_2parts,use_gather_4parts", > similar for scatter, there're > "use_scatter,use_scatter_2parts,use_scatter_4parts" > > The patch support 2 standardizing options to

Re: [PATCH] Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter instructions.

On Thu, Aug 10, 2023 at 9:40 AM Richard Biener wrote: > > On Thu, Aug 10, 2023 at 3:13 AM liuhongt wrote: > > > > Currently we have 3 different independent tunes for gather > > "use_gather,use_gather_2parts,use_gather_4parts", > > similar for scatter, there're > > "use_scatter,use_scatter_2parts,

Re: [PATCH V2 0/3] RISC-V: Add an experimental vector calling convention

On Thu, Aug 10, 2023 at 9:04 AM Lehua Ding wrote: > > Hi RISC-V folks, > > This patch implement the proposal of RISC-V vector calling convention[1] and > this feature can be enabled by `--param=riscv-vector-abi` option. Currently, > all vector type arguments and return values are pass by reference

Re: [PATCH] Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter instructions.

On Thu, Aug 10, 2023 at 9:42 AM Uros Bizjak wrote: > > On Thu, Aug 10, 2023 at 9:40 AM Richard Biener > wrote: > > > > On Thu, Aug 10, 2023 at 3:13 AM liuhongt wrote: > > > > > > Currently we have 3 different independent tunes for gather > > > "use_gather,use_gather_2parts,use_gather_4parts", >

[PATCH V2] VECT: Support loop len control on EXTRACT_LAST vectorization

From: Ju-Zhe Zhong Hi, Richard and Richi. This patch add support live vectorization by VEC_EXTRACT for LEN loop control. Consider this following case: #include #define EXTRACT_LAST(TYPE) \ TYPE __attribute__ ((noinline, noclone)) \ test_##TYPE (TYPE *x, int n, T

Re: [PATCH] Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter instructions.

On Thu, Aug 10, 2023 at 3:49 PM Richard Biener via Gcc-patches wrote: > > On Thu, Aug 10, 2023 at 9:42 AM Uros Bizjak wrote: > > > > On Thu, Aug 10, 2023 at 9:40 AM Richard Biener > > wrote: > > > > > > On Thu, Aug 10, 2023 at 3:13 AM liuhongt wrote: > > > > > > > > Currently we have 3 differen

Re: [PATCH V2] VECT: Support loop len control on EXTRACT_LAST vectorization

On Thu, 10 Aug 2023, juzhe.zh...@rivai.ai wrote: > From: Ju-Zhe Zhong > > Hi, Richard and Richi. > > This patch add support live vectorization by VEC_EXTRACT for LEN loop control. > > Consider this following case: > > #include > > #define EXTRACT_LAST(TYPE)\ > TYPE __a

Re: [PATCH] Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter instructions.

On Thu, Aug 10, 2023 at 3:55 PM Hongtao Liu wrote: > > On Thu, Aug 10, 2023 at 3:49 PM Richard Biener via Gcc-patches > wrote: > > > > On Thu, Aug 10, 2023 at 9:42 AM Uros Bizjak wrote: > > > > > > On Thu, Aug 10, 2023 at 9:40 AM Richard Biener > > > wrote: > > > > > > > > On Thu, Aug 10, 2023

Re: [PATCH V2 0/3] RISC-V: Add an experimental vector calling convention

Hi Richard, Thanks review. > Just to mention at some point you want to think about the OpenMP SIMD ABI which > includes a mangling scheme but would also open up to have different > calling conventions.> So please keep that usage case in mind, possibly allowing the vector > calling convention

PCB/PCBA/wire harness factory support-OurPCB

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Re: Re: [PATCH V2] VECT: Support loop len control on EXTRACT_LAST vectorization

Hi, Richi. Thanks so much for the review. >> You should always manually update things. Did you verify the mask >>case is handled by this? When we enable LEN as loop control. The only mask case will be the condition mask case. Consider this following case: int __attribute__ ((noinline, noclon

[PATCH v1] RISC-V: Support RVV VFNMACC rounding mode intrinsic API

From: Pan Li This patch would like to support the rounding mode API for the VFNMACC for the below samples. * __riscv_vfnmacc_vv_f32m1_rm * __riscv_vfnmacc_vv_f32m1_rm_m * __riscv_vfnmacc_vf_f32m1_rm * __riscv_vfnmacc_vf_f32m1_rm_m Signed-off-by: Pan Li gcc/ChangeLog: * config/riscv/r

Re: Re: [PATCH V2] VECT: Support loop len control on EXTRACT_LAST vectorization

>> I guess as a temporary thing your approach is OK but we shouldn't >> add these as part of new code - it's supposed to handle legacy >> cases that we didn't fixup yet. Do you mean we need to fix LC SSA PHI flow so that we don't need to set vinfo->any_known_not_updated_vssa = true ? After it's

Re: [PATCH v1] RISC-V: Support RVV VFNMACC rounding mode intrinsic API

LGTM On Thu, Aug 10, 2023 at 4:20 PM Pan Li via Gcc-patches wrote: > > From: Pan Li > > This patch would like to support the rounding mode API for the > VFNMACC for the below samples. > > * __riscv_vfnmacc_vv_f32m1_rm > * __riscv_vfnmacc_vv_f32m1_rm_m > * __riscv_vfnmacc_vf_f32m1_rm > * __riscv_

[PATCH] RISC-V: Add missing modes to the iterators

gcc/ChangeLog: * config/riscv/vector-iterators.md: Add missing modes. --- gcc/config/riscv/vector-iterators.md | 3 +++ 1 file changed, 3 insertions(+) diff --git a/gcc/config/riscv/vector-iterators.md b/gcc/config/riscv/vector-iterators.md index 14829989e09..30808ceb241 100644 --- a/g

Re: [PATCH] Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter instructions.

On Thu, Aug 10, 2023 at 4:07 PM Hongtao Liu wrote: > > On Thu, Aug 10, 2023 at 3:55 PM Hongtao Liu wrote: > > > > On Thu, Aug 10, 2023 at 3:49 PM Richard Biener via Gcc-patches > > wrote: > > > > > > On Thu, Aug 10, 2023 at 9:42 AM Uros Bizjak wrote: > > > > > > > > On Thu, Aug 10, 2023 at 9:40

[PATCH] RISC-V: Support TU for integer ternary OP[PR110964]

PR target/110964 gcc/ChangeLog: * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/pr110964.c: New test. --- gcc/config/riscv/riscv-v.cc | 3 +-- .../gcc.target/riscv

Re: [PATCH v4] Implement new RTL optimizations pass: fold-mem-offsets.

Hi Jeff, Thanks a lot for providing all this information and testcase! I have been able to reproduce the issue with it. I have investigated the cause of the issue and it's not what you mention, the uses of all intermediate calculations are properly taken into account. In this case it would be fin

Re: [PATCH] libatomic: Improve ifunc selection on AArch64

Hi Richard, >> Why would HWCAP_USCAT not be set by the kernel? >> >> Failing that, I would think you would check ID_AA64MMFR2_EL1.AT. >> > Answering my own question, N1 does not officially have FEAT_LSE2. It doesn't indeed. However most cores support atomic 128-bit load/store (part of LSE2), so

[PATCH 13/12] C _BitInt incremental fixes [PR102989]

On Wed, Aug 09, 2023 at 09:17:57PM +, Joseph Myers wrote: > > - _Complex _BitInt(N) isn't supported; again mainly because none of the > > psABIs > > mention how those should be passed/returned; in a limited way they are > > supported internally because the internal functions into which > >

Re: [PATCH] match.pd: Implement missed optimization ((x ^ y) & z) | x -> (z & y) | x [PR109938]

On Tue, Aug 08, 2023 at 03:18:51PM +0200, Richard Biener via Gcc-patches wrote: > On Fri, Aug 4, 2023 at 11:49 PM Drew Ross via Gcc-patches > wrote: > > > > Adds a simplification for ((x ^ y) & z) | x to be folded into > > (z & y) | x. Merges this simplification with ((x | y) & z) | x -> (z & y) |

[PATCH] RISC-V: Add MASK vec_duplicate pattern[PR110962]

This patch fix bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110962 SUBROUTINE a(b,c,d) LOGICAL,DIMENSION(INOUT) :: b LOGICAL e REAL, DIMENSION(IN) :: c REAL, DIMENSION(INOUT) :: d REAL, DIMENSION(SIZE(c)) :: f WHERE (b.AND.e) WHERE (f>=0.) d = g ENDWHER

Re: Re: [PATCH V2] VECT: Support loop len control on EXTRACT_LAST vectorization

On Thu, 10 Aug 2023, juzhe.zh...@rivai.ai wrote: > >> I guess as a temporary thing your approach is OK but we shouldn't > >> add these as part of new code - it's supposed to handle legacy > >> cases that we didn't fixup yet. > > Do you mean we need to fix LC SSA PHI flow so that we don't need to

Re: [PATCH] Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter instructions.

On Thu, Aug 10, 2023 at 9:55 AM Hongtao Liu wrote: > > On Thu, Aug 10, 2023 at 3:49 PM Richard Biener via Gcc-patches > wrote: > > > > On Thu, Aug 10, 2023 at 9:42 AM Uros Bizjak wrote: > > > > > > On Thu, Aug 10, 2023 at 9:40 AM Richard Biener > > > wrote: > > > > > > > > On Thu, Aug 10, 2023

Re: [PATCH] Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter instructions.

On Thu, Aug 10, 2023 at 11:16 AM Hongtao Liu wrote: > > On Thu, Aug 10, 2023 at 4:07 PM Hongtao Liu wrote: > > > > On Thu, Aug 10, 2023 at 3:55 PM Hongtao Liu wrote: > > > > > > On Thu, Aug 10, 2023 at 3:49 PM Richard Biener via Gcc-patches > > > wrote: > > > > > > > > On Thu, Aug 10, 2023 at 9

[PATCH] preserve base pointer for __deregister_frame [PR110956]

Original bug report: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110956 Rainer Orth successfully tested the patch on Solaris with a full bootstrap. Some uncommon unwinding table encodings need to access the base pointer for address computations. We do not have that information in calls to __de

Re: Re: [PATCH V2] VECT: Support loop len control on EXTRACT_LAST vectorization

Hi, Richi. >> What inserts the required LC SSA PHI in that case? Here is the flow how GCC insert LC SSA PHI flow for ARM SVE. You can see this following 'vect' dump details: https://godbolt.org/z/564o87oz3 You can see this following information: ;; Created LCSSA PHI: loop_mask_36 = PHI # lo

c: Support for -Wuseless-cast [RR84510]

This patch adds the missing support for -Wuseless-cast to the C FE as requested by some users. It found about  50 useless casts in one of my projects without false  positives. (I also implemented a detection for various unneeded pointer casts in convert_for_assignment such as unneeded casts fro

Re: [PATCH] RISC-V: Add missing modes to the iterators

Yeah, thanks, better in this separate patch. OK. Regards Robin

Re: [PATCH] testsuite: Fix gcc.dg/analyzer/allocation-size-multiline-[123].c [PR 110426]

Hi! On Wed, 9 Aug 2023 at 22:30, David Malcolm wrote: > On Tue, 2023-08-08 at 15:01 +, Christophe Lyon wrote: > > For 32-bit newlib targets (e.g. arm-eabi) int32_t is "long int". > > > > Like previous patches in these tests, update the matching regexps to > > match "aka (long )?int". > > >

Re: [PATCH] RISC-V: Add MASK vec_duplicate pattern[PR110962]

Is the testcase already in the test suite? If not we should add it. Apart from that LGTM. Regards Robin

Re: Re: [PATCH] RISC-V: Add MASK vec_duplicate pattern[PR110962]

I didn't add it since I don't know how to add a target specific fortran testcase. juzhe.zh...@rivai.ai From: Robin Dapp Date: 2023-08-10 19:55 To: Juzhe-Zhong; gcc-patches CC: rdapp.gcc; kito.cheng; kito.cheng; jeffreyalaw Subject: Re: [PATCH] RISC-V: Add MASK vec_duplicate pattern[PR1109

Re: [PATCH] Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter instructions.

> On Thu, Aug 10, 2023 at 9:42 AM Uros Bizjak wrote: > > > > On Thu, Aug 10, 2023 at 9:40 AM Richard Biener > > wrote: > > > > > > On Thu, Aug 10, 2023 at 3:13 AM liuhongt wrote: > > > > > > > > Currently we have 3 different independent tunes for gather > > > > "use_gather,use_gather_2parts,use_

Re: [PATCH] RISC-V: Support TU for integer ternary OP[PR110964]

OK. Regards Robin

Re: Re: [PATCH V2] VECT: Support loop len control on EXTRACT_LAST vectorization

On Thu, 10 Aug 2023, juzhe.zh...@rivai.ai wrote: > Hi, Richi. > > >> What inserts the required LC SSA PHI in that case? > > Here is the flow how GCC insert LC SSA PHI flow for ARM SVE. > You can see this following 'vect' dump details: > https://godbolt.org/z/564o87oz3 > > You can see this foll

[PATCH V2] RISC-V: Fix error combine of pred_mov pattern

Hi, This patch fix PR110943 which will produce some error code. This is because the error combine of some pred_mov pattern. Consider this code: ``` void foo9 (void *base, void *out, size_t vl) { int64_t scalar = *(int64_t*)(base + 100); vint64m2_t v = __riscv_vmv_v_x_i64m2 (0, 1); *(

RE: [PATCH] RISC-V: Add missing modes to the iterators

Committed, thanks Robin. Pan -Original Message- From: Gcc-patches On Behalf Of Robin Dapp via Gcc-patches Sent: Thursday, August 10, 2023 7:50 PM To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org Cc: rdapp@gmail.com; kito.ch...@gmail.com; kito.ch...@sifive.com; jeffreya...@gmail.com Subjec

[PATCH] Make ISEL used internal functions const/nothrow where appropriate

Both .VEC_SET and .VEC_EXTACT and the various .VCOND internal functions are operating on registers only and they are not supposed to raise any exceptions. The following makes them const/nothrow. I've verified this avoids useless SSA updates in ISEL. Bootstrap & regtest running on x86_64-unknown-

RE: [PATCH] RISC-V: Support TU for integer ternary OP[PR110964]

Committed, thanks Robin. Pan -Original Message- From: Gcc-patches On Behalf Of Robin Dapp via Gcc-patches Sent: Thursday, August 10, 2023 8:09 PM To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org Cc: rdapp@gmail.com; kito.ch...@gmail.com; kito.ch...@sifive.com; jeffreya...@gmail.com Subjec

Re: Re: [PATCH V2] VECT: Support loop len control on EXTRACT_LAST vectorization

Hi，Richi. >> comments do not match the implementation, but then that should be fixed? You mean you allow me to change VEC_EXTRACT into ECF_CONST ? If I can change VEC_EXTRACT into ECF_CONST then this patch can definitely work No need 'vinfo->any_known_not_updated_vssa = true'. So, let me conclud

Re: [PATCH v1] RISC-V: Support RVV VFMACC rounding mode intrinsic API

LGTM. juzhe.zh...@rivai.ai From: pan2.li Date: 2023-08-10 13:09 To: gcc-patches CC: juzhe.zhong; jeffreyalaw; pan2.li; yanzhang.wang; kito.cheng Subject: [PATCH v1] RISC-V: Support RVV VFMACC rounding mode intrinsic API From: Pan Li This patch would like to support the rounding mode API for

Re: [PATCH] RISC-V: Fix error combine of pred_mov pattern

Hi Jeff, After reconsidering I think the split of pattern you mention makes sense to me. I have split the `@pred_movhttps://gcc.gnu.org/pipermail/gcc-patches/2023-August/626981.html Best, Lehua

Re: [PATCH V2] VECT: Support loop len control on EXTRACT_LAST vectorization

> Hmm, I think VEC_EXTRACT and VEC_SET should be ECF_CONST. Maybe the > GIMPLE ISEL > comments do not match the implementation, but then that should be fixed? > > /* Expand all ARRAY_REF(VIEW_CONVERT_EXPR) gimple assignments into calls > to >internal function based on vector type of selecte

Re: [PATCH V2] VECT: Support loop len control on EXTRACT_LAST vectorization

On Thu, 10 Aug 2023, Robin Dapp wrote: > > Hmm, I think VEC_EXTRACT and VEC_SET should be ECF_CONST. Maybe the > > GIMPLE ISEL > > comments do not match the implementation, but then that should be fixed? > > > > /* Expand all ARRAY_REF(VIEW_CONVERT_EXPR) gimple assignments into calls > > to >

Re: Intel AVX10.1 Compiler Design and Support

> Changing ABIs like that for existing code that has worked for some time on > existing hardware is a bad idea. I agree, so Proposal 3 is the last choice. The target of the proposals is to solve the ABI incompatible issue between AVX10-256 and AVX10-512 when passing/returning 512 vectors. So we

Re: Re: [PATCH] RISC-V: Add MASK vec_duplicate pattern[PR110962]

Is this patch ok ? Maybe we can find a way to add a target specific fortran test but should not block this bug fix. juzhe.zh...@rivai.ai From: Robin Dapp Date: 2023-08-10 19:55 To: Juzhe-Zhong; gcc-patches CC: rdapp.gcc; kito.cheng; kito.cheng; jeffreyalaw Subject: Re: [PATCH] RISC-V: Add MAS

RE: [PATCH v1] RISC-V: Support RVV VFMACC rounding mode intrinsic API

Committed, thanks Juzhe. Pan From: juzhe.zh...@rivai.ai Sent: Thursday, August 10, 2023 8:27 PM To: Li, Pan2 ; gcc-patches Cc: jeffreyalaw ; Li, Pan2 ; Wang, Yanzhang ; kito.cheng Subject: Re: [PATCH v1] RISC-V: Support RVV VFMACC rounding mode intrinsic API LGTM. __

RE: [PATCH v1] RISC-V: Support RVV VFNMACC rounding mode intrinsic API

Committed, thanks Kito. Pan -Original Message- From: Kito Cheng Sent: Thursday, August 10, 2023 4:54 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; jeffreya...@gmail.com; Wang, Yanzhang Subject: Re: [PATCH v1] RISC-V: Support RVV VFNMACC rounding mode intrinsic AP

[PATCH] tree-optimization/110963 - more PRE when optimizing for size

The following adjusts the heuristic when we perform PHI insertion during GIMPLE PRE from requiring at least one edge that is supposed to be optimized for speed to also doing insertion when the expression is available on all edges (but possibly with different value) and we'd at most have one copy fr

Re: [PATCH] RISC-V: Add MASK vec_duplicate pattern[PR110962]

> Is this patch ok ? Maybe we can find a way to add a target specific > fortran test but should not block this bug fix. It's not much different than adding a C testcase actually, apart from starting comments with a ! But well, LGTM. The test doesn't look that complicated and quite likely is cov

Re: Intel AVX10.1 Compiler Design and Support

On Thu, Aug 10, 2023 at 2:37 PM Phoebe Wang via Gcc-patches wrote: > > > Changing ABIs like that for existing code that has worked for some time > on > > existing hardware is a bad idea. > > I agree, so Proposal 3 is the last choice. > > The target of the proposals is to solve the ABI incompatib

Re: [PATCHv2] Use toplevel configure for GMP and MPFR for gdb

On 10.11.22 20:05, apinski--- via Binutils wrote: From: Andrew Pinski This patch uses the toplevel configure parts for GMP/MPFR for gdb. The only thing is that gdb now requires MPFR for building. Before it was a recommended but not required library. Also this allows building of GMP and MPFR wit

Re: Intel AVX10.1 Compiler Design and Support

> The psABI should have some simple rule covering all of the above I think. psABI has a rule for the case doesn't mean the rule is a well defined ABI in practice. A well defined ABI should guarantee 1) interlinkable across different compile options within the same compiler; 2) interlinkable acros

Re: [PATCH] Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter instructions.

On Thu, Aug 10, 2023 at 7:13 PM Richard Biener wrote: > > On Thu, Aug 10, 2023 at 11:16 AM Hongtao Liu wrote: > > > > On Thu, Aug 10, 2023 at 4:07 PM Hongtao Liu wrote: > > > > > > On Thu, Aug 10, 2023 at 3:55 PM Hongtao Liu wrote: > > > > > > > > On Thu, Aug 10, 2023 at 3:49 PM Richard Biener

RE: Machine Mode ICE in RISC-V when LTO

Hi! On 2023-08-10T12:25:36+, "Li, Pan2" wrote: > Thanks Richard for comment, let me try to promote the table to unsigned short. I have WIP work for this issue -- which I'd already raised a month ago: : On 2023-06-30T13:4

Re: [PATCH] aarch64: enable mixed-types for aarch64 simdclones

Jakub Jelinek writes: > On Wed, Aug 09, 2023 at 06:27:20PM +0100, Richard Sandiford wrote: >> Jakub Jelinek writes: >> > On Wed, Aug 09, 2023 at 05:55:28PM +0100, Richard Sandiford wrote: >> >> Jakub: do you remember what the reason was? I don't mind dropping >> >> "function", but it feels weird

Re: Intel AVX10.1 Compiler Design and Support

On 10.08.2023 15:12, Phoebe Wang wrote: >> The psABI should have some simple rule covering all of the above I think. > > psABI has a rule for the case doesn't mean the rule is a well defined ABI > in practice. A well defined ABI should guarantee 1) interlinkable across > different compile options

[PATCH 0/5] [og13] OpenMP: Implement 'declare mapper' for 'target update' directives

This series (for the og13 branch) implements 'declare mapper' support for 'target update' directives, and improves diagnostic behaviour relating to mapper expansion (mostly for Fortran) in several ways. Tested with offloading to AMD GCN. Further comments on individual patches. I will apply (to t

[PATCH 3/5] OpenMP: Introduce C_ORT_{, OMP_}DECLARE_MAPPER c_omp_region_type types

This patch adds C_ORT_DECLARE_MAPPER and C_ORT_OMP_DECLARE_MAPPER region types to the c_omp_region_type enum, and uses them in cp/pt.cc. Previously the C_ORT_DECLARE_SIMD code was being abused to inhibit calling finish_omp_clauses within mapper definitions, but this patch uses one of the new enumer

[PATCH 1/5] OpenMP: Move Fortran 'declare mapper' instantiation code

This patch moves the code for explicit 'declare mapper' directive instantiation in the Fortran front-end to openmp.cc from trans-openmp.cc. The transformation takes place entirely in the front end's own representation and doesn't involve middle-end trees at all. Also, having the code in openmp.cc i

[PATCH 4/5] OpenMP: Look up 'declare mapper' definitions at resolution time not parse time

This patch moves 'declare mapper' lookup for OpenMP clauses from parse time to resolution time for Fortran, and adds diagnostics for missing named mappers. This changes clause lookup in a particular case -- where several 'declare mapper's are defined in a context, mappers declared earlier may now

[PATCH 2/5] OpenMP: Reprocess expanded clauses after 'declare mapper' instantiation

This patch reprocesses expanded clauses after 'declare mapper' instantiation -- checking things such as duplicated clauses, illegal use of strided accesses, and so forth. Two functions are broken out of the 'resolve_omp_clauses' function and reused in a new function 'resolve_omp_mapper_clauses', c

[PATCH 5/5] OpenMP: Enable 'declare mapper' mappers for 'target update' directives

This patch enables use of 'declare mapper' for 'target update' directives, for each of C, C++ and Fortran. There are some implementation choices here and some "read-between-the-lines" consequences regarding this functionality, as follows: * It is possible to invoke a mapper which contains clause

Re: [PATCH] MATCH: [PR110937/PR100798] (a ? ~b : b) should be optimized to b ^ -(a)

Hi Andrew, On Wed, 9 Aug 2023 at 21:20, Andrew Pinski via Gcc-patches < gcc-patches@gcc.gnu.org> wrote: > This adds a simple match pattern for this case. > I noticed it a couple of different places. > One while I was looking at code generation of a parser and > also while I was looking at locati

RE: [PATCH] RISC-V: Add MASK vec_duplicate pattern[PR110962]

Committed, thanks Robin. Pan -Original Message- From: Gcc-patches On Behalf Of Robin Dapp via Gcc-patches Sent: Thursday, August 10, 2023 8:45 PM To: juzhe.zh...@rivai.ai; gcc-patches Cc: rdapp@gmail.com; kito.cheng ; Kito.cheng ; jeffreyalaw Subject: Re: [PATCH] RISC-V: Add MASK

Re: [PATCH] VR-VALUES: Simplify comparison using range pairs

Richard Biener via Gcc-patches writes: > On Wed, Aug 9, 2023 at 6:16 PM Andrew Pinski via Gcc-patches > wrote: >> >> If `A` has a range of `[0,0][100,INF]` and the comparison >> of `A < 50`. This should be optimized to `A <= 0` (which then >> will be optimized to just `A == 0`). >> This patch imp

Re: Intel AVX10.1 Compiler Design and Support

On Thu, Aug 10, 2023 at 3:31 PM Jan Beulich wrote: > > On 10.08.2023 15:12, Phoebe Wang wrote: > >> The psABI should have some simple rule covering all of the above I think. > > > > psABI has a rule for the case doesn't mean the rule is a well defined ABI > > in practice. A well defined ABI shoul

Re: [PATCH] VR-VALUES: Simplify comparison using range pairs

On Thu, Aug 10, 2023 at 3:44 PM Richard Sandiford wrote: > > Richard Biener via Gcc-patches writes: > > On Wed, Aug 9, 2023 at 6:16 PM Andrew Pinski via Gcc-patches > > wrote: > >> > >> If `A` has a range of `[0,0][100,INF]` and the comparison > >> of `A < 50`. This should be optimized to `A <=

Re: [V2][PATCH 0/3] New attribute "counted_by" to annotate bounds for C99 FAM(PR108896)

Hello, On Wed, 9 Aug 2023, Qing Zhao wrote: > > So, should the equivalent FAM struct also have this sizeof()? If no: > > there should be a good argument why it shouldn't be similar to the non-FAM > > one. > > The sizeof() of a structure with FAM is defined as: (after I searched online, > I t

Re: [V2][PATCH 0/3] New attribute "counted_by" to annotate bounds for C99 FAM(PR108896)

> On Aug 10, 2023, at 2:58 AM, Martin Uecker wrote: > > Am Mittwoch, dem 09.08.2023 um 20:10 + schrieb Qing Zhao: >> >>> On Aug 9, 2023, at 12:21 PM, Michael Matz wrote: > > ... >> >> By definition, the sizeof() of a struct with FAM might not be the same as >> the non-FAM one. >> i.e,

Re: [V2][PATCH 0/3] New attribute "counted_by" to annotate bounds for C99 FAM(PR108896)

Hey, On Thu, 10 Aug 2023, Martin Uecker wrote: > > offset(struct foo_flex, t[0]) + N * sizeof(foo->t); > > > > With GCC, offset(struct foo_flex,t[0]) == 6, which is also correct. > > This formula might be considered incorrect / dangerous because > it might allocate less storage than sizeof(str

Re: [PATCH] VR-VALUES: Simplify comparison using range pairs

Richard Biener writes: > On Thu, Aug 10, 2023 at 3:44 PM Richard Sandiford > wrote: >> >> Richard Biener via Gcc-patches writes: >> > On Wed, Aug 9, 2023 at 6:16 PM Andrew Pinski via Gcc-patches >> > wrote: >> >> >> >> If `A` has a range of `[0,0][100,INF]` and the comparison >> >> of `A < 50`.

RE: Intel AVX10.1 Compiler Design and Support

> -Original Message- > From: Jan Beulich > Sent: Thursday, August 10, 2023 9:31 PM > To: Phoebe Wang > Cc: Joseph Myers ; Wang, Phoebe > ; Hongtao Liu ; Jiang, Haochen > ; gcc-patches@gcc.gnu.org; ubiz...@gmail.com; Liu, > Hongtao ; Zhang, Annita ; > x86-64-abi ; llvm-dev d...@lists.llvm

RE: Machine Mode ICE in RISC-V when LTO

Thanks Thomas for the information, great to learn you have a fix WIP. > ... is not sufficient: that runs into GTY issues, as the current > 'unsigned char *lto_mode_identity_table' is (mis-)classified by > 'gengtype' as a C string. This happens to work for this case, but still > isn't right, and o

Re: [RFC] [v2] Extend fold_vec_perm to handle VLA vectors

On Tue, 8 Aug 2023 at 15:27, Richard Sandiford wrote: > > Prathamesh Kulkarni writes: > > On Fri, 4 Aug 2023 at 20:36, Richard Sandiford > > wrote: > >> > >> Full review this time, sorry for the skipping the tests earlier. > > Thanks for the detailed review! Please find my responses inline below

Re: [V2][PATCH 0/3] New attribute "counted_by" to annotate bounds for C99 FAM(PR108896)

Am Donnerstag, dem 10.08.2023 um 13:59 + schrieb Qing Zhao: > > > On Aug 10, 2023, at 2:58 AM, Martin Uecker wrote: > > > > Am Mittwoch, dem 09.08.2023 um 20:10 + schrieb Qing Zhao: > > > > > > > On Aug 9, 2023, at 12:21 PM, Michael Matz wrote: > > > > I am not sure for the reason gi

Re: [V2][PATCH 0/3] New attribute "counted_by" to annotate bounds for C99 FAM(PR108896)

On Thu, Aug 10, 2023 at 04:38:21PM +0200, Martin Uecker wrote: > Am Donnerstag, dem 10.08.2023 um 13:59 + schrieb Qing Zhao: > > > > > On Aug 10, 2023, at 2:58 AM, Martin Uecker wrote: > > > > > > Am Mittwoch, dem 09.08.2023 um 20:10 + schrieb Qing Zhao: > > > > > > > > > On Aug 9, 2023

Re: [V2][PATCH 0/3] New attribute "counted_by" to annotate bounds for C99 FAM(PR108896)

Am Donnerstag, dem 10.08.2023 um 16:42 +0200 schrieb Jakub Jelinek: > On Thu, Aug 10, 2023 at 04:38:21PM +0200, Martin Uecker wrote: > > Am Donnerstag, dem 10.08.2023 um 13:59 + schrieb Qing Zhao: > > > > > > > On Aug 10, 2023, at 2:58 AM, Martin Uecker wrote: > > > > > > > > Am Mittwoch, de

[PATCH] rtl-optimization/110939 Really fix narrow comparison of memory and constant

In the former fix in commit 41ef5a34161356817807be3a2e51fbdbe575ae85 I completely missed the fact that the normal form of a generated constant for a mode with fewer bits than in HOST_WIDE_INT is a sign extended version of the actual constant. This even holds true for unsigned constants. Fixed by

Re: [V2][PATCH 0/3] New attribute "counted_by" to annotate bounds for C99 FAM(PR108896)

On 2023-08-10 10:47, Martin Uecker wrote: Am Donnerstag, dem 10.08.2023 um 16:42 +0200 schrieb Jakub Jelinek: On Thu, Aug 10, 2023 at 04:38:21PM +0200, Martin Uecker wrote: Am Donnerstag, dem 10.08.2023 um 13:59 + schrieb Qing Zhao: On Aug 10, 2023, at 2:58 AM, Martin Uecker wrote: Am

Re: [PATCH] tree-optimization/110963 - more PRE when optimizing for size

On 8/10/23 06:41, Richard Biener via Gcc-patches wrote: The following adjusts the heuristic when we perform PHI insertion during GIMPLE PRE from requiring at least one edge that is supposed to be optimized for speed to also doing insertion when the expression is available on all edges (but pos

Re: [PATCH] tree-optimization/110963 - more PRE when optimizing for size

> Am 10.08.2023 um 17:01 schrieb Jeff Law via Gcc-patches > : > >  > >> On 8/10/23 06:41, Richard Biener via Gcc-patches wrote: >> The following adjusts the heuristic when we perform PHI insertion >> during GIMPLE PRE from requiring at least one edge that is supposed >> to be optimized for s

RE: Intel AVX10.1 Compiler Design and Support

For ABI change proposal, I'd suggest to raise a discussion in x86-64-abi group. Thx, Annita > -Original Message- > From: Jiang, Haochen > Sent: Thursday, August 10, 2023 10:15 PM > To: Beulich, Jan ; Phoebe Wang > > Cc: Joseph Myers ; Wang, Phoebe > ; Hongtao Liu ; gcc- > patc...@gcc.g

RE: Intel AVX10.1 Compiler Design and Support

Hi all, There are lots of discussions on arch level and ABIs and I really appreciate that. For the arch level issue, it might be a little early to discuss and should not block these patches. For ABI issue, the problem actually comes from the current behavior between GCC and clang/LLVM are diff

Re: [PATCH] libatomic: Improve ifunc selection on AArch64

On 8/10/23 02:50, Wilco Dijkstra wrote: Hi Richard, Why would HWCAP_USCAT not be set by the kernel? Failing that, I would think you would check ID_AA64MMFR2_EL1.AT. Answering my own question, N1 does not officially have FEAT_LSE2. It doesn't indeed. However most cores support atomic 128-bi

Re: [V2][PATCH 0/3] New attribute "counted_by" to annotate bounds for C99 FAM(PR108896)

Am Donnerstag, dem 10.08.2023 um 10:58 -0400 schrieb Siddhesh Poyarekar: > On 2023-08-10 10:47, Martin Uecker wrote: > > Am Donnerstag, dem 10.08.2023 um 16:42 +0200 schrieb Jakub Jelinek: > > > On Thu, Aug 10, 2023 at 04:38:21PM +0200, Martin Uecker wrote: > > > > Am Donnerstag, dem 10.08.2023 um

Re: Intel AVX10.1 Compiler Design and Support

On Thu, Aug 10, 2023 at 03:08:11PM +, Zhang, Annita via Gcc-patches wrote: > > IMO it is not acceptable for AVX10-256 to generate zmm registers. > > > > If I have to choose among the three proposal, the second is better. > > > > But the best choice I suppose is to keep what we are doing curre

[PATCH 13/12 v2] C _BitInt incremental fixes [PR102989]

On Thu, Aug 10, 2023 at 12:10:07PM +0200, Jakub Jelinek via Gcc-patches wrote: > Here is an incremental patch which does that: Bootstrap/regtest on i686-linux (next to x86_64-linux where it went fine) revealed I forgot to add { target bitint } to dg-do compile lines. Here is an updated patch whic

Re: [PATCH v4] Implement new RTL optimizations pass: fold-mem-offsets.

On 8/10/23 03:28, Manolis Tsamis wrote: Hi Jeff, Thanks a lot for providing all this information and testcase! I have been able to reproduce the issue with it. I have investigated the cause of the issue and it's not what you mention, the uses of all intermediate calculations are properly tak

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