Okay, I am fine with this.
Richard and Kees, what’s your opinion on this?
thanks.
Qing
> On Aug 31, 2022, at 4:09 PM, Joseph Myers wrote:
>
> On Wed, 31 Aug 2022, Qing Zhao wrote:
>
When -std=gnu89 + -fstrict-flex-array=3 (ONLY C99 flexible array member
[] is treated as a valid f
> On Aug 31, 2022, at 4:16 PM, Qing Zhao via Gcc-patches
> wrote:
>
> Okay, I am fine with this.
Another thought on this is:
One of the major purposes of the new option -fstrict-flex-array is to encourage
standard conforming programming style.
So, it might be reasonable to treat -fstrict-
On 8/31/22 07:57, Palmer Dabbelt wrote:
On Tue, 30 Aug 2022 10:48:29 PDT (-0700), Vineet Gupta wrote:
Came across this deprecated symbol when looking around for
-mexplicit-relocs handling in code
Signed-off-by: Vineet Gupta
---
gcc/config/riscv/riscv-c.cc | 3 ---
1 file changed, 3 deletions(
On 8/31/22 07:57, Palmer Dabbelt wrote:
if (flag_pic)
- riscv_cmodel = CM_PIC;
+ riscv_cmodel = CM_MEDANY;
/* We get better code with explicit relocs for CM_MEDLOW, but
worse code for the others (for now). Pick the best default. */
I'm fine either way on this one: having
On 31 August 2022 20:29:12 CEST, FX via Fortran wrote:
+ case GFC_FPE_GFC_FPE_AWAY:
typo?
thanks,
On Wed, Aug 31, 2022 at 01:53:48PM -0500, Peter Bergner wrote:
> ...and of course, now I can't recreate that issue at all and the
> ptr_vector_*_type use work fine now. Strange! ...so ok, changed.
> Maybe the behavior changed since my PR106017 fix went in???
That is my best guess as well. But, h
Hi,
This patch fixes PR106627. I ran the i386.exp tests on my x86_64-linux-gnu
machine with a fully bootstrapped checkout. I also tested manually that no
exception handling code is generated if none of the function versions throws an
exception.
I don't have access to a machine to test the chang
On Wed, Aug 31, 2022 at 02:53:07PM -0500, Peter Bergner wrote:
> On 8/31/22 2:28 PM, Segher Boessenkool wrote:
> > On Wed, Aug 31, 2022 at 12:00:14PM -0500, Peter Bergner wrote:
> Right, but haven't the 64-bit Linux kernels been fixed forever to always
> save/restore the full 64-bit hardware regist
This introduces an early exit test to most_specialized_partial_spec for
the common case where we have no partial specializations, which allows
us to avoid some unnecessary work. In passing, clean the function up a
bit.
Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for
trunk
> + case GFC_FPE_GFC_FPE_AWAY:
>
> typo?
Absolutely. Didn’t break the build because glibc currently doesn’t define
FE_TONEARESTFROMZERO, but it should in the future (when C2x is included).
FX
On 8/31/22 4:07 PM, Segher Boessenkool wrote:
> On Wed, Aug 31, 2022 at 02:53:07PM -0500, Peter Bergner wrote:
>> Changing OS_MISSING_POWERPC64 as I mentioned would not add
>> OPTION_MASK_POWERPC64
>> to our cpu masks when -m32 is used.
>
> So you say this is where the bug is?
For linux64.h whic
On Wed, Aug 31, 2022 at 04:38:02PM -0500, Peter Bergner wrote:
> On 8/31/22 4:07 PM, Segher Boessenkool wrote:
> > On Wed, Aug 31, 2022 at 02:53:07PM -0500, Peter Bergner wrote:
> >> Changing OS_MISSING_POWERPC64 as I mentioned would not add
> >> OPTION_MASK_POWERPC64
> >> to our cpu masks when -m
On 8/31/22 3:51 PM, Segher Boessenkool wrote:
> On Wed, Aug 31, 2022 at 01:53:48PM -0500, Peter Bergner wrote:
>> Question for my own education, when would you use VIEW_CONVERT_EXPR over
>> NOP_EXPR?
>
> VIEW_CONVERT_EXPR is essentially a bit_cast. Only use it when you need
> that, it is sub-opt
On Wed, Aug 31, 2022 at 08:16:49PM +, Qing Zhao wrote:
>
> > On Aug 31, 2022, at 4:09 PM, Joseph Myers wrote:
> >
> > On Wed, 31 Aug 2022, Qing Zhao wrote:
> >
> When -std=gnu89 + -fstrict-flex-array=3 (ONLY C99 flexible array member
> [] is treated as a valid flexible array) pre
On 8/31/22 4:49 PM, Segher Boessenkool wrote:
> But it is incorrect as well. Instead, we should look if -mpowerpc64 is
> enabled explicitly, and not change it if so.
Sure, I agree with checking for explicit use. That said, I'll let
someone else work on this.
Peter
On Wed, Aug 31, 2022 at 08:35:12PM +, Qing Zhao wrote:
> One of the major purposes of the new option -fstrict-flex-array is to
> encourage standard conforming programming style.
>
> So, it might be reasonable to treat -fstrict-flex-array similar as -pedantic
> (but only for flexible array m
Implement some changes to the currently supported C2x standard
attributes that have been made to the specification since they were
first implemented in GCC, and some consequent changes:
* maybe_unused is now supported on labels. In fact that was already
accidentally supported in GCC as a result
On Wed, Aug 31, 2022 at 05:01:04PM -0500, Peter Bergner wrote:
> The problem goes away if I use use -O1 or above, I drop -flto or I use
> the code I originally posted without the ptr_vector_*_type
>
> The assert in gimple_canonical_types_compatible_p() we're hitting is:
> 13673 default:
> 1367
On 8/31/22 6:08 PM, Segher Boessenkool wrote:
> On Wed, Aug 31, 2022 at 05:01:04PM -0500, Peter Bergner wrote:
>> The problem goes away if I use use -O1 or above, I drop -flto or I use
>> the code I originally posted without the ptr_vector_*_type
>>
>> The assert in gimple_canonical_types_compatibl
Changes from v1:
* Fix spelling typo in git log entry
* Fix broken test checking src_ptr's type
* Use NOP_EXPR rather than VIEW_CONVERT_EXPR
* Change order of dg-options
When we expand an MMA disassemble built-in with C++ using a pointer that
is cast to a valid MMA type, the type isn't passed down
On Wed, Aug 31, 2022 at 06:36:40PM -0500, Peter Bergner wrote:
> Changes from v1:
> * Fix spelling typo in git log entry
> * Fix broken test checking src_ptr's type
> * Use NOP_EXPR rather than VIEW_CONVERT_EXPR
> * Change order of dg-options
>
> When we expand an MMA disassemble built-in with C++
On Linux/x86_64,
61c4c989034548f481d1f10198447be27fb9a55f is the first bad commit
commit 61c4c989034548f481d1f10198447be27fb9a55f
Author: Richard Sandiford
Date: Tue Aug 30 15:43:47 2022 +0100
Extend SLP permutation optimisations
caused
FAIL: gcc.dg/vect/bb-slp-pr54400.c -flto -ffat-lto-
On Linux/x86_64,
b911ca4231a366ddfd026f190b126bd517f4e640 is the first bad commit
commit b911ca4231a366ddfd026f190b126bd517f4e640
Author: Jonathan Wakely
Date: Fri Aug 26 16:22:21 2022 +0100
libstdc++: Add [[nodiscard]] attribute to and
caused
FAIL: g++.dg/tree-ssa/empty-loop.C -std=g
Thanks, pushed with a few minor style fixes.
On Tue, Aug 30, 2022 at 9:51 AM wrote:
>
> From: zhongjuzhe
>
> gcc/ChangeLog:
>
> * config/riscv/riscv.cc (riscv_convert_vector_bits): Change
> configuration according to TARGET_MIN_VLEN.
> * config/riscv/riscv.h (UNITS_PER_FP_REG):
Thanks, pushed to trunk.
On Tue, Aug 30, 2022 at 10:58 AM wrote:
>
> From: zhongjuzhe
>
> gcc/ChangeLog:
>
> * config/riscv/riscv.h (enum reg_class): Change vype to vtype.
>
> ---
> gcc/config/riscv/riscv.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/gcc/con
Thanks, committed!
On Tue, Aug 30, 2022 at 2:15 PM wrote:
>
> From: zhongjuzhe
>
> gcc/ChangeLog:
>
> * config/riscv/constraints.md (TARGET_VECTOR ? V_REGS : NO_REGS): Add
> "vr" constraint.
> (TARGET_VECTOR ? VD_REGS : NO_REGS): Add "vd" constraint.
> (TARGET_VECTOR ? V
Committed.
On Tue, Aug 30, 2022 at 2:21 PM wrote:
>
> From: zhongjuzhe
>
> gcc/ChangeLog:
>
> * config/riscv/riscv.cc (riscv_const_insns): Add cost of poly_int.
> (riscv_output_move): Add csrr vlenb assembly.
> * config/riscv/riscv.md (move_type): Add csrr vlenb type.
>
Committed with title fix, that should be TARGET_CONDITIONAL_REGISTER_USAGE
On Tue, Aug 30, 2022 at 2:28 PM wrote:
>
> From: zhongjuzhe
>
> gcc/ChangeLog:
>
> * config/riscv/riscv.cc (riscv_conditional_register_usage): Add RVV
> registers.
>
> ---
> gcc/config/riscv/riscv.cc | 9 +++
On 8/31/22 6:45 PM, Segher Boessenkool wrote:
> On Wed, Aug 31, 2022 at 06:36:40PM -0500, Peter Bergner wrote:
>> Changes from v1:
>> * Fix spelling typo in git log entry
>> * Fix broken test checking src_ptr's type
>> * Use NOP_EXPR rather than VIEW_CONVERT_EXPR
>> * Change order of dg-options
>>
Hi,
As mentioned in PR106550, since pli could support 34bits immediate, we could
use less instructions(3insn would be ok) to build 64bits constant with pli.
For example, for constant 0x020805006106003, we could generate it with:
asm code1:
pli 9,101736451 (0x6106003)
sldi 9,9,32
paddi 9,9, 213000
Hi,
Currently, these two splitters (touched in this patch) are using predicate
`int_reg_operand_not_pseudo`, then they work in split2 pass after RA in
most times, and can not run before RA.
It would not be a bad idea to allow these splitters before RA. Then more
passes (between split1 and split2
The V registers are always clobbered on calls.
gcc/ChangeLog
* config/riscv/riscv.cc (riscv_conditional_register_usage):
Always mark the V registers as clobbered on calls.
---
gcc/config/riscv/riscv.cc | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --g
Any feedback regarding this proposal:
https://gcc.gnu.org/pipermail/libstdc++/2021-June/052821.html
On 23/06/21 22:34, François Dumont wrote:
Hi
Following the message to propose an alternative lower_bound and the
reply to use three way comparison I try to implement this.
Before going furthe
Hi,
This patch changes the sequence of test directives for 3 test cases.
Originally, these 3 cases got failed or unsupported on some platforms, as
their effective target checks depend on compiling options.
Bootstrapped and tested on powerpc64-linux BE and LE with no regressions.
Is this okay f
In the example below, 'x' is once placed on the stack frame and then read
into registers as the argument value of bar():
/* example */
struct foo {
int a, b;
};
extern struct foo bar(struct foo);
struct foo test(void) {
struct foo x = { 0, 1 };
return bar(x);
This patch eliminates all clobbers for complex hard registers that will
be overwritten entirely afterwards (supersedence of
3867d414bd7d9e5b6fb2a51b1fb3d9e9e1eae9).
gcc/ChangeLog:
* config/xtensa/xtensa.md: Rewrite the split pattern that performs
the abovementioned process so that
On Wed, 31 Aug 2022, Kees Cook wrote:
> On Wed, Aug 31, 2022 at 08:35:12PM +, Qing Zhao wrote:
> > One of the major purposes of the new option -fstrict-flex-array is to
> > encourage standard conforming programming style.
> >
> > So, it might be reasonable to treat -fstrict-flex-array simil
On Wed, Aug 31, 2022 at 9:21 PM Iain Buclaw wrote:
>
> Excerpts from Joseph Myers's message of August 31, 2022 7:16 pm:
> > On Wed, 31 Aug 2022, Iain Buclaw via Gcc-patches wrote:
> >
> >> Excerpts from Joseph Myers's message of August 30, 2022 11:53 pm:
> >> > On Fri, 26 Aug 2022, Richard Biener
On Wed, Aug 31, 2022 at 11:00 PM Simon Rainer wrote:
>
> Hi,
>
> This patch fixes PR106627. I ran the i386.exp tests on my x86_64-linux-gnu
> machine with a fully bootstrapped checkout. I also tested manually that no
> exception handling code is generated if none of the function versions throws
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