Re: [PATCH] x86: Allow CONST_VECTOR for vector load in combine

On Sun, Aug 22, 2021 at 8:54 PM H.J. Lu via Gcc-patches wrote: > > In vetor move pattern, replace nonimmediate_or_sse_const_operand with > nonimmediate_or_sse_const_vector_operand to allow vector load from > non-uniform CONST_VECTOR. Non-uniform CONST_VECTOR is enabled only in > the combine pass

Improve handling of return slots in ipa-modref

Hi, while looking at Martin's patch I also noticed that return slots are handled but overactively. We only care if the SSA name we analyze is base of return slot. Bootstrapped/regtested x86_64-linux, comitted. Honza gcc/ChangeLog: * ipa-modref.c (analyze_ssa_name_flags): Improve handli

Re: [PATCH] IPA: MODREF should skip EAF_* flags for indirect calls

On 8/22/21 19:32, Jan Hubicka wrote: Thanks for looking into this bug - it is interesting that ipa-pta requires !EAF_NOCLOBBER when function is called... I have some work done on teaching ipa-modref (and other propagation passes) to use ipa-devirt info when the full set of callees is known. This

Re: [pushed] libiberty, Darwin : Fix simple-object LTO table for cross-endian case.

On 8/18/21 20:37, Iain Sandoe wrote: Hi, For mach-o, we encapsulate streamed IR for LTO in three special sections with a table that describes their entries. The table is expected to be written with native endianness for the target, but for cross-endian cross-compilation the swapping was omitted

Re: [PATCH] analyzer: Fix PR analyzer/101980

On 8/20/21 18:47, David Malcolm via Gcc-patches wrote: On Fri, 2021-08-20 at 21:55 +0530, Ankur Saini wrote: The patch fixes the test failures introduced by : aef703cf982072427e74034f4c460a11c5e04b8e 1b34248527472496ca3fe2a07183beac8cf69041 Thanks - Ankur Thanks for fixing this. The patch l

Re: [PATCH] IPA: MODREF should skip EAF_* flags for indirect calls

On Sun, Aug 22, 2021 at 11:47 PM H.J. Lu via Gcc-patches < gcc-patches@gcc.gnu.org> wrote: > On Sun, Aug 22, 2021 at 10:32 AM Jan Hubicka wrote: > > > > > Thanks for looking into this bug - it is interesting that ipa-pta > > > requires !EAF_NOCLOBBER when function is called... > > > > > > I have

[committed] openmp: Add support for strict modifier on grainsize/num_tasks clauses

Hi! With strict: modifier on these clauses, the standard is explicit about how many iterations (and which) each generated task of taskloop directive should contain. For num_tasks it actually matches what we were already implementing, but for grainsize it does not (and even violates the old rule -

[PATCH] dwarf2out: Emit DW_AT_location for global register vars during early dwarf [PR101905]

Hi! The following patch emits DW_AT_location for global register variables already during early dwarf, since usually late_global_decl hook isn't even called for those, as nothing needs to be emitted for them. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2021-08-23 Jakub

[PATCH] bswap: Recognize (int) __builtin_bswap64 (arg) idioms or __builtin_bswap?? (arg) & mask [PR86723]

Hi! The following patch recognizes in the bswap pass (only there for now, haven't done it for store merging pass yet) code sequences that can be handled by (int32) __builtin_bswap64 (arg), i.e. where we have 0x05060708 n->n with 64-bit non-memory argument (if it is memory, we can just load the 32-

Re: [PATCH] analyzer: Fix PR analyzer/101980

On 8/23/21 10:10, Martin Liška wrote: On 8/20/21 18:47, David Malcolm via Gcc-patches wrote: On Fri, 2021-08-20 at 21:55 +0530, Ankur Saini wrote: The patch fixes the test failures introduced by : aef703cf982072427e74034f4c460a11c5e04b8e 1b34248527472496ca3fe2a07183beac8cf69041 Thanks - Ankur

[PATCH] Use non-numbered clones for target_clones.

For a better possibility of an assembly implementation of target_clones, we should not create numbered clones. Patch can bootstrap on x86_64-linux-gnu and survives regression tests. Ready to be installed? Thanks, Martin --- gcc/multiple_target.c | 10 -- 1 file changed, 4 insertions(+)

Re: GCC 11 backports

On 8/16/21 13:13, Martin Liška wrote: I'm going to apply the following 3 tested patches. Martin One more patch I've just tested. MartinFrom 9310e5f599b68d311e987b77cd0b7c8d3e46c5f8 Mon Sep 17 00:00:00 2001 From: Martin Liska Date: Tue, 17 Aug 2021 16:24:26 +0200 Subject: [PATCH] gcov: fix ou

Re: [PATCH] arm: Fix multilib mapping for CDE extensions [PR100856]

ping? On 16/08/2021 13:51, Christophe LYON via Gcc-patches wrote: ping? On 11/08/2021 16:06, Christophe Lyon wrote: ping? https://gcc.gnu.org/pipermail/gcc-patches/2021-July/575310.html On Wed, Aug 4, 2021 at 11:13 AM Chris

Re: [PATCH] arm: Fix __arm_vctp16q return type in arm_mve.h

ping? On 16/08/2021 15:12, Christophe Lyon wrote: __arm_vctp16q actually returns mve_pred16_t rather than int64_t. 2021-08-16 Christophe Lyon gcc/ * config/arm/arm_mve.h: Fix __arm_vctp16q return type. --- gcc/config/arm/arm_mve.h | 2 +- 1 file changed, 1 insertion(+),

RE: [PATCH] arm: Fix multilib mapping for CDE extensions [PR100856]

> -Original Message- > From: Gcc-patches bounces+kyrylo.tkachov=arm@gcc.gnu.org> On Behalf Of Christophe > LYON via Gcc-patches > Sent: 15 July 2021 14:05 > To: gcc Patches > Subject: [PATCH] arm: Fix multilib mapping for CDE extensions [PR100856] > > This is a followup to Srinath'

Re: [PATCH] IPA: MODREF should skip EAF_* flags for indirect calls

> Hello. > > Thanks for working on that. But have really run the test-cases as the newly > added test still aborts as it used to before you installed this patch? Eh, sorry, I had earlier version of patch that did if (gimple_call_fn (use_stmt) == name) lattice[index].merge (

RE: [PATCH] arm: Fix __arm_vctp16q return type in arm_mve.h

> -Original Message- > From: Gcc-patches bounces+kyrylo.tkachov=arm@gcc.gnu.org> On Behalf Of Christophe > Lyon via Gcc-patches > Sent: 16 August 2021 14:13 > To: gcc-patches@gcc.gnu.org > Subject: [PATCH] arm: Fix __arm_vctp16q return type in arm_mve.h > > __arm_vctp16q actually r

Re: [PATCH] dwarf2out: Emit DW_AT_location for global register vars during early dwarf [PR101905]

On Mon, 23 Aug 2021, Jakub Jelinek wrote: > Hi! > > The following patch emits DW_AT_location for global register variables > already during early dwarf, since usually late_global_decl hook isn't even > called for those, as nothing needs to be emitted for them. > > Bootstrapped/regtested on x86_6

Re: [PATCH] arm: Fix __arm_vctp16q return type in arm_mve.h

On 23/08/2021 11:30, Kyrylo Tkachov wrote: -Original Message- From: Gcc-patches On Behalf Of Christophe Lyon via Gcc-patches Sent: 16 August 2021 14:13 To: gcc-patches@gcc.gnu.org Subject: [PATCH] arm: Fix __arm_vctp16q return type in arm_mve.h __arm_vctp16q actually returns mve_pre

Re: [PATCH] IPA: MODREF should skip EAF_* flags for indirect calls

On Sun, Aug 22, 2021 at 7:32 PM Jan Hubicka wrote: > > > Thanks for looking into this bug - it is interesting that ipa-pta > > requires !EAF_NOCLOBBER when function is called... > > > > I have some work done on teaching ipa-modref (and other propagation > > passes) to use ipa-devirt info when the

[PATCH] [i386] Fix ICE.

Bootstrapped and regtested on x86_64-linux-gnu{-m32,}. Pushed to trunk. gcc/ChangeLog: PR target/102016 * config/i386/sse.md (*avx512f_pshufb_truncv8hiv8qi_1): Add TARGET_AVX512BW to condition. gcc/testsuite/ChangeLog: PR target/102016 * gcc.target/i3

Re: [PATCH] bswap: Recognize (int) __builtin_bswap64 (arg) idioms or __builtin_bswap?? (arg) & mask [PR86723]

On Mon, 23 Aug 2021, Jakub Jelinek wrote: > Hi! > > The following patch recognizes in the bswap pass (only there for now, > haven't done it for store merging pass yet) code sequences that can > be handled by (int32) __builtin_bswap64 (arg), i.e. where we have > 0x05060708 n->n with 64-bit non-mem

[PATCH] tree-optimization/79334 - avoid PRE of possibly trapping array-ref

This replicates tree-eh.c in_array_bound_p into VNs vn_reference_may_trap to fix hoisting of a possibly trapping ARRAY_REF across a call that might not return. Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed. 2021-08-23 Richard Biener PR tree-optimization/79334 * t

RE: [PATCH] arm: Fix __arm_vctp16q return type in arm_mve.h

> -Original Message- > From: Christophe LYON > Sent: 23 August 2021 10:41 > To: Kyrylo Tkachov > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [PATCH] arm: Fix __arm_vctp16q return type in arm_mve.h > > > On 23/08/2021 11:30, Kyrylo Tkachov wrote: > > > >> -Original Message- > >>

Re: [PATCH] analyzer: Fix PR analyzer/101980

> On 23-Aug-2021, at 2:20 PM, Martin Liška wrote: > > On 8/23/21 10:10, Martin Liška wrote: >> On 8/20/21 18:47, David Malcolm via Gcc-patches wrote: >>> On Fri, 2021-08-20 at 21:55 +0530, Ankur Saini wrote: The patch fixes the test failures introduced by : aef703cf982072427e74

Re: [PATCH] analyzer: Fix PR analyzer/101980

update looks like the problem was with test itself, apparently Deja is quite strict when it comes to spaces and didn’t read the “dg-“ directive on line 72 as there wasn’t an extra space between the statement and the closing brace. Adding it seems to fix the issue - - - diff --git a/gcc/tes

Re: [PATCH] analyzer: Fix PR analyzer/101980

On 8/23/21 13:04, Ankur Saini wrote: On 23-Aug-2021, at 2:20 PM, Martin Liška wrote: On 8/23/21 10:10, Martin Liška wrote: On 8/20/21 18:47, David Malcolm via Gcc-patches wrote: On Fri, 2021-08-20 at 21:55 +0530, Ankur Saini wrote: The patch fixes the test failures introduced by : aef703

Re: [PATCH] analyzer: Fix PR analyzer/101980

> On 23-Aug-2021, at 5:00 PM, Martin Liška wrote: > > On 8/23/21 13:04, Ankur Saini wrote: >>> On 23-Aug-2021, at 2:20 PM, Martin Liška wrote: >>> >>> On 8/23/21 10:10, Martin Liška wrote: On 8/20/21 18:47, David Malcolm via Gcc-patches wrote: > On Fri, 2021-08-20 at 21:55 +0530, An

Re: [PATCH] IPA: MODREF should skip EAF_* flags for indirect calls

Hi, > > Why does it "punish" -fno-ipa-pta? It merely "punishes" modref of > no longer claiming that we do not alter the instruction stream pointed > to by a->foo, sth that shouldn't be very common. For example struct a { void (*foo)(); void *bar; } fn(struct a *a) { a->foo(); } With Mari

Re: [PATCH] arm: Fix __arm_vctp16q return type in arm_mve.h

On 23/08/2021 12:10, Kyrylo Tkachov wrote: -Original Message- From: Christophe LYON Sent: 23 August 2021 10:41 To: Kyrylo Tkachov Cc: gcc-patches@gcc.gnu.org Subject: Re: [PATCH] arm: Fix __arm_vctp16q return type in arm_mve.h On 23/08/2021 11:30, Kyrylo Tkachov wrote: -Origi

Re: [PATCH] Disable slp in loop vectorizer when cost model is very-cheap.

liuhongt writes: > Performance impact for the commit with option: > -march=x86-64 -O2 -ftree-vectorize -fvect-cost-model=very-cheap > > SPEC2017 fprate > 503.bwaves_rBuildSame > 507.cactuBSSN_r -0.04 > 508.namd_r 0.14 > 510.parest_r-0.54 > 511.povray_r

[Patch] Fortran/OpenMP: strict modifier on grainsize/num_tasks + duplicate errors (was: [committed] openmp: Add support for strict modifier on grainsize/num_tasks clauses)

Hi Jakub, hi all, On 23.08.21 10:25, Jakub Jelinek wrote: The following patch implements it for C and C++. The attached patch now adds Fortran support for it, which is a small change - the two testcases (in 4 files) are the converted C ones. Additionally, the previous diagnostic for duplicate

[PATCH] Fix scalar costing issue introduced by PR84512 fix.

This fixes double-scaling of the inner loop scalar cost caused by routing the scalar costs through the add_stmt_cost hook and using vect_body as the location. The issue makes almost every outer loop vectorization profitable. Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed. 2021-08-23

[PATCH] Remove --param vect-inner-loop-cost-factor

This removes --param vect-inner-loop-cost-factor in favor of looking at the basic block counts of the outer vs. the inner loop header when they are comparable and otherwise just assumes a single inner iteration which is conservative on the side of not vectorizing. Bootstrap and regtest running on

Re: [PATCH] IPA: MODREF should skip EAF_* flags for indirect calls

On Mon, Aug 23, 2021 at 2:02 PM Jan Hubicka wrote: > > Hi, > > > > Why does it "punish" -fno-ipa-pta? It merely "punishes" modref of > > no longer claiming that we do not alter the instruction stream pointed > > to by a->foo, sth that shouldn't be very common. > > For example > struct a { > voi

Re: [Patch] Fortran/OpenMP: strict modifier on grainsize/num_tasks + duplicate errors (was: [committed] openmp: Add support for strict modifier on grainsize/num_tasks clauses)

On Mon, Aug 23, 2021 at 02:14:46PM +0200, Tobias Burnus wrote: > --- a/gcc/fortran/gfortran.h > +++ b/gcc/fortran/gfortran.h > @@ -1490,7 +1490,7 @@ typedef struct gfc_omp_clauses >unsigned inbranch:1, notinbranch:1, nogroup:1; >unsigned sched_simd:1, sched_monotonic:1, sched_nonmonotonic:1

[PATCH v2] x86: Allow CONST_VECTOR for vector load in combine

On Mon, Aug 23, 2021 at 03:23:26PM +0800, Hongtao Liu wrote: > On Sun, Aug 22, 2021 at 8:54 PM H.J. Lu via Gcc-patches > wrote: > > > > In vetor move pattern, replace nonimmediate_or_sse_const_operand with > > nonimmediate_or_sse_const_vector_operand to allow vector load from > > non-uniform CONST

Re: [Patch] Fortran/OpenMP: strict modifier on grainsize/num_tasks + duplicate errors (was: [committed] openmp: Add support for strict modifier on grainsize/num_tasks clauses)

On 23.08.21 14:53, Jakub Jelinek wrote: On Mon, Aug 23, 2021 at 02:14:46PM +0200, Tobias Burnus wrote: + unsigned capture:1, grainsize_strict, num_tasks_strict; Missing :1 twice. Fixed. Well spotted! Otherwise LGTM, though maybe it would be better to commit separately the change to handle

[PATCH][pushed] docs: Fix -mpic-data-is-text-relative option placement.

Obvious fix. Martin gcc/ChangeLog: * doc/invoke.texi: Put the option out of -mxl-mode-app-model table. --- gcc/doc/invoke.texi | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index d8a6b0b60c9..c057cc1e4

Re: [x86_64 PATCH] Tweak -Os costs for scalar-to-vector pass.

On Fri, Aug 20, 2021 at 9:55 PM Roger Sayle wrote: > > > Hi Richard, > > Benchmarking this patch using CSiBE on x86_64-pc-linux-gnu with -Os -m32 > saves 2432 bytes. > Of the 893 tests, 34 have size differences, 30 are improvements, 4 are > regressions (of a few bytes). > > > Also I'm missing a

Re: [committed] libstdc++: Skip filesystem tests that depend on permissions [PR90787]

On 20/08/21 15:16 +0100, Jonathan Wakely wrote: Tests that depend on filesystem permissions FAIL if run on Windows or as root. Add a helper function to detect those cases, so the tests can skip those checks gracefully. Signed-off-by: Jonathan Wakely libstdc++-v3/ChangeLog: PR libstdc+

[committed] libstdc++: Use __builtin_expect in __dynamic_cast

The null pointer check is never needed for correct code, only to gracefully handle undefined cases. Add __builtin_expect to be sure that we don't pessimize the valid uses. libstdc++-v3/ChangeLog: * libsupc++/dyncast.cc (__dynamic_cast): Add __builtin_expect to precondition check.

Re: [patch][version 6] add -ftrivial-auto-var-init and variable attribute "uninitialized" to gcc

On Thu, 19 Aug 2021, Qing Zhao wrote: > > > > On Aug 19, 2021, at 4:00 AM, Richard Biener wrote: > > > > On Wed, 18 Aug 2021, Qing Zhao wrote: > > > >> > >> > >>> On Aug 18, 2021, at 2:15 AM, Richard Biener wrote: > >>> > >>> On Tue, 17 Aug 2021, Qing Zhao wrote: > >>> > > >

[PATCH] ipa/97565 - fix IPA PTA body availability check

Looks like the existing check using has_gimple_body_p isn't enough at LTRANS time but I need to check in_other_partition as well. Bootstrapped on x86_64-unknown-linux-gnu, testing in progress. OK? Thanks, Richard. 2021-08-23 Richard Biener PR ipa/97565 * tree-ssa-structalias

Re: [PATCH] ipa/97565 - fix IPA PTA body availability check

> Looks like the existing check using has_gimple_body_p isn't enough > at LTRANS time but I need to check in_other_partition as well. > > Bootstrapped on x86_64-unknown-linux-gnu, testing in progress. > > OK? > > Thanks, > Richard. > > 2021-08-23 Richard Biener > > PR ipa/97565 >

Re: [ping] Re-unify 'omp_build_component_ref' and 'oacc_build_component_ref'

Hi! On 2021-08-20T09:51:36+0200, Richard Biener wrote: > On Thu, Aug 19, 2021 at 10:14 PM Thomas Schwinge > wrote: >> Richard, maybe you have an opinion here, in particular about my >> "SLP vectorizer" comment below? Please see >> <87r1f2puss.fsf@euler.schwinge.homeip.net">http://mid.mail-archi

[PATCH][v2] Remove --param vect-inner-loop-cost-factor

This removes --param vect-inner-loop-cost-factor in favor of looking at the estimated number of iterations of the inner loop when available and otherwise just assumes a single inner iteration which is conservative on the side of not vectorizing. The alternative is to retain the --param for exactly

[Committed] Restore build on !TARGET_TRULY_NOOP_TRUNCATION targets

My sincere apologies to everyone, but especially Andrew Pinski who warned me in advance that TRULY_NOOP_TRUNCATION results in different code paths/optimizations on some targets. This restores the build on nvptx-none (and presumably others) where mysteriously (truncate:QI (reg:QI)) fails to be simp

[committed] Add tailcall/sibcall support to the H8

Nothing really exciting here, just a small time/speed optimization by supporting tailcalls/sibcalls. We reject indirect calls as well as calls when either the caller or callee is special.  It may be possible (even desirable) to sibcall those, but I don't have any real way to test that, so to

Re: [PATCH][v2] Remove --param vect-inner-loop-cost-factor

> > Any strong opinions? > > Richard. > > 2021-08-23 Richard Biener > > * doc/invoke.texi (vect-inner-loop-cost-factor): Remove > documentation. > * params.opt (--param vect-inner-loop-cost-factor): Remove. > * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): >

Allow matching Intel MIC in OpenMP 'declare variant'

Hi! See the attached "Allow matching Intel MIC in OpenMP 'declare variant'". OK to push, or how should this be done better? Grüße Thomas - Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstraße 201, 80634 München; Gesellschaft mit beschränkter Haftung; Geschäftsfü

Re: Allow matching Intel MIC in OpenMP 'declare variant'

On Mon, Aug 23, 2021 at 04:58:43PM +0200, Thomas Schwinge wrote: > Hi! > > See the attached "Allow matching Intel MIC in OpenMP 'declare variant'". > OK to push, or how should this be done better? LGTM. > >From 33e5efd0b9c4b1a0712b3dbe103e3a295c765ab4 Mon Sep 17 00:00:00 2001 > From: Thomas Schw

[committed] libstdc++: Add default template argument to basic_istream_view

The standard shows this default template argument in the synopsis, but it was missing in libstdc++. libstdc++-v3/ChangeLog: * include/std/ranges (basic_istream_view): Add default template argument. * testsuite/std/ranges/istream_view.cc: Check it. Tested x86_64-linux. Co

Add 'libgomp.c/address-space-1.c' (was: [ping] Re-unify 'omp_build_component_ref' and 'oacc_build_component_ref')

Hi! On 2021-08-20T16:49:25+0200, Jakub Jelinek wrote: >> --- /dev/null >> +++ b/libgomp/testsuite/libgomp.c/address-space-1.c >> @@ -0,0 +1,24 @@ >> +/* Verify OMP instances of variables with address space. */ >> + >> +/* { dg-do run { target i?86-*-* x86_64-*-* } } */ >> +/* { dg-require-effect

Avoid redundant entries in modref's access lists

Hi, in PR101296 Richard noticed that modref is giving up on analysis in milc by hitting --param=modref-max-accesses limit. While cleaning up original modref patch I removed code that tried to do smart things while merging accesses because it had bugs and wanted to reimplement it later which I late

Re: [pushed] libiberty, Darwin : Fix simple-object LTO table for cross-endian case.

Hi, > On 23 Aug 2021, at 09:07, Martin Liška wrote: > > On 8/18/21 20:37, Iain Sandoe wrote: >> For mach-o, we encapsulate streamed IR for LTO in three special >> sections with a table that describes their entries. The table is expected >> to be written with native endianness for the target, b

Re: [Patch v2] C, C++, Fortran, OpenMP: Add support for device-modifiers for 'omp target device'

On Fri, Aug 20, 2021 at 09:18:32PM +0200, Marcel Vollweiler wrote: > --- a/gcc/c/c-parser.c > +++ b/gcc/c/c-parser.c > @@ -15864,37 +15864,81 @@ c_parser_omp_clause_map (c_parser *parser, tree > list) > } > > /* OpenMP 4.0: > - device ( expression ) */ > +>>>

[committed] analyzer: fix uninit false positive on overlapping bindings

Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. Pushed to trunk as 4892b3087412e6afc261cc9977ef4b54c799660f. gcc/analyzer/ChangeLog: * store.cc (bit_range::intersects_p): New overload. (bit_range::operator-): New. (binding_cluster::maybe_get_compound_binding)

[committed] analyzer: assume that POINTER_PLUS_EXPR of non-NULL is non-NULL [PR101962]

Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. Pushed to trunk as r12-3094-ge82e0f149b0aba660896ea9aa12c442c07a16d12. gcc/analyzer/ChangeLog: PR analyzer/101962 * region-model.cc (region_model::eval_condition_without_cm): Refactor comparison against zero, ad

[committed] analyzer: fix ICE when failing to reconstruct a fn ptr [PR101837]

Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. Pushed to trunk as commit r12-3095-g4b821c7efbe12cfbb129a88541108b39058da526. gcc/analyzer/ChangeLog: PR analyzer/101837 * analyzer.cc (maybe_reconstruct_from_def_stmt): Bail if fn is NULL, and assert that it's

[committed] analyzer: fix ICE with NULL change.m_expr [PR101875]

Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. Pushed to trunk as r12-3096-g3d654ca3f421ff9646470d312097602037176352. gcc/analyzer/ChangeLog: PR analyzer/101875 * sm-file.cc (file_diagnostic::describe_state_change): Handle change.m_expr being NULL. gcc/test

[PATCH v3 3/6] rs6000: Simplify some SSE4.1 "test" intrinsics

Copy some simple redirections from i386 , for: - _mm_test_all_zeros - _mm_test_all_ones - _mm_test_mix_ones_zeros 2021-08-20 Paul A. Clarke gcc * config/rs6000/smmintrin.h (_mm_test_all_zeros, _mm_test_all_ones, _mm_test_mix_ones_zeros): Replace. --- v3: No change. v2: - Remove

[PATCH v3 6/6] rs6000: Guard some x86 intrinsics implementations

Some compatibility implementations of x86 intrinsics include Power intrinsics which require POWER8. Guard them. emmintrin.h: - _mm_cmpord_pd: Remove code which was ostensibly for pre-POWER8, but which indeed depended on POWER8 (vec_cmpgt(v2du)/vcmpgtud). The "POWER8" version works fine on pre

[PATCH v3 0/6] rs6000: Support more SSE4 intrinsics

v3: Add "nmmintrin.h". _mm_cmpgt_epi64 is part of SSE4.2 and users will expect to be able to include "nmmintrin.h", even though "nmmintrin.h" just includes "smmintrin.h" where all of the SSE4.2 implementations actually appear. Only patch 5/6 changed from v2. Tested ppc64le (POWER9) and ppc64/32 (

[PATCH v3 2/6] rs6000: Support SSE4.1 "min" and "max" intrinsics

Function signatures and decorations match gcc/config/i386/smmintrin.h. Also, copy tests for _mm_min_epi8, _mm_min_epu16, _mm_min_epi32, _mm_min_epu32, _mm_max_epi8, _mm_max_epu16, _mm_max_epi32, _mm_max_epu32 from gcc/testsuite/gcc.target/i386. sse4_1-pmaxsb.c and sse4_1-pminsb.c were modified fr

[PATCH v3 4/6] rs6000: Support SSE4.1 "cvt" intrinsics

Function signatures and decorations match gcc/config/i386/smmintrin.h. Also, copy tests for: - _mm_cvtepi8_epi16, _mm_cvtepi8_epi32, _mm_cvtepi8_epi64 - _mm_cvtepi16_epi32, _mm_cvtepi16_epi64 - _mm_cvtepi32_epi64, - _mm_cvtepu8_epi16, _mm_cvtepu8_epi32, _mm_cvtepu8_epi64 - _mm_cvtepu16_epi32, _mm_

[PATCH v3 5/6] rs6000: Support more SSE4 "cmp", "mul", "pack" intrinsics

Function signatures and decorations match gcc/config/i386/smmintrin.h. Also, copy tests for: - _mm_cmpeq_epi64 - _mm_mullo_epi32, _mm_mul_epi32 - _mm_packus_epi32 - _mm_cmpgt_epi64 (SSE4.2) from gcc/testsuite/gcc.target/i386. 2021-08-23 Paul A. Clarke gcc * config/rs6000/smmintrin.h

[PATCH v3 1/6] rs6000: Support SSE4.1 "round" intrinsics

Suppress exceptions (when specified), by saving, manipulating, and restoring the FPSCR. Similarly, save, set, and restore the floating-point rounding mode when required. No attempt is made to optimize writing the FPSCR (by checking if the new value would be the same), other than using lighter wei

Re: [PATCH] Fold sign of LSHIFT_EXPR to eliminate no-op conversions.

On Mon, Aug 23, 2021 at 01:25:13AM +0100, Roger Sayle wrote: > This patch has been tested on x86_64-pc-linux-gnu with "make bootstrap" > and "make -k check" with no new failures. Ok for mainline? > > > 2021-08-23 Roger Sayle > > gcc/ChangeLog > * match.pd (shift transformations): Chang

Re: [PATCH] Fold sign of LSHIFT_EXPR to eliminate no-op conversions.

On Mon, Aug 23, 2021 at 1:09 PM Jakub Jelinek via Gcc-patches wrote: > > On Mon, Aug 23, 2021 at 01:25:13AM +0100, Roger Sayle wrote: > > This patch has been tested on x86_64-pc-linux-gnu with "make bootstrap" > > and "make -k check" with no new failures. Ok for mainline? > > > > > > 2021-08-23

[PATCH] c++: Fix up value initialization of structs with zero width bitfields [PR102019]

Hi! The removal of remove_zero_width_bit_fields, in addition to triggering some ABI issues that need solving anyway (ABI incompatibility between C and C++) also resulted in UB inside of gcc, we now call build_zero_init which calls build_int_cst on an integral type with TYPE_PRECISION of 0. Fixed

DWARF for extern variable

Hello, What is the expected DWARF for extern variable in the following cases? I am seeing that the DWARF generated is different with gcc8.4.1 vs gcc-trunk. Testcase 1 -- extern const char a[]; int foo() { return a != 0; } Testcase 1 Behavior - - gcc-trunk has _n

Re: [PATCH 07/34] rs6000: Add power8-vector builtins

On Thu, Jul 29, 2021 at 08:30:54AM -0500, Bill Schmidt wrote: > * config/rs6000/rs6000-builtin-new.def: Add power8-vector stanza. I looked it over and didn't see errors. Okay for trunk. Thanks! Segher

Re: [PATCH 08/34] rs6000: Add Power9 builtins

On Thu, Jul 29, 2021 at 08:30:55AM -0500, Bill Schmidt wrote: > 2021-06-15 Bill Schmidt > * config/rs6000/rs6000-builtin-new.def: Add power9-vector, power9, > and power9-64 stanzas. > +; These things need some review to see whether they really require > +; MASK_POWERPC64. For xsxex

Re: [PATCH 09/34] rs6000: Add more type nodes to support builtin processing

On Thu, Jul 29, 2021 at 08:30:56AM -0500, Bill Schmidt wrote: > * config/rs6000/rs6000-call.c (rs6000_init_builtins): Initialize > various pointer type nodes. > * config/rs6000/rs6000.h (rs6000_builtin_type_index): Add enum > values for various pointer types. > (ptr_V1

[PATCH, rs6000, committed] Fix AIX bootstrap (don't call asprintf)

Hi, My recent commit broke bootstrap for AIX because I was calling asprintf without pulling it in from libiberty.h.  Unfortunately, there is a name collision between libiberty.h and string.h that I don't immediately know how to resolve, so rather than fight it I've just reverted to using mall

[committed] analyzer: rewrite of switch handling

When investigating false positives on the Linux kernel from -Wanalyzer-use-of-uninitialized-value, I noticed that the existing implementation of switch statements in the analyzer is broken. Specifically, the existing implementation assumes a 1:1 association between CFG out-edges from the basic blo

[PATCH] Reset PHI base0 flag if it's clear in any argument [PR101977]

When determining the properties of objects referenced by a PHI's arguments, compute_objsize() has logic to filter out null pointers. It also has special logic that tries to deal with arguments that refer to the same object (as opposed to different objects). A bug in the former prevents the functi

Re: [PATCH 10/34] rs6000: Add Power10 builtins

On Thu, Jul 29, 2021 at 08:30:57AM -0500, Bill Schmidt wrote: > * config/rs6000/rs6000-builtin-new.def: Add power10 and power10-64 > stanzas. > + void __builtin_altivec_tr_stxvrbx (vsq, signed long, signed char *); > +TR_STXVRBX vsx_stxvrbx {stvec} > + > + void __builtin_altivec_

[PATCH] x86: Broadcast from integer to a pseudo vector register

Broadcast from integer to a pseudo vector register instead of a hard vector register to allow LRA to remove redundant move instruction after broadcast. gcc/ PR target/102021 * config/i386/i386-expand.c (ix86_expand_vector_move): Broadcast from integer to a pseudo vector re

Re: [PATCH] x86: Broadcast from integer to a pseudo vector register

On Tue, Aug 24, 2021 at 9:01 AM H.J. Lu via Gcc-patches wrote: > > Broadcast from integer to a pseudo vector register instead of a hard > vector register to allow LRA to remove redundant move instruction after > broadcast. > > gcc/ > > PR target/102021 > * config/i386/i386-expand.c

[PATCH] [i386] Optimize (a & b) | (c & ~b) to vpternlog instruction.

Also optimize below 3 forms to vpternlog, op1, op2, op3 are register_operand or unary_p as (not reg) A: (any_logic (any_logic op1 op2) op3) B: (any_logic (any_logic op1 op2) (any_logic op3 op4)) op3/op4 should be equal to op1/op2 C: (any_logic (any_logic (any_logic:op1 op2) op3) op4) op3/op4 shoul

Re: [PATCH] x86: Broadcast from integer to a pseudo vector register

On Mon, Aug 23, 2021 at 6:17 PM Hongtao Liu wrote: > > On Tue, Aug 24, 2021 at 9:01 AM H.J. Lu via Gcc-patches > wrote: > > > > Broadcast from integer to a pseudo vector register instead of a hard > > vector register to allow LRA to remove redundant move instruction after > > broadcast. > > > > g

Re: [PATCH v2] x86: Allow CONST_VECTOR for vector load in combine

On Mon, Aug 23, 2021 at 9:14 PM H.J. Lu wrote: > > On Mon, Aug 23, 2021 at 03:23:26PM +0800, Hongtao Liu wrote: > > On Sun, Aug 22, 2021 at 8:54 PM H.J. Lu via Gcc-patches > > wrote: > > > > > > In vetor move pattern, replace nonimmediate_or_sse_const_operand with > > > nonimmediate_or_sse_const_

Re: [PATCH] x86: Broadcast from integer to a pseudo vector register

On Tue, Aug 24, 2021 at 9:43 AM H.J. Lu wrote: > > On Mon, Aug 23, 2021 at 6:17 PM Hongtao Liu wrote: > > > > On Tue, Aug 24, 2021 at 9:01 AM H.J. Lu via Gcc-patches > > wrote: > > > > > > Broadcast from integer to a pseudo vector register instead of a hard > > > vector register to allow LRA to

Re: [PATCH v2] x86: Allow CONST_VECTOR for vector load in combine

On Mon, Aug 23, 2021 at 6:52 PM Hongtao Liu wrote: > > On Mon, Aug 23, 2021 at 9:14 PM H.J. Lu wrote: > > > > On Mon, Aug 23, 2021 at 03:23:26PM +0800, Hongtao Liu wrote: > > > On Sun, Aug 22, 2021 at 8:54 PM H.J. Lu via Gcc-patches > > > wrote: > > > > > > > > In vetor move pattern, replace non

[Committed] PR middle-end/102029: Stricter typing in LSHIFT_EXPR sign folding.

My sincere apologies to everyone (again). As diagnosed by Jakub Jelinek, my recent patch to fold the signedness of LSHIFT_EXPR needs to be careful not to attempt transforming a left shift in an integer type into an invalid left shift of a pointer type. This patch has been committed as obvious, af

RE: [x86_64 PATCH] Tweak -Os costs for scalar-to-vector pass.

Many thanks. Here’s the version that I've committed with a ??? comment as requested (even a no-op else clause to make the logic easier to understand). 2021-08-24 Roger Sayle Richard Biener gcc/ChangeLog * config/i386/i386-features.c (compute_convert_gain): Provide

Re: [PATCH][v2] Remove --param vect-inner-loop-cost-factor

Hi Richi, on 2021/8/23 下午10:33, Richard Biener via Gcc-patches wrote: > This removes --param vect-inner-loop-cost-factor in favor of looking > at the estimated number of iterations of the inner loop > when available and otherwise just assumes a single inner > iteration which is conservative on the

Re: [llvm-dev] [PATCH] Add optional _Float16 support

On Thu, Jul 29, 2021 at 9:40 AM H.J. Lu wrote: > On Tue, Jul 13, 2021 at 9:24 AM H.J. Lu wrote: > > > > On Tue, Jul 13, 2021 at 8:41 AM Joseph Myers > wrote: > > > > > > On Tue, 13 Jul 2021, H.J. Lu wrote: > > > > > > > On Mon, Jul 12, 2021 at 8:59 PM Wang, Pengfei < > pengfei.w...@intel.com> w

[PATCH] Fix a few problems with download_prerequisites.

From: Andrew Pinski There are a few problems with download_prerequisites are described in PR 82704. The first is on busy-box version of shasum and md5sum the extended option --check don't exist so just use -c. The second issue is the code for which shasum program to use is included twice and is

Re: [PATCH][v2] Remove --param vect-inner-loop-cost-factor

On Tue, 24 Aug 2021, Kewen.Lin wrote: > Hi Richi, > > on 2021/8/23 ??10:33, Richard Biener via Gcc-patches wrote: > > This removes --param vect-inner-loop-cost-factor in favor of looking > > at the estimated number of iterations of the inner loop > > when available and otherwise just assumes a si

Re: [patch, libgfortran] Further fixes for GFC/CFI descriptor conversions

Hi Sandra, On 19.08.21 05:57, Sandra Loosemore wrote: This patch addresses several bugs in converting from GFC to CFI descriptors and vice versa. [...] The root of all the problems addressed here is that GFC descriptors contain incomplete information; in particular, they only encode the size of