This relaxes the condition for the match.pd pattern doing vector ctor
element extracts to not require type identity but only size equality.
Since we vectorize pointer data as unsigned integer data such mismatches
have to be tolerated to optimize scalar code uses of vector results.
Bootstrapped and
On Tue, Apr 27, 2021 at 12:18 AM Levy Hsu wrote:
>
> From: LevyHsu
>
> Added implementation for builtin overflow detection, new patterns are listed
> below.
>
> ---
> Addition:
>
> signed addition (SImode with RV32 || DImode with RV64):
On Tue, Apr 27, 2021 at 2:46 AM Martin Sebor via Gcc-patches
wrote:
>
> PR 90904 notes that auto_vec is unsafe to copy and assign because
> the class manages its own memory but doesn't define (or delete)
> either special function. Since I first ran into the problem,
> auto_vec has grown a move ct
Hi Iain,
> @Martin
> I am not sure from the commit messages for this series whether my change
> below is complete (it is enough to make bootstrap succeed so I have
> applied it anyway).
>
> you mention TARGET_* but that is too general - however i386/darwin.h does
> have some other ISA-specific TAR
Rainer Orth wrote:
Hi Iain,
@Martin
I am not sure from the commit messages for this series whether my change
below is complete (it is enough to make bootstrap succeed so I have
applied it anyway).
you mention TARGET_* but that is too general - however i386/darwin.h does
have some other ISA-s
Hi Iain,
>> cc1: sorry, unimplemented: 64-bit mode not compiled in
>>
>> I haven't tried investigating what's going on here.
>
> PR100269, I can’t exactly see the fix either.
ah, thanks: I'd searched for the error message above in bugzilla, but
somehow this PR isn't found.
Rainer
--
--
On Thu, Apr 1, 2021 at 1:03 AM Victor Tong via Gcc-patches
wrote:
>
> Hello,
>
> This patch fixes PR tree-optimization/95176. A new pattern in match.pd was
> added to transform "a * (b / a)" --> "b - (b % a)". A new test case was also
> added to cover this scenario.
>
> The new pattern interfere
PRE has code to adjust TBAA behavior for refs that expects the base
operation code to match. The testcase shows a case where we have
a VAR_DECL vs. a MEM_REF so add code to give up in such cases.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed to trunk
sofar.
2021-04-27 Richard Bien
The bug points out several malformed dg directives, the following
fixes the obvious ones where the testcases keep working after the
change.
Tested on x86_64-unknown-linux-gnu, pushed.
2021-04-27 Richard Biener
PR testsuite/100272
* g++.dg/diagnostic/ptrtomem1.C: Fix dg directi
This re-enables PRE and fixes the malformed dg directive pointed
out in the PR. It all works as desired and I forgot why I
disabled this in the past.
Tested on x86_64-unknown-linux-gnu, pushed.
2021-04-27 Richard Biener
PR testsuite/100272
* gcc.dg/tree-ssa/predcom-1.c: Re-en
Pushed.
---
htdocs/gcc-11/changes.html | 9 +
1 file changed, 9 insertions(+)
diff --git a/htdocs/gcc-11/changes.html b/htdocs/gcc-11/changes.html
index 5090ec43..a74e188e 100644
--- a/htdocs/gcc-11/changes.html
+++ b/htdocs/gcc-11/changes.html
@@ -167,6 +167,15 @@ You may also want to
Hi:
As described in the subject line, this patch is about to do the
below transformation.
- vpcmpeqd%ymm3, %ymm3, %ymm3
- vpandn %ymm3, %ymm2, %ymm2
- vpblendvb %ymm2, %ymm1, %ymm0, %ymm0
+ vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
Bootstrapped and regt
On Tue, Apr 27, 2021 at 12:18:44AM +0200, Eric Botcazou wrote:
> > At least sizetype is for GIMPLE compatible with size_t or unsigned long (or
> > whatever unsigned type has the same precision), so this looks wrong to me.
>
> It's for bitsizetype here, as it's a conversion from bits into bytes, so
Hi Gerald, hi all,
On 26.04.21 21:04, Gerald Pfeifer wrote:
On Mon, 26 Apr 2021, Tobias Burnus wrote:
I think for OpenMP, the sentence will be
modified several times before the release :-)
Can I take this as a promise? :-)
Given that Stage1 has just begun and several patches are
either waiti
Just saw, these are not mentioned on the release notes. Ok to document these?
Matthias
--- a/htdocs/gcc-11/changes.html
+++ b/htdocs/gcc-11/changes.html
@@ -690,6 +690,10 @@ You may also want to check out our
GCC now supports AMD CPUs based on the znver3 core
via -march=znver3.
+ GCC
This is based on Jakub's patch* which is used with many distributions – and is
has
to be maintained by all of them; otherwise issues like lp #1878760 might creep
in,
as discussed in #gcc yesterday. - As I am a huge fan of reducing code
duplication
and local patches, I propose to add it to GCC p
Hi,
I have noticed that some entries was incorrectly added to C familly
while they are general improvements and I also think the option renaming
should go to canevats since renaming is hardly an improvement per se.
Since the change is rather obvious I plan to commit it after lunch so we
do not mis
Tobias pointed out that many of our mirrors are listed with the FTP
protocol (or FTP host name) when browers like Chrome or Firefox are
currently removing support for FTP.
This is the first of several changes I'll be making to adjust our
mirror list.
Everyone is welcome to make such changes (w/
Spotted working on our mirror list; pushed.
Gerald
This was already disabled (commented out), and apparently has been
completely deprovisioned since then.
---
htdocs/mirrors.html | 3 ---
1 file changed, 3 deletions(-)
diff --git a/htdocs/mirrors.html b/htdocs/mirrors.html
index 75ab56e0..f2f4
On Tue, 27 Apr 2021, Tobias Burnus wrote:
> Thanks for the suggestions.
You're always welcome!
> PS: When looking at https://gcc.gnu.org/mirrors.html, I wondered whether
> 3 of 5 http mirrors links could move to https and given the trend that
> FTP is phased out (on the server side and in the web
On Tue, Apr 13, 2021 at 3:50 PM Richard Biener wrote:
>
> This adds disambiguation of the access size vs. the decl size
> in the pointer based vs. decl based disambiguator. We have
> a TBAA based check like this already but that's fend off when
> seeing alias-sets of zero or when -fno-strict-alia
Hi Joseph,
This isn't an objection, since upgrading auto* for the toolchain can be
complicated, but note that AC_PROG_CC_C99 is obsolete in Autoconf 2.70
Ah - in which case changing to an about-to-be-obsolete macro is probably
a bad idea.
and instead AC_PROG_CC enables C11 mode if support
* Matthias Klose:
> Just saw, these are not mentioned on the release notes. Ok to document these?
>
> Matthias
>
> --- a/htdocs/gcc-11/changes.html
> +++ b/htdocs/gcc-11/changes.html
> @@ -690,6 +690,10 @@ You may also want to check out our
>GCC now supports AMD CPUs based on the znver3 core
>
Adding +nosve is more robust than checking for command-line arguments,
since SVE can be enabled by default or indirectly via other options.
Tested on aarch64-linux-gnu & pushed.
Richard
gcc/testsuite/
* gcc.target/aarch64/simd/ssra.c: Use +nosve
* gcc.target/aarch64/simd/usra.c:
Even though "SVE type" and "SVE sizeless type" are marked as
affecting type identity, the middle end doesn't truly believe
it unless we also handle them in comp_type_attributes.
Tested on aarch64-linux-gnu. Pushed to trunk so far, but I'll backport
to GCC 11 too. The GCC 10 version will look dif
arm_compute_save_core_reg_mask contains UB in that the saved PIC
register number is used to create a bit mask. However, for some target
options this register is undefined and we end up with a shift of ~0.
On native compilations this is benign since the shift will still be
large enough to move the
When an iterator cannot be expanded, it is helpful to see the expanded
name which is causing problems. It would be better to also print the
current iterator value (which couldn't match), but I couldn't find
how.
2021-03-01 Christophe Lyon
gcc/
* genflags.c (gen_insn): Print fa
Vector right shifts by immediate use vshr, while right shifts by
vectors instead use vneg and vshl.
This patch adds the corresponding scan-assembler-times that were
missing.
2021-04-22 Christophe Lyon
gcc/testsuite/
* gcc.target/arm/simd/mve-vshr.c: Add more scan-assembler-tim
Use a template macro to factorize the existing test functions.
This patch also adds a version to check subtraction with __fp16 type.
2021-04-26 Christophe Lyon
gcc/testsuite/
* gcc.target/arm/simd/mve-vsub_1.c: Factorize and add __fp16 test.
---
gcc/testsuite/gcc.target/arm/s
Support for vadd has been present for a while, but it was lacking a
test.
2021-04-22 Christophe Lyon
gcc/testsuite/
* gcc.target/arm/simd/mve-vadd-1.c: New.
---
gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c | 43 ++
1 file changed, 43 insertions(+)
cr
On Tue, 27 Apr 2021 at 17:02, Christophe Lyon via Gcc-patches
wrote:
>
> Support for vadd has been present for a while, but it was lacking a
> test.
>
> 2021-04-22 Christophe Lyon
>
> gcc/testsuite/
> * gcc.target/arm/simd/mve-vadd-1.c: New.
> ---
> gcc/testsuite/gcc.target/arm
On Tue, 27 Apr 2021 at 14:04, Prathamesh Kulkarni
wrote:
>
> On Tue, 27 Apr 2021 at 17:02, Christophe Lyon via Gcc-patches
> wrote:
> >
> > Support for vadd has been present for a while, but it was lacking a
> > test.
> >
> > 2021-04-22 Christophe Lyon
> >
> > gcc/testsuite/
> >
For the testcase in the PR the main SRA pass is unable to do some
important scalarizations because dead stores of addresses make
the candiate variables disqualified. The following patch adds
another DSE pass before SRA forming a DCE/DSE pair and moves the
DSE pass that is currently closely after S
This makes sure to remove unused locals and prune CLOBBERs after
the first scalar cleanup phase after IPA optimizations. On the
testcase in the PR this results in 8000 CLOBBERs removed which
in turn unleashes more DSE which otherwise hits its walking limit
of 256 too early on this testcase.
Boots
Hi!
The following testcase fails with -fcompare-debug. The problem is that
outgoing_edges_match behaves differently between -g0 and -g, if
some load/store with REG_EH_REGION is followed by DEBUG_INSNs, the
REG_EH_REGION check is not done, while when there are no DEBUG_INSNs, it is
done.
We alrea
On Tue, 27 Apr 2021, Jakub Jelinek wrote:
> Hi!
>
> The following testcase fails with -fcompare-debug. The problem is that
> outgoing_edges_match behaves differently between -g0 and -g, if
> some load/store with REG_EH_REGION is followed by DEBUG_INSNs, the
> REG_EH_REGION check is not done, whi
Hi,
PR 93385 reveals that if the user explicitely disables DCE, IPA-SRA
can leave behind statements which are useless because their results
are eventually not used but can have problematic side effects,
especially since their inputs are now bogus that useless parameters
were removed.
This patch f
Hi,
Whereas the previous patch fixed issues with code left behind after
IPA-SRA removed a parameter but only reset all affected debug bind
statements, this one updates them with expressions which can allow the
debugger to print the removed value - see the added test-case.
Even though I originally
Hi,
IPA-SRA fails to produce (very simple) edge summaries when a caller
cannot be cloned or its signature cannot be changed which makes it
less powerful for no good reason. This patch fixes that problem.
Bootstrapped, LTO-bootstrapped and tested on x86_64-linux. OK for trunk?
A common reason w
Hi!
The following testcase ICEs at -O0, because lower_vec_perm sees the
_1 = { 0, 0, 0, 0, 0, 0, 0, 0 };
_2 = VEC_COND_EXPR <_1, { -1, -1, -1, -1, -1, -1, -1, -1 }, { 0, 0, 0, 0, 0,
0, 0, 0 }>;
_3 = { 6, 0, 0, 0, 0, 0, 0, 0 };
_4 = VEC_PERM_EXPR <{ 0, 0, 0, 0, 0, 0, 0, 0 }, _2, _3>;
and a
On Tue, Apr 27, 2021 at 3:14 AM H.J. Lu wrote:
>
> Change a while loop in op_by_pieces_d::run to a do-while loop to prepare
> for offset adjusted operation for the remaining bytes on the last piece
> operation of a memory region.
OK.
Thanks,
Richard.
> PR middl-end/90773
> * exp
The overloaded operators for socket_base::message_flags should only be
defined when the message_flags type itself is defined. Rather than
duplicate the preprocessor conditional, this moves the operators into
the same scope as the type, defining them as hidden friends.
As well as fixing the bug, th
This improves the use of preprocessor conditionas to enable/disable
members of namespace net::ip according to what is supported by the
target. This fixes PR 100286 by ensuring that the to_string member
functions are always defined for the address_v4 and address_v6 classes.
On the other hand, the IP
libstdc++-v3/ChangeLog:
* include/experimental/internet (address_v6::bytes_type): Adjust
formatting.
(basic_endpoint): Define _M_is_v6() to put all checks for
AF_INET6 in one place.
(basic_endpoint::resize): Simplify.
(operator==(const tcp&, const tc
Ping
On 15/04/2021 15:39, Alex Coplan via Gcc-patches wrote:
> Hi all,
>
> The PR shows two ICEs with __sync_bool_compare_and_swap and
> -mcpu=cortex-m23 (equivalently, -march=armv8-m.base): one in LRA and one
> later on, after the CAS insn is split.
>
> The LRA ICE occurs because the
> @atomic_
Hi!
The following patch fixes UBs in the compiler when negativing
a CONST_INT containing HOST_WIDE_INT_MIN. I've changed the spots where
there wasn't an obvious earlier condition check or predicate that
would fail for such CONST_INTs.
Bootstrapped/regtested on aarch64-linux, ok for trunk?
2021-
OpenMP 5's iterator can be used for
- depend clause
- affinity clause
- mapping (unsupported and not touched)
(a) This patch add the iterator support to the Fortran FE
and adds support for it to the depend clause.
(b) It also adds a conforming stub implementation (parse & ignore in ME)
for 'af
On Tue, 27 Apr 2021, Jakub Jelinek wrote:
> Hi!
>
> The following testcase ICEs at -O0, because lower_vec_perm sees the
> _1 = { 0, 0, 0, 0, 0, 0, 0, 0 };
> _2 = VEC_COND_EXPR <_1, { -1, -1, -1, -1, -1, -1, -1, -1 }, { 0, 0, 0, 0,
> 0, 0, 0, 0 }>;
> _3 = { 6, 0, 0, 0, 0, 0, 0, 0 };
> _4
Jakub Jelinek writes:
> Hi!
>
> The following patch fixes UBs in the compiler when negativing
> a CONST_INT containing HOST_WIDE_INT_MIN. I've changed the spots where
> there wasn't an obvious earlier condition check or predicate that
> would fail for such CONST_INTs.
>
> Bootstrapped/regtested o
Hi Alex,
> -Original Message-
> From: Alex Coplan
> Sent: 27 April 2021 14:14
> To: gcc-patches@gcc.gnu.org
> Cc: ni...@redhat.com; Richard Earnshaw ;
> Ramana Radhakrishnan ; Kyrylo
> Tkachov
> Subject: Re: [PATCH] arm: Fix ICEs with compare-and-swap and -
> march=armv8-m.base [PR99977]
DSE performs a backwards walk over stmts removing stores but it
leaves removing resulting dead SSA defs to later passes. This
eats into its own alias walking budget if the removed stores kept
loads live. The following patch adds removal of trivially dead
SSA defs which helps in this situation and
Christophe Lyon via Gcc-patches writes:
> When an iterator cannot be expanded, it is helpful to see the expanded
> name which is causing problems. It would be better to also print the
> current iterator value (which couldn't match), but I couldn't find
> how.
>
> 2021-03-01 Christophe Lyon
>
>
On 4/27/21 1:58 AM, Richard Biener wrote:
On Tue, Apr 27, 2021 at 2:46 AM Martin Sebor via Gcc-patches
wrote:
PR 90904 notes that auto_vec is unsafe to copy and assign because
the class manages its own memory but doesn't define (or delete)
either special function. Since I first ran into the p
On Tue, Apr 27, 2021 at 3:59 PM Martin Sebor wrote:
>
> On 4/27/21 1:58 AM, Richard Biener wrote:
> > On Tue, Apr 27, 2021 at 2:46 AM Martin Sebor via Gcc-patches
> > wrote:
> >>
> >> PR 90904 notes that auto_vec is unsafe to copy and assign because
> >> the class manages its own memory but doesn
On 27/04/2021 14:16, Jakub Jelinek via Gcc-patches wrote:
Hi!
The following patch fixes UBs in the compiler when negativing
a CONST_INT containing HOST_WIDE_INT_MIN. I've changed the spots where
there wasn't an obvious earlier condition check or predicate that
would fail for such CONST_INTs.
On Tue, Apr 27, 2021 at 03:20:47PM +0100, Richard Earnshaw via Gcc-patches
wrote:
> > --- gcc/config/aarch64/aarch64.c.jj 2021-04-16 20:49:23.602579852 +0200
> > +++ gcc/config/aarch64/aarch64.c2021-04-26 16:40:46.835269671 +0200
> > @@ -10778,7 +10778,7 @@ aarch64_print_operand (FILE *f, rtx
Currently, the return type of this lambda is decltype(auto), so it ends
up returning a copy of _M_parent->_M_inner rather than a reference to it
when _S_ref_glvalue is false. Hence _M_inner and ranges::end(__inner_range)
are respectively an iterator and sentinel for different ranges, so
comparing
On 4/27/2021 5:32 AM, Christophe Lyon via Gcc-patches wrote:
When an iterator cannot be expanded, it is helpful to see the expanded
name which is causing problems. It would be better to also print the
current iterator value (which couldn't match), but I couldn't find
how.
2021-03-01 Christop
> On Apr 27, 2021, at 1:30 AM, Richard Biener wrote:
>
>>
>> equivalent in all respects. And if we were trying to make them
>> equivalent, we'd need to do much more than this.
>>
>> The same applies to the pattern case. If “x” is initialised to a pattern
>> that happens to point to a real
Now that VEC_COND_EXPR has normal unnested operands,
operation_could_trap_p can treat it like any other expression.
This fixes many testsuite ICEs for SVE, but it turns out that none
of the tests in gcc.target/aarch64/sve were affected. Anyone testing
on non-SVE aarch64 therefore wouldn't have se
On April 27, 2021 5:12:35 PM GMT+02:00, Richard Sandiford
wrote:
>Now that VEC_COND_EXPR has normal unnested operands,
>operation_could_trap_p can treat it like any other expression.
>
>This fixes many testsuite ICEs for SVE, but it turns out that none
>of the tests in gcc.target/aarch64/sve were
On Mon, Apr 26, 2021 at 5:46 AM Christoph Muellner
wrote:
> The existing CAS implementation uses an INSN definition, which provides
> the core LR/SC sequence. Additionally to that, there is a follow-up code,
> that evaluates the results and calculates the return values.
> This has two drawbacks:
Richard Biener writes:
> On April 27, 2021 5:12:35 PM GMT+02:00, Richard Sandiford
> wrote:
>>Now that VEC_COND_EXPR has normal unnested operands,
>>operation_could_trap_p can treat it like any other expression.
>>
>>This fixes many testsuite ICEs for SVE, but it turns out that none
>>of the tes
On 4/26/21 3:05 PM, Patrick Palka wrote:
On Mon, 26 Apr 2021, Jason Merrill wrote:
On 4/26/21 12:17 PM, Patrick Palka wrote:
During constexpr evaluation, a base-to-derived conversion may yield an
expression like (Derived*)(&D.2217.D.2106 p+ -4) where D.2217 is the
derived object and D.2106 is
On 4/26/21 12:17 PM, Patrick Palka wrote:
When substituting into the arguments of a base initializer pack
expansion, tsubst_initializer_list uses a dummy EXPR_PACK_EXPANSION
in order to expand an initializer such as Bases(args)... into
Bases#{0}(args#{0}) and so on. But when an argument inside t
The test is supposed to check that the abstract lexical block of a
function that was inlined doesn't have attributes, and that the
concrete inlined lexical block does.
There are two patterns to verify the absence of attributes in the
abstract lexical block, one for the case in which the concrete
Currently gengtype supports scanning target-specific files for GC roots,
but those files must exist in the source tree. This patch extends the
support to include header files generated into the build directory. It
also allows targets to specify build dependencies for s-gtype to ensure
the built h
The design of the target-specific built-in function support in the
Power back end has not stood the test of time. The machinery is
grossly inefficient, confusing, and arcane; and adding new built-in
functions is inefficient and error-prone. This patch set introduces a
replacement.
Because of th
2021-03-03 Bill Schmidt
gcc/
* Makefile.in (OUT_FILE_DEPS): New variable.
(out_object_file): Depend on OUT_FILE_DEPS.
---
gcc/Makefile.in | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/gcc/Makefile.in b/gcc/Makefile.in
index 8a5fb3fd99c..2fd94fc7dba 10064
Several i386 align tests expect p2align to be used, but not all
configurations define ASM_OUTPUT_MAX_SKIP_ALIGN, even when
HAVE_GAS_MAX_SKIP_P2ALIGN.
i386.h has an equivalent ASM_OUTPUT_MAX_SKIP_PAD that is used in
i386.c, so I'm adding an _ALIGN variant, as in x86-64.h, and an #undef
to x86-64.
This patch adds a tiny subset of the built-in and overload descriptions.
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: New.
* config/rs6000/rs6000-overload.def: New.
---
gcc/config/rs6000/rs6000-builtin-new.def | 199 +++
gcc/config/r
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c: New.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 165
1 file changed, 165 insertions(+)
create mode 100644 gcc/config/rs6000/rs6000-gen-builtins.c
diff --git a/gcc/config/rs6000/rs6000-gen-
2021-03-03 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (MININT): New defined
constant.
(exit_codes): New enum.
(consume_whitespace): New function.
(advance_line): Likewise.
(safe_inc_pos): Likewise.
(match_identifier): Likewise
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (void_status): New enum.
(basetype): Likewise.
(typeinfo): New struct.
(handle_pointer): New function.
(match_basetype): New stub function.
(match_const_restriction): Likewise.
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (match_basetype): Implement.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 64 +
1 file changed, 64 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c
b/gcc/config/rs6000/rs6000
2021-03-24 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (restriction): New enum.
(typeinfo): Add restr field.
(match_const_restriction): Implement.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 136
1 file changed, 136 insertions(+)
2021-03-03 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (rbtree.h): New #include.
(num_bifs): New filescope variable.
(num_ovld_stanzas): Likewise.
(num_ovlds): Likewise.
(exit_codes): Add more enum values.
(parse_codes): New enum.
2021-03-03 Bill Schmidt
gcc/
* config/rs6000/rbtree.c: New file.
* config/rs6000/rbtree.h: New file.
---
gcc/config/rs6000/rbtree.c | 233 +
gcc/config/rs6000/rbtree.h | 51
2 files changed, 284 insertions(+)
create mode 100644 gcc
2021-03-24 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (parse_bif_attrs):
Implement.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 102
1 file changed, 102 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c
b/gcc/config/rs6
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (bif_stanza): New enum.
(curr_bif_stanza): New filescope variable.
(stanza_entry): New struct.
(stanza_map): New initialized filescope variable.
(enable_string): Likewise.
(fnkinds
2021-03-03 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (ovld_stanza): New struct.
(MAXOVLDSTANZAS): New defined constant.
(ovld_stanzas): New filescope variable.
(curr_ovld_stanza): Likewise.
(MAXOVLDS): New defined constant.
(ovlddata
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (complete_vector_type): New
function.
(complete_base_type): Likewise.
(construct_fntype_id): Likewise.
(parse_bif_entry): Call construct_fntype_id.
(parse_ovld_entry): Likewise.
--
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (write_defines_file):
Implement.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c
b/gcc/config/rs6000/rs
2021-03-24 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c
(write_autogenerated_header): New function.
(write_decls): Likewise.
(write_extern_fntype): New callback function.
(write_header_file): Implement.
---
gcc/config/rs6000/rs6000-gen-builtin
2021-03-24 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (parse_args): New function.
(parse_prototype): Implement.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 143
1 file changed, 143 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-gen-
2021-03-03 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (write_init_bif_table):
Implement.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 71 +
1 file changed, 71 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c
b/gcc/config
2021-03-04 Bill Schmidt
gcc/
* config.gcc (extra_objs): Include rs6000-builtins.o and
rs6000-c.o.
* config/rs6000/t-rs6000 (OUT_FILE_DEPS): Add rs6000-builtins.h.
(rs6000-gen-builtins.o): New target.
(rbtree.o): Likewise.
(rs6000-gen-builtins): Li
2021-03-04 Bill Schmidt
gcc/
* config.gcc (target_gtfiles): Add ./rs6000-builtins.h.
* config/rs6000/t-rs6000 (EXTRA_GTYPE_DEPS): Set.
---
gcc/config.gcc | 1 +
gcc/config/rs6000/t-rs6000 | 1 +
2 files changed, 2 insertions(+)
diff --git a/gcc/config.gcc b/gcc/con
2021-03-03 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (write_ovld_static_init):
New function.
(write_init_file): Call write_ovld_static_init.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 53 +
1 file changed, 53 insertions(+)
diff
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add always, power5, and
power6 stanzas.
---
gcc/config/rs6000/rs6000-builtin-new.def | 72
1 file changed, 72 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def
b/gc
2021-03-24 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (write_bif_static_init): New
function.
(write_init_file): Call write_bif_static_init.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 104
1 file changed, 104 insertions(+)
diff -
2021-04-01 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (write_fntype): New
function.
(write_fntype_init): New stub function.
(write_init_bif_table): Likewise.
(write_init_ovld_table): New function.
(write_init_file): Implement.
---
gc
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add power7 and power7-64
stanzas.
---
gcc/config/rs6000/rs6000-builtin-new.def | 39
1 file changed, 39 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def
b/gcc/conf
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Finish altivec stanza.
* config/rs6000/rs6000-call.c (rs6000_init_builtins): Move
initialization of pcvoid_type_node here...
(altivec_init_builtins): ...from here.
* config/rs6000/rs6000
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add vsx stanza.
---
gcc/config/rs6000/rs6000-builtin-new.def | 860 +++
1 file changed, 860 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def
b/gcc/config/rs6000/rs6000-builtin-
Previously we created pointer types on the fly from their base types
whenever we needed one. It's more efficient to create them up front,
and the new mechanism requires that.
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (rs6000_init_builtins): Initialize
various
2021-04-01 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add power8-vector stanza.
---
gcc/config/rs6000/rs6000-builtin-new.def | 438 +++
1 file changed, 438 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def
b/gcc/config/rs6000/rs600
2021-04-01 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add power9-vector, power9,
and power9-64 stanzas.
---
gcc/config/rs6000/rs6000-builtin-new.def | 360 +++
1 file changed, 360 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-ne
2021-04-01 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add power10 and power10-64
stanzas.
---
gcc/config/rs6000/rs6000-builtin-new.def | 427 +++
1 file changed, 427 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def
b/gcc/c
2021-03-24 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add mma stanza.
---
gcc/config/rs6000/rs6000-builtin-new.def | 404 +++
1 file changed, 404 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def
b/gcc/config/rs6000/rs6000-builtin-
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