New template for 'gcc' made available

Hello, gentle maintainer. This is a message from the Translation Project robot. (If you have any questions, send them to .) A new POT file for textual domain 'gcc' has been made available to the language teams for translation. It is archived as: https://translationproject.org/POT-files/gcc

[PATCH] match.pd: A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A simplification [PR94786]

Hi! We already have x - ((x - y) & -(z < w)) and x + ((y - x) & -(z < w)) simplifications, this one adds x ^ ((x ^ y) & -(z < w)) (not merged using for because of the :c that can be present on bit_xor and can't on minus). Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2020-

[PATCH] ix86: Add peephole2 for *add3_cc_overflow_1 followed by matching memory store [PR94857]

Hi! The following peephole2 changes: - addl(%rdi), %esi + xorl%eax, %eax + addl%esi, (%rdi) setc%al - movl%esi, (%rdi) - movzbl %al, %eax ret on the testcase. *add3_cc_overflow_1, being an add{l,q} insn, is commutative, so if TARG

Re: [PATCH] ix86: Add peephole2 for *add3_cc_overflow_1 followed by matching memory store [PR94857]

On Fri, May 8, 2020 at 9:47 AM Jakub Jelinek wrote: > > Hi! > > The following peephole2 changes: > - addl(%rdi), %esi > + xorl%eax, %eax > + addl%esi, (%rdi) > setc%al > - movl%esi, (%rdi) > - movzbl %al, %eax > ret > on the testca

Re: [PATCH] ix86: Add peephole2 for *add3_cc_overflow_1 followed by matching memory store [PR94857]

On Fri, May 08, 2020 at 09:57:31AM +0200, Uros Bizjak wrote: > On Fri, May 8, 2020 at 9:47 AM Jakub Jelinek wrote: > > The following peephole2 changes: > > - addl(%rdi), %esi > > + xorl%eax, %eax > > + addl%esi, (%rdi) > > setc%al > > - movl%esi,

Re: avoid infinite loops in rpo fre

On Fri, May 8, 2020 at 8:58 AM Richard Biener wrote: > > On Thu, May 7, 2020 at 6:27 PM Alexandre Oliva wrote: > > > > > > gnat.dg/opt83.adb compiled with -O2+ would enter an infinite loop with > > memory allocation within fre. I don't think there is anything > > Ada-specific in the bug, but the

Re: [PATCH] match.pd: A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A simplification [PR94786]

On Fri, 8 May 2020, Jakub Jelinek wrote: > Hi! > > We already have x - ((x - y) & -(z < w)) and > x + ((y - x) & -(z < w)) simplifications, this one adds > x ^ ((x ^ y) & -(z < w)) (not merged using for because of the > :c that can be present on bit_xor and can't on minus). > > Bootstrapped/regt

[PATCH] coroutines: Update TREE_SIDE_EFFECTS on inserted bind exprs.

Hi, There are several places where we insert bind expressions while making the coroutine AST transforms. These should be marked as having side-effects where relevant, which had been omitted. This leads to at least one failure in the cppcoros test suite, where a loop body is dropped in gimplifi

[PATCH] tree-optimization/94988 - enhance SM some more

This enhances store-order preserving store motion to handle the case of non-invariant dependent stores in the sequence of unconditionally executed stores on exit by re-issueing them as part of the sequence of stores on the exit. This fixes the observed regression of gcc.target/i386/pr64110.c whi

New Ukrainian PO file for 'gcc' (version 10.1.0)

Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'gcc' has been submitted by the Ukrainian team of translators. The file is available at: https://translationproject.org/latest/gcc/uk.po (This file, 'gcc-10.1.0.uk.po', has

Re: [PATCH] coroutines: Update TREE_SIDE_EFFECTS on inserted bind exprs.

On 5/8/20 5:53 AM, Iain Sandoe wrote: Hi, There are several places where we insert bind expressions while making the coroutine AST transforms. These should be marked as having side-effects where relevant, which had been omitted. This leads to at least one failure in the cppcoros test suite, w

[PATCH] make minmax detection work with FMIN/FMAX IFNs

Currently we fail to optimize those which are used when MIN/MAX_EXPR cannot be used for FP values but the target has IEEE conforming implementations. This patch adds support for fmin/fmax detection to phiopt and makes the named patterns available in the x86 backend. It also removes some superfl

[PATCH] rs6000: Add scalar cfuged instruction

From: Kelvin Nilsen Add the centrifuge-doubleword instruction and built-in access. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions. Is this okay for master? Thanks, Bill [gcc] 2020-05-08 Kelvin Nilsen * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC

[PATCH] Enable CET in cross compiler if possible

Don't perform CET run-time check for host when cross compiling. Instead, enable CET in cross compiler if possible so that it will run on both CET and non-CET hosts. config/ PR bootstrap/94998 * cet.m4 (GCC_CET_HOST_FLAGS): Enable CET in cross compiler if possible. libibe

[PATCH] rs6000: Add vcfuged instruction

From: Kelvin Nilsen Add the new vector centrifuge-doubleword instruction and built-in function access. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions. Is this okay for master? Thanks, Bill [gcc] 2020-05-08 Kelvin Nilsen * config/rs6000/altivec.h (vec

[PATCH] rs6000: Add cntlzdm and cnttzdm

From: Kelvin Nilsen Add support for new scalar instructions for counting leading or trailing zeros under control of a bitmask. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions. Is this okay for master? Thanks, Bill [gcc] 2020-05-08 Kelvin Nilsen * conf

Re: [PATCH] make minmax detection work with FMIN/FMAX IFNs

On Fri, May 8, 2020 at 3:02 PM Richard Biener wrote: > > > Currently we fail to optimize those which are used when MIN/MAX_EXPR > cannot be used for FP values but the target has IEEE conforming > implementations. > > This patch adds support for fmin/fmax detection to phiopt and > makes the named p

[PATCH] x86: Default CET run-time support to auto

CET has been added since GCC 8. This patch defaults CET run-time support to auto. It enables CET run-time support if asssembler supports CET instructions and multi-byte NOPs are enabled via SSE2. OK for master? Thanks. H.J. --- config/ * cet.m4 (GCC_CET_FLAGS): Change default to auto.

Re: [PATCH] make minmax detection work with FMIN/FMAX IFNs

On Fri, 8 May 2020, Richard Biener wrote: > > Currently we fail to optimize those which are used when MIN/MAX_EXPR > cannot be used for FP values but the target has IEEE conforming > implementations. i386 ieee_s{min,max} patterns are definitely not IEEE-compliant, their comment alludes to tha

Re: [PATCH] make minmax detection work with FMIN/FMAX IFNs

On Fri, May 8, 2020 at 3:46 PM Alexander Monakov wrote: > > > > On Fri, 8 May 2020, Richard Biener wrote: > > > > > Currently we fail to optimize those which are used when MIN/MAX_EXPR > > cannot be used for FP values but the target has IEEE conforming > > implementations. > > i386 ieee_s{min,max}

Re: [PATCH] OpenACC reference count consistency checking

Hi Julian! On 2020-05-07T17:11:09+0100, Julian Brown wrote: > Sorry about the delay replying to this email! No worries, I had other things to do, too. ;-) > On Thu, 30 Jan 2020 16:21:20 +0100 > Thomas Schwinge wrote: >> Notwithstanding the open question about how to implement this >> checkin

Re: [PATCH] make minmax detection work with FMIN/FMAX IFNs

On Fri, 8 May 2020, Uros Bizjak wrote: > > Am I missing something? > > Is the above enough to declare min/max as IEEE compliant? No. SSE min/max instructions semantics match C expression x < y ? x : y. IEEE min/max operations are commutative when exactly one operand is a NaN, and so are C fmin/f

Re: [PATCH] make minmax detection work with FMIN/FMAX IFNs

On May 8, 2020 4:28:24 PM GMT+02:00, Alexander Monakov wrote: >On Fri, 8 May 2020, Uros Bizjak wrote: > >> > Am I missing something? >> >> Is the above enough to declare min/max as IEEE compliant? > >No. SSE min/max instructions semantics match C expression x < y ? x : >y. >IEEE min/max operatio

std::atomic_flag::test

This is not yet implemented. Here is a patch. 2020-05-08 Ulrich Drepper * include/bits/atomic_base.h (atomic_flag): Implement test memeber function. * include/std/version: Define __cpp_lib_atomic_flag_test. * testsuite/29_atomics/atomic_flag/test/explicit.cc: New file.

[Patch][OpenMP] Fix mapping of artificial variables (PR94874)

While for data sharing (e.g. "parallel") the predetermined sharing (e.g.) for compiler-generated variables did work, this did not happen for target mapping – causing errors with "defaultmap(none)". It is not completely clear to my how to best handle this case. In most cases, the auxiliary variabl

[Ada] Small tweak to gnat_to_gnu_param

We mark the type of In parameters in Ada with the const qualifier, but it is stripped by free_lang_data_in_type so do not do it in LTO mode. Tested on x86-64/Linux, applied on the mainline. 2020-05-08 Eric Botcazou * gcc-interface/decl.c (gnat_to_gnu_param): Do not make a variant of

[Ada] Couple of tweaks to help in LTO mode

The first tweak is to remove the TREE_OVERFLOW flag on INTEGER_CSTs because it prevents them from being uniquized in LTO mode. The second, unrelated tweak is to canonicalize the packable types made by gigi, so that at most one per type is present in the GENERIC IL. Tested on x86-64/Linux, appl

[Ada] Fix uniqueness of address for aliased objects

Two aliased objects must have distinct addresses, even if they have size zero, so we make sure to allocate at least one byte for them. Tested on x86-64/Linux, applied on the mainline. 2020-05-08 Eric Botcazou * gcc-interface/decl.c (gnat_to_gnu_entity) : Force at least the u

[Ada] Fix missing information in exception messages with -gnateE

The information was missing in cases the front-end was able to turn the range comparison into a simple comparison. Tested on x86-64/Linux, applied on the mainline. 2020-05-08 Eric Botcazou * gcc-interface/trans.c (Raise_Error_to_gnu): Always compute a lower bound and an uppe

Re: [PATCH] c++: template instantiation during fold_for_warn [PR94038]

On Wed, 6 May 2020, Patrick Palka wrote: > On Wed, 6 May 2020, Patrick Palka wrote: > > > On Tue, 5 May 2020, Patrick Palka wrote: > > > > > On Tue, 5 May 2020, Patrick Palka wrote: > > > > > > > Unfortunately, the previous fix to PR94038 is fragile. When the > > > > argument to fold_for_warn

[C++] EOF has a location

There's no need to special-case EOF's location. For the complete file we give it a legitimate location. And for deferred parses we now zap a temporary EOF onto the next token, so we can just use its location anyway. pushed to master. nathan -- Nathan Sidwell 2020-05-08 Nathan Sidwell

[PATCH] Refactor tree-vrp.c

Hi, This patch Refactors tree-vrp.c to eliminate all global variables except 'x_vrp_values', which will require that 'thread_outgoing_edges' to accept an extra argument and pass it to the 'simplify' callback. It also removes every access to 'cfun', retrieving the function being compiled from the

New Chinese (traditional) PO file for 'gcc' (version 10.1.0)

Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'gcc' has been submitted by the Chinese (traditional) team of translators. The file is available at: https://translationproject.org/latest/gcc/zh_TW.po (This file, 'gcc-10.1

Re: [PATCH] Refactor tree-vrp.c

On Fri, 2020-05-08 at 13:06 -0300, Giuliano Belinassi via Gcc-patches wrote: > Hi, > > This patch Refactors tree-vrp.c to eliminate all global variables except > 'x_vrp_values', which will require that 'thread_outgoing_edges' to > accept an extra argument and pass it to the 'simplify' callback. >

Re: [PATCH] OpenACC reference count consistency checking

On Fri, 8 May 2020 16:18:34 +0200 Thomas Schwinge wrote: > >> Can you please explain (textually?) how this checking (design per > >> your textual description below) is working in context of mixed > >> OpenACC structured ("S") and dynamic ("D") reference counts? For > >> example: > >> > >> /

Re: [PATCH] rs6000: powerpc_future_ok and powerpc_future_hw

Hi! Just some very minor stuff... On Thu, May 07, 2020 at 09:00:32PM -0500, Bill Schmidt wrote: > --- /dev/null > +++ b/gcc/testsuite/gcc.target/powerpc/dg-future-0.c > @@ -0,0 +1,14 @@ > +/* { dg-do compile { target { powerpc*-*-* } } } */ This is the default for anything under gcc.target/power

[PATCH] disable X86_TUNE_SSE_PACKED_SINGLE_INSN_OPTIMAL on Zen

Bug report this patch fixes: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87455 The patch is a trivial one-liner, so I believe there should be no need to sign the CLA? Copy of the patch is attached, because google cannot be trusted to not munge whitespace. >From c0a466dd626aafa5b58c6c9d43d50a1d

[WIP PATCH]: Autovectorize V2SF mode

Attached WIP patch enables auto-vectorization of basic V2SF operations (plus, minus, mult, min/max). The compiler takes care that everything is loaded from memory via movq insn, so top two registers always remain zero. We could probably vectorize some more operations (horizontal add, horizontal su

[PATCH 1/1] Make anti_adjust_stack_and_probe_stack_clash extern and use it for Z

When compiling with -mbackchain -fstack-clash-protection currently no probes are emitted. This patch adjusts the "allocate_stack" expander to call anti_adjust_stack_and_probe_stack_clash when needed. In order to do this I had to export that function from explow.c. Ok for mainline? 2020-05-08 An

Re: [WIP PATCH]: Autovectorize V2SF mode

On Fri, May 8, 2020 at 7:22 PM Uros Bizjak wrote: > > Attached WIP patch enables auto-vectorization of basic V2SF operations > (plus, minus, mult, min/max). The compiler takes care that everything > is loaded from memory via movq insn, so top two registers always > remain zero. This example: --c

[PATCH] rs6000: Add vclrlb and vclrrb

From: Kelvin Nilsen Add new vector instructions to clear leftmost and rightmost bytes. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions. Is this okay for master? Thanks, Bill [gcc] 2020-05-08 Kelvin Nilsen * config/rs6000/altivec.h (vec_clrl): New #def

[preprocessor] Reimplement directives-only, add raw literal support

On the modules branch I was forced to fiddle with directives-only processing. I reimplemented it. The existing directives-only code (a) punched a hole through the libcpp interface and (b) didn't support raw string literals. This reimplements this preprocessing mode. I added a proper callbac

[PATCH] handle std::byte in -Wclass-memaccess (PR 94923)

-Wclass-memaccess is suppressed for write accesses to trivially copyable but otherwise nontrivial class types by character types but the suppression neglects to consider the equivalent accesses by std::byte. The attached patch extends the same privilege also to it. I couldn't find a utility func

Re: [PATCH] rs6000: Add vector count under mask

On Thu, May 07, 2020 at 09:11:32PM -0500, Bill Schmidt wrote: > From: Kelvin Nilsen > > Add support for new vclzdm and vctzdm vector instructions that > count leading and trailing zeros under control of a mask. > Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no > regressions. Is

Re: [PATCH] rs6000: Add vector count under mask

On 5/8/20 2:00 PM, Segher Boessenkool wrote: On Thu, May 07, 2020 at 09:11:32PM -0500, Bill Schmidt wrote: From: Kelvin Nilsen Add support for new vclzdm and vctzdm vector instructions that count leading and trailing zeros under control of a mask. Bootstrapped and tested on powerpc64le-unknown

[C++] Delete the news

the last time the NEWS file was updated was GCC 3.4. It is no longer news-worthy. We've moved to documenting this stuff on the web. pushed. nathan -- Nathan Sidwell 2020-05-08 Nathan Sidwell * NEWS: Delete, it is so stale. diff --git c/gcc/cp/NEWS w/gcc/cp/NEWS deleted file mode 100644

[PATCH] Skip jit tests for targets that don't support -lgccjit

Since libgccjit.so is linked into jit tests, skip jit tests for targets that don't support -lgccjit. OK for master? H.J. --- PR jit/94778 * jit.dg/jit.exp: Skip jit tests for targets that don't support -lgccjit. * lib/target-supports.exp (check_effective_target_lgc

Re: [PATCH] diagnostics: Add options to control the column units [PR49973] [PR86904]

On Fri, Jan 31, 2020 at 03:31:59PM -0500, David Malcolm wrote: > On Fri, 2020-01-31 at 14:31 -0500, Lewis Hyatt wrote: > > Hello- > > > > Here is the second patch that I mentioned when I submitted the other > > related > > patch (which is awaiting review): > > https://gcc.gnu.org/ml/gcc-patches/20

[PATCH] rs6000: Add pdepd and pextd

From: Kelvin Nilsen Add scalar instructions for parallel bit deposit and extract, with built-in function support. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions. Is this okay for master? Thanks, Bill [gcc] 2020-05-08 Kelvin Nilsen * config/rs6000/alt

Re: [PATCH] rs6000: Add pdepd and pextd

Please ignore, I sent the wrong ChangeLog.  Will try again momentarily. Sorry, Bill On 5/8/20 3:05 PM, Bill Schmidt via Gcc-patches wrote: From: Kelvin Nilsen Add scalar instructions for parallel bit deposit and extract, with built-in function support. Bootstrapped and tested on powerpc64le-

[PATCH 1/3] zlib: Add --enable-cet to configure

When --enable-cet is used to configure GCC, enable Intel CET in target zlib. * Makefile.am (AM_CFLAGS): New. * configure.ac (CET_FLAGS): Add GCC_CET_FLAGS and AC_SUBST. * Makefile.in: Regenerated. * aclocal.m4: Likewise. * configure.ac: Likewise. --- zlib/M

[PATCH 3/3] switchcontext.S: Include and use _CET_ENDBR

When __CET__ is defined, should be included to add Intel CET marker to object file and _CET_ENDBR should be placed at function entry to indicate indirect branch target. * libdruntime/config/x86/switchcontext.S: Include if __CET__ is defined. (_CET_ENDBR): New. Define if

[PATCH 0/3] Add CET support to libphobos

This patch set adds CET support to libphobos. Since libphobos uses zlib target library, CET is also enabled in zlib. OK for master? Thanks. H.J. Lu (3): zlib: Add --enable-cet to configure libphobos: Add --enable-cet to configure switchcontext.S: Include and use _CET_ENDBR libphobos/Ma

[PATCH 2/3] libphobos: Add --enable-cet to configure

When --enable-cet is used to configure GCC, enable Intel CET in libphobos. * Makefile.am (AM_MAKEFLAGS): Add $(CET_FLAGS) to GCC FLAGS. * configure.ac (CET_FLAGS): Add GCC_CET_FLAGS and AC_SUBST. * Makefile.in: Regenerated. * aclocal.m4: Likewise. * configur

[PR77691] x86-vxworks malloc aligns to 8 bytes like solaris

Vxworks 7's malloc, like Solaris', only ensures 8-byte alignment of returned pointers on 32-bit x86, though GCC's stddef.h defines max_align_t with 16-byte alignment for __float128. This patch enables on x86-vxworks the same memory_resource workaround used for x86-solaris. The testsuite also ha

[PATCH] rs6000: Add pdepd and pextd

From: Kelvin Nilsen Add scalar instructions for parallel bit deposit and extract, with built-in function support. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions. Is this okay for master? Thanks, Bill [gcc] 2020-05-08 Kelvin Nilsen * config/rs6000/rs6

Re: [PATCH] rs6000: Add pdep/pext

Hi, On Thu, May 07, 2020 at 09:29:03PM -0500, Bill Schmidt wrote: > diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md > index 5ef4889ba55..33ba57855bc 100644 > --- a/gcc/config/rs6000/altivec.md > +++ b/gcc/config/rs6000/altivec.md > @@ -162,6 +162,8 @@ (define_c_enum "unspe

Re: [PATCH] config/debuginfod.m4: Use PKG_CHECK_MODULES

> "Aaron" == Aaron Merey via Binutils writes: Aaron> * Makefile.in: Replace LIBDEBUGINFOD with DEBUGINFOD_LIBS. Aaron> * aclocal.m4: Rebuild. Instead of inlining pkg.m4 into aclocal.m4, how about making config/pkg.m4 and then using m4_include from gdb/acinclude.m4? That's wha

Re: avoid infinite loops in rpo fre

On May 8, 2020, Richard Biener via Gcc-patches wrote: > OK, so I think the issue is that we are using RPO availability during > the DOM elimination walk at all - there can be easily disconnects > between what RPO iteration left us with and what the DOM walk > eliminates. Fixing this fixes the t

Re: [PATCH] rs6000: Add vgnb

On Thu, May 07, 2020 at 09:45:02PM -0500, Bill Schmidt wrote: > From: Kelvin Nilsen > > Add support for the vgnb instruction, which gathers every Nth bit > per vector element. > > Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no > regressions. Is this okay for master? This one

[PATCH]: Improving hard reg preference cost propagation

  The following patch improves hard reg pref cost propagation in IRA.  Hard reg preferences are created mainly from moves involving hard regs in RTL.   The patch does the propagation during coloring now and also updates conflict costs which affects hard reg preferences for conflicting allocnos

[PATCH] avoid -Warray-bounds when indexing into array members of union (PR 94940)

The improved detection of accesses to interior zero-length arrays fails to consider the case when the array is a member of a union. Such accesses are documented as supported so warning for them is not expected. The attached patch adjusts the component_ref_size function to return the size of the e

Re: [PATCH 0/3] Add CET support to libphobos

On 08/05/2020 22:10, H.J. Lu wrote: > This patch set adds CET support to libphobos. Since libphobos uses zlib > target library, CET is also enabled in zlib. > > OK for master? > I have no problem with the libphobos parts. Regards Iain.

Re: [PATCH 0/3] Add CET support to libphobos

On Fri, May 8, 2020 at 2:50 PM Iain Buclaw wrote: > > On 08/05/2020 22:10, H.J. Lu wrote: > > This patch set adds CET support to libphobos. Since libphobos uses zlib > > target library, CET is also enabled in zlib. > > > > OK for master? > > > > I have no problem with the libphobos parts. > Than

Re: [PATCH] rs6000: Add pdepd and pextd

On Fri, May 08, 2020 at 03:34:27PM -0500, Bill Schmidt wrote: > From: Kelvin Nilsen > > Add scalar instructions for parallel bit deposit and extract, with > built-in function support. > > Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no > regressions. Is this okay for master? Y

Re: [PATCH] rs6000: Add scalar cfuged instruction

On Fri, May 08, 2020 at 08:05:33AM -0500, Bill Schmidt wrote: > From: Kelvin Nilsen > > Add the centrifuge-doubleword instruction and built-in access. > > Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no > regressions. Is this okay for master? This looks fine to me as well. We

Re: [PATCH] rs6000: Add vcfuged instruction

On Fri, May 08, 2020 at 08:12:14AM -0500, Bill Schmidt wrote: > From: Kelvin Nilsen > > Add the new vector centrifuge-doubleword instruction and built-in > function access. > > Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no > regressions. Is this okay for master? Yup, looks f

Re: [PATCH] rs6000: Add cntlzdm and cnttzdm

On Fri, May 08, 2020 at 08:17:18AM -0500, Bill Schmidt wrote: > From: Kelvin Nilsen > > Add support for new scalar instructions for counting leading or > trailing zeros under control of a bitmask. > > Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no > regressions. Is this okay f

Re: [PATCH] rs6000: Add vclrlb and vclrrb

On Fri, May 08, 2020 at 12:53:01PM -0500, Bill Schmidt wrote: > From: Kelvin Nilsen > > Add new vector instructions to clear leftmost and rightmost bytes. > > Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no > regressions. Is this okay for master? Yes, this is okay. Thanks!

[PATCH] rs6000: Add xxeval and vec_ternarylogic

From: Kelvin Nilsen Add the xxeval insn and access it via the vec_ternarylogic built-in function. As part of this, add support to the built-in function infrastructure for functions that take four arguments. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions, using a na

The vendors branch axis/cris-decc0 has been merged to master

Not that anyone would notice, except a few maintainers of targets with delay-slots, and only if the first patch causes fallout, as the others only touch stuff related to the CRIS target. The 23 commits have been posted previously, around Jan-Feb. For reference: 2c2d405 dbr: Filter-out TARGET_FLA

Re: avoid infinite loops in rpo fre

On May 8, 2020 10:57:35 PM GMT+02:00, Alexandre Oliva wrote: >On May 8, 2020, Richard Biener via Gcc-patches > wrote: > >> OK, so I think the issue is that we are using RPO availability during >> the DOM elimination walk at all - there can be easily disconnects >> between what RPO iteration left

Re: [PATCH 0/3] Add CET support to libphobos

On 9 May 2020 00:16:54 CEST, "H.J. Lu" wrote: >On Fri, May 8, 2020 at 2:50 PM Iain Buclaw wrote: >> >> On 08/05/2020 22:10, H.J. Lu wrote: >> > This patch set adds CET support to libphobos. Since libphobos uses zlib >> > target library, CET is also enabled in zlib. >> > >> > OK for master? >> >

New French PO file for 'gcc' (version 10.1.0)

Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'gcc' has been submitted by the French team of translators. The file is available at: https://translationproject.org/latest/gcc/fr.po (This file, 'gcc-10.1.0.fr.po', has jus