On 29 January 2018 04:26:17 CET, Kito Cheng wrote:
>Hi all:
>
>This patch enable RISC-V support FreeBSD, Ruslan (RISC-V FreeBSD
>maintainer) and me has been tested on FreeBSD 12 for building kernel
>and whole user space programs/libraries.
I think the copyright year of the new header should be 20
On Fri, Jan 26, 2018 at 01:54:42PM +, Richard Sandiford wrote:
> This patch deals with cases in which a CONST_VECTOR contains a
> repeating bit pattern that is wider than one element but narrower
> than 128 bits. The current code:
>
> * treats the repeating pattern as a single element
> * use
This fixes another case of the SCEV cache containing references to
released SSA names. This time it is the vectorizer releasing defs
of OMP_SIMD uses. Instead of pluggin this hole like the others,
sprinkling scev_reset[_htab] calls throughout passes, it plugs
the holes in flush_ssaname_freelist
On Mon, Jan 29, 2018 at 11:05:28AM +0100, Richard Biener wrote:
>
> This fixes another case of the SCEV cache containing references to
> released SSA names. This time it is the vectorizer releasing defs
> of OMP_SIMD uses. Instead of pluggin this hole like the others,
> sprinkling scev_reset[_ht
On Fri, Jan 26, 2018 at 01:59:40PM +, Richard Sandiford wrote:
> Subreg reads should be equivalent to storing the inner register to
> memory and loading the appropriate memory bytes back, with subreg
> writes doing the reverse. For the reasons explained in the comments,
> this isn't what happe
On Fri, Jan 26, 2018 at 01:50:40PM +, Richard Sandiford wrote:
> The fallback way of handling a repeated 128-bit constant vector for SVE
> is to force the 128 bits to the constant pool and use LD1RQ to load it.
> Previously the code always used the byte variant of LD1RQ (LD1RQB),
> with a prece
On Fri, Jan 26, 2018 at 03:15:58PM +, Richard Sandiford wrote:
> Kyrill Tkachov writes:
> > On 26/01/18 13:31, Richard Sandiford wrote:
> >> sve/extract_[12].c were relying on the target-independent optimisation
> >> that removes a redundant vec_select, so that we don't end up with
> >> thing
This is the obvious change for our web pages, where my link
checker just reported some 200 new problematic links. ;-)
I assume there are (many) other instances we'll want to have
a look at in our source tree, for example.
Gerald
Index: style.mhtml
Hi,
this ( r257065 ) caused: PR84088 - "[nvptx]
libgomp.oacc-fortran/declare-*.f90 execution fails" (
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84088 ).
Thanks,
- Tom
On 01/24/2018 10:05 AM, Paul Richard Thomas wrote:
Hi Jakub,
The lateness is indeed embarrassing but couldn't be helped.
Fix for C++17's std::any.
PR libstdc++/83658
* include/std/any (any::__do_emplace): Only set _M_manager after
constructing the contained object.
* testsuite/20_util/any/misc/any_cast_neg.cc: Adjust dg-error line.
* testsuite/20_util/any/modifiers/83658.cc:
* doc/xml/faq.xml: Update copyright years.
* doc/html/*: Regenerate.
commit 1777fb0c3047da89b48665dc8554ecdb20f3ae87
Author: Jonathan Wakely
Date: Mon Jan 29 12:36:45 2018 +
Regenerate libstdc++ documentation
* doc/xml/faq.xml: Update copyright years.
On Mon, 29 Jan 2018, Jakub Jelinek wrote:
> On Mon, Jan 29, 2018 at 11:05:28AM +0100, Richard Biener wrote:
> >
> > This fixes another case of the SCEV cache containing references to
> > released SSA names. This time it is the vectorizer releasing defs
> > of OMP_SIMD uses. Instead of pluggin t
Hello,
The below patch adds a new vector attribute for RL78, it is basically a copy
past of what DJ has done for RX a while ago:
https://gcc.gnu.org/ml/gcc-patches/2014-05/msg02387.html
The patch adds also a test case and updates extend.texi with the new
attribute.
Regression test is OK, tested
This implements LWG DR 2268, which is part of C++14 and so we should
have implemented it some time ago.
The change should be safe, but I think it's best to wait for Stage 1
rather than changing it now (even though I'll also backport it to the
branches once it's on trunk).
PR libstdc++/84
As described in the PR, Solaris 10/x86 ld is broken when dealing with
the SHF_MERGE flag, causing the bootstrap to break in strange ways.
Solaris as doesn't support it, but gas does, so only gas/ld builds were
affected.
This patch forces HAVE_GAS_SHF_MERGE to 0 to work around this.
I've massively
On 15/01/18 12:59 +, Jonathan Wakely wrote:
boru on Freenode's #gcc channel pointed out that
contrib/download_prerequisites should use shasum for FreeBSD, not
sha512sum (which comes from GNU coreutils on GNU/Linux). I checked
FreeBSD 11.0 and 10.2 and neither has sha512sum, not does DragonFl
On Mon, Jan 29, 2018 at 02:30:04PM +0100, Rainer Orth wrote:
> --- a/gcc/testsuite/gcc.dg/debug/dwarf2/prod-options.c
> +++ b/gcc/testsuite/gcc.dg/debug/dwarf2/prod-options.c
> @@ -4,8 +4,7 @@
> as well. */
> /* { dg-do compile } */
> /* { dg-options "-O2 -gdwarf -dA -fdebug-prefix-map=a=b"
On 18/01/18 22:01 +0100, François Dumont wrote:
On 16/01/2018 01:20, Jonathan Wakely wrote:
On 15/01/18 22:32 +0100, François Dumont wrote:
On 15/01/2018 13:29, Jonathan Wakely wrote:
In fact it introduces a serious regression because of this line:
- vector(vector&& __x) noexcept
-
On 24/01/18 17:39 +0100, François Dumont wrote:
Hi
I'd like to propose this new debug check. Comparing with non-eos
istreambuf_iterator sounds like an obvious coding mistake.
Agreed, but that doesn't mean we can terminate the process. It's still
valid C++, even though it's probably not wh
Hi Jakub,
> On Mon, Jan 29, 2018 at 02:30:04PM +0100, Rainer Orth wrote:
>> --- a/gcc/testsuite/gcc.dg/debug/dwarf2/prod-options.c
>> +++ b/gcc/testsuite/gcc.dg/debug/dwarf2/prod-options.c
>> @@ -4,8 +4,7 @@
>> as well. */
>> /* { dg-do compile } */
>> /* { dg-options "-O2 -gdwarf -dA -fdeb
On 15/01/18 19:59 +, Jonathan Wakely wrote:
The chi_squared_distribution::param(const param&) function should also
update the parameters of the gamma_distribution member.
PR libstdc++/83833
* include/bits/random.h (chi_squared_distribution::param): Update
gamma distri
While investigating PR bootstrap/84017, it turned out that it *is*
possible to enable COMDAT group support on Solaris 10 with Solaris ld in
some circumstances. I'm posting my findings and the resulting patch
here for reference only; this is certainly not GCC 8 material.
Besides, there's a abi_che
Hi,
the fix for c++/81236 removed some special code for dependent_p from
finish_id_expression, and now finish_qualified_id_expr is used for this
snippet too. Then special code at the beginning of the latter takes care
of calling build_qualified_name to create the relevant SCOPE_REF.
Therefore
Another caller of constant_value_1 that needs to handle calling
mark_rvalue_use now that cv1 doesn't.
Tested x86_64-pc-linux-gnu, applying to trunk.
commit a8bc011a19fdb684c60cf4727d6a93ad2886d7ea
Author: Jason Merrill
Date: Mon Jan 29 09:16:05 2018 -0500
PR c++/83942 - wrong unuse
GCC maintainers:
The following patch contains fixes for the GCC documentation file.
There is a missing space between vector and the type __int128_t in the
second argument of the documented function.
The patch makes no functional changes to GCC, just fixes a trivial
typo.
No regression testin
Hi Carl,
On Mon, Jan 29, 2018 at 08:08:30AM -0800, Carl Love wrote:
> The following patch contains fixes for the GCC documentation file.
> There is a missing space between vector and the type __int128_t in the
> second argument of the documented function.
>
> The patch makes no functional chan
This warning is supposed to detect cases like
void
bar (char *d, unsigned n, const char *f, va_list va)
{
vsnprintf (d, n, f, va);
}
where the enclosing function is a candidate for the "format" attribute. The
code assumed that current_function_decl is never null -- a reasonable
assumption sin
The crash here is caused by size_binop_loc getting operands of different types:
sizetype and ssizetype. Fixed by performing the computation in offset_int,
much as we do in fold_indirect_ref_1 (fixed in middle-end/81695).
Bootstrapped/regtested on x86_64-linux, ok for trunk?
2018-01-29 Marek Pol
On Mon, 29 Jan 2018, Marek Polacek wrote:
> This warning is supposed to detect cases like
>
> void
> bar (char *d, unsigned n, const char *f, va_list va)
> {
> vsnprintf (d, n, f, va);
> }
>
> where the enclosing function is a candidate for the "format" attribute. The
> code assumed that cur
Hi Peter,
On Thu, Jan 25, 2018 at 09:39:39PM -0600, Peter Bergner wrote:
> Ok, here is a separate translation table like you wanted. I still use the
> RS6000_CPU table to hold entire list of canonical cpu names, the new
> translation table in driver-rs6000.c only contains cpus whose AT_PLATFORM
>
* Claudiu Zissulescu [2017-11-02 13:30:34
+0100]:
> From: claziss
>
> The _Uncached type qualifier can be used to bypass the cache without
> resorting to declaring variables as volatile.
>
> gcc/
> 2017-07-12 Claudiu Zissulescu
>
> * config/arc/arc-protos.h (arc_is_uncached_mem_p):
* Claudiu Zissulescu [2017-11-02 13:30:35
+0100]:
> From: claziss
>
> The 'aux' variable attribute is used to directly access the auxiliary
> register space from C.
>
> gcc/
> 2017-07-25 Claudiu Zissulescu
>
> * config/arc/arc.c (arc_handle_aux_attribute): New function.
> (arc
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Renlin Li writes:
> Hi all,
>
> In aarch64 backend, ip0/ip1 register will be used in the prologue/epilogue as
> temporary register.
>
> When the compiler is performing sibcall optimization. It has the chance to use
> ip0/ip1 register for indirect function call to hold the address. However,
> thos
On 01/28/2018 07:26 PM, Kito Cheng wrote:
gcc/ChangeLog
2018-01-29 Ruslan Bukin
Kito Cheng
* config.gcc (riscv*-*-freebsd*): New.
* config/riscv/freebsd.h: New.
libgcc/ChangeLog
2018-01-29 Ruslan Bukin
* libgcc/config.host: Support RISC
On 1/29/18 1:23 PM, Segher Boessenkool wrote:
>> I also added the pa6t to 970 translation you mentioned in the bugzilla.>> If
>> you want me to drop that, that's easy enough to do.
>
> Yeah dropping it is probably best.
Will do.
>> +#ifdef __linux__
>> +/* Canonical GCC cpu name table. */
>> +
OK.
On Mon, Jan 29, 2018 at 1:12 PM, Marek Polacek wrote:
> The crash here is caused by size_binop_loc getting operands of different
> types:
> sizetype and ssizetype. Fixed by performing the computation in offset_int,
> much as we do in fold_indirect_ref_1 (fixed in middle-end/81695).
>
> Boot
On 01/25/2018 04:14 PM, Joseph Myers wrote:
> On Thu, 25 Jan 2018, vladimir.mezent...@oracle.com wrote:
>
>> From: Vladimir Mezentsev
>>
>> Tested on aarch64-linux-gnu, x86_64-pc-linux-gnu and
>> sparc64-unknown-linux-gnu.
>> No regression. New tests now passed.
>> There is a performance degrada
Ping
Richard Sandiford writes:
> James Greenhalgh writes:
>> On Thu, Jan 04, 2018 at 11:27:56AM +, Richard Sandiford wrote:
>>> Ping**2
>>
>> This is OK.
>
> Thanks.
>
>> It took me a while to get the hang of the interface - a worked example
>> in the comment in vec-perm-indices.c would prob
On Mon, Jan 29, 2018 at 10:45 AM, Paolo Carlini
wrote:
> the fix for c++/81236 removed some special code for dependent_p from
> finish_id_expression, and now finish_qualified_id_expr is used for this
> snippet too. Then special code at the beginning of the latter takes care of
> calling build_qual
On Mon, 29 Jan 2018, vladimir.mezent...@oracle.com wrote:
> > What about powerpc __divkc3?
> >
> > What was the rationale for using soft-fp rather than adding appropriate
> > built-in functions as suggested in a comment?
>
> I had a version with built-in functions and I can restore it.
>
> Let'
On 1/29/18 2:33 PM, Peter Bergner wrote:
> The current version of that code looks like the following, which I should
> copy instead. Unless you have a different suggestion?
>
> char *s;
>
> if (e->unknown_error)
> error_at (loc, e->unknown_error, arg);
> else
>
Here, the problem was that convert_to_pointer_maybe_fold doesn't
entirely respect the dofold argument, and folds anyway if the argument
is constant. In this case we really don't want folding.
Tested x86_64-pc-linux-gnu, applying to trunk.
commit ea38396630703879e5416265cd66db87845f3684
Author: Ja
The write barrier pass depends on the escape analysis pass, and we
don't run the escape analysis pass if we've seen any errors. Running
the write barrier pass without the escape analysis pass can produce
incorrect errors. So skip it. Bootstrapped and ran Go testsuite on
x86_64-pc-linux-gnu. Com
This bug appears to revolve around whether there is a canonical rtx for
internal_arg_pointer in var-tracking. In vt_add_function_parameter() we
currently have:
static void
vt_add_function_parameter (tree parm)
{
rtx decl_rtl = DECL_RTL_IF_SET (parm);
rtx incoming = DECL_INCOMING_RTL (parm);
Sameera Deshpande writes:
> Hi!
>
> I am seeing multiple assembler errors with error message "Error:
> conditional branch out of range" for customer code.
>
> The root cause of the bug is that conditional branches are generated
> whose branch target ends up being too far away to be encoded in the
If the RX and RL78 now share interrupt/vector semantics, can we combine
the docs? I.e. instead of a new section for RL78, can we change the RX
section to say something like "For RX and RL78..." ?
cpplib-8.1-b20180128.uk.po.gz
Description: Binary data
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Hello world,
this patch fixes the library issues left over from Paul's rank-15 patch
by removing the GFC_DTYPE_DERIVED_* macros and (mostly) handling these
cases separately.
The problem was with folding the type and size into a single word. For
all normal data types, this is perfectly fine, beca
Hi!
On Sat, Jan 27, 2018 at 11:16:00AM -0500, Michael Meissner wrote:
> By allowing the ++/-- support for int indexes, it causes IV-OPTS to not
> properly optimize the loop.
>
> This patch restores the 240841 behavior of not allowing ++/-- for scalar
> floating point types. The loop looks like:
Hi,
On 29/01/2018 21:41, Jason Merrill wrote:
On Mon, Jan 29, 2018 at 10:45 AM, Paolo Carlini
wrote:
the fix for c++/81236 removed some special code for dependent_p from
finish_id_expression, and now finish_qualified_id_expr is used for this
snippet too. Then special code at the beginning of t
On Mon, Jan 29, 2018 at 03:01:10PM -0600, Aaron Sawdey wrote:
> /* If there is a DRAP register or a pseudo in internal_arg_pointer,
> rewrite the incoming location of parameters passed on the stack
> into MEMs based on the argument pointer, so that incoming doesn't
> depend on a ps
On Mon, Jan 29, 2018 at 11:05:29PM +0100, Jakub Jelinek wrote:
> On Mon, Jan 29, 2018 at 03:01:10PM -0600, Aaron Sawdey wrote:
> > /* If there is a DRAP register or a pseudo in internal_arg_pointer,
> > rewrite the incoming location of parameters passed on the stack
> > into MEMs based
On Mon, Jan 29, 2018 at 04:00:59PM -0600, Segher Boessenkool wrote:
> (Maybe add a comment?)
>
> This is okay for trunk. Thanks!
This is the patch I applied:
2018-01-29 Michael Meissner
PR target/81550
* config/rs6000/rs6000.c (rs6000_setup_reg_addr_masks): If DFmode
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It was determined that the reported ICE occurs because a NULL value is
passed from vectorizable_call () to
targetm.vectorize.builtin_md_vectorized_function (
callee, vectype_out, vectype_in).
This patch avoids making this call if callee equals NULL.
After successful bootstrap
On Mon, Jan 29, 2018 at 04:26:50PM -0600, Segher Boessenkool wrote:
> > The code actually meant pointer comparison, the question is what is
> > different on powerpc* that you end up with a different REG.
> > >From what I can see, function.c uses crtl->args.internal_arg_pointer
> > directly rather t
On Mon, Jan 29, 2018 at 11:41:32PM +0100, Jakub Jelinek wrote:
> On Mon, Jan 29, 2018 at 04:26:50PM -0600, Segher Boessenkool wrote:
> > > The code actually meant pointer comparison, the question is what is
> > > different on powerpc* that you end up with a different REG.
> > > >From what I can see
Hi!
In r245223 cp_parser_postfix_dot_deref_expression has been changed to
workaround some buggy template code with a pedwarn instead of error,
in r245440 Marek tweaked that by adding the && EXPR_P (postfix_expression)
because we really don't want to clear TREE_TYPE on OVERLOADs or on DECLs
that ha
Hi!
As mentioned in the PR, cunroll sometimes registers some SSA_NAMEs for
renaming and then invokes some SCEV using functions before finally updating
the SSA form. On the testcase we end up with 3 degenerate PHIs pointing at
each other, so follow_copies_to_constant loops forever.
The following
Hi!
I've committed following fix to the omp_init_nest_lock_with_hint
prototype. I've found that I've actually forgot to add those
symbols to libgomp.so*, so that will need to be done next (at that
point I've been wondering whether we change omp_lock_t/omp_nest_lock_t
to something larger or what k
Hi!
On Mon, Jan 29, 2018 at 02:33:50PM -0600, Peter Bergner wrote:
> On 1/29/18 1:23 PM, Segher Boessenkool wrote:
> >> +#ifdef __linux__
> >> +/* Canonical GCC cpu name table. */
> >> +static const char *rs6000_supported_cpu_names[] =
> >> +{
> >> +#define RS6000_CPU(NAME, CPU, FLAGS) NAME,
> >>
On Mon, Jan 29, 2018 at 02:54:15PM -0600, Peter Bergner wrote:
> On 1/29/18 2:33 PM, Peter Bergner wrote:
> > The current version of that code looks like the following, which I should
> > copy instead. Unless you have a different suggestion?
> >
> > char *s;
> >
> > if (e->unknown_er
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On 1/29/18 6:30 PM, Segher Boessenkool wrote:
> On Mon, Jan 29, 2018 at 02:54:15PM -0600, Peter Bergner wrote:
> Why don't you want that? It let's the compiler say "hey silly human who
> can hardly type his own name correctly(*), you meant -mcpu-power8 where
> you said -mcpu=poewr8". It's a quite
On 1/29/18 6:15 PM, Segher Boessenkool wrote:
>> The current version of that code looks like the following, which I should
>> copy instead. Unless you have a different suggestion?
>
> Looks better yeah :-) Probably candidates_list_and_hint does similar
> nasty character counting, but we don't ha
Hi Bernhard:
Thanks your comment, I'll update that :)
Hi Jim:
> I don't see a copyright assigment for Ruslan. This patch is big enough that
> it requires one.
I'll ask him for that.
> The config.gcc patch is including dbxelf.h. Stabs support is obsolete and
> unmaintained. Do you really n
On 30-Jan-2018 2:37 AM, "Richard Sandiford"
wrote:
Sameera Deshpande writes:
> Hi!
>
> I am seeing multiple assembler errors with error message "Error:
> conditional branch out of range" for customer code.
>
> The root cause of the bug is that conditional branches are generated
> whose branch ta
On 01/07/2018 10:09 AM, Segher Boessenkool wrote:
> Hi!
>
> On Sun, Jan 07, 2018 at 12:58:25AM -0700, Jeff Law wrote:
>> As you note in the comments, the code we generate now is actually more
>> efficient so the test needs to be tweaked.
>>
>> Rather than checking the form in doloop, I check the f
This patch by Tobias Klauser adds the GNU/Linux syscall number for SH.
Bootstrapped on x86_64-pc-linux-gnu. Committed to mainline.
Ian
Index: gcc/go/gofrontend/MERGE
===
--- gcc/go/gofrontend/MERGE (revision 257163)
+++ gcc/go/go
stack-clash-protection will sometimes force a prologue to use pushes to
save registers. We try to limit how often that happens as it constrains
options for generating efficient prologue sequences for common cases.
We check the value of TO_ALLOCATE in ix86_compute_frame_layout and if
it's great
On 01/07/2018 10:09 AM, Segher Boessenkool wrote:
> Hi!
>
> On Sun, Jan 07, 2018 at 12:58:25AM -0700, Jeff Law wrote:
>> As you note in the comments, the code we generate now is actually more
>> efficient so the test needs to be tweaked.
>>
>> Rather than checking the form in doloop, I check the f
On 01/24/2018 04:31 AM, Kyrill Tkachov wrote:
> Hi all,
>
> This test fails to optimise away the PLUS reduction in the loop on arm
> targets when vectorisation
> is not enabled due to absence of SIMD instructions.
> From reading the logs and the PR I gather that the presence or absence
> of SIMD a
On 01/26/2018 06:25 AM, Richard Sandiford wrote:
> LRA was using a subreg offset of 0 whenever constraints matched
> two operands with different modes. That leads to an invalid offset
> (and ICE) on big-endian targets if one of the modes is narrower
> than a word. E.g. if a (reg:SI X) is matched
On 01/26/2018 07:10 AM, Martin Liška wrote:
> Hi.
>
> This explains why the option in $subject is needed when one uses dlopen
> API of a shared library.
>
> Ready for trunk?
> Martin
>
> gcc/ChangeLog:
>
> 2018-01-26 Martin Liska
>
> PR gcov-profile/83879
> * doc/gcov.texi: Docu
On 01/29/2018 01:38 PM, Richard Sandiford wrote:
> Ping
>
> Richard Sandiford writes:
>> James Greenhalgh writes:
>>> On Thu, Jan 04, 2018 at 11:27:56AM +, Richard Sandiford wrote:
Ping**2
>>>
>>> This is OK.
>>
>> Thanks.
>>
>>> It took me a while to get the hang of the interface - a w
On 01/29/2018 04:37 PM, Jakub Jelinek wrote:
> Hi!
>
> As mentioned in the PR, cunroll sometimes registers some SSA_NAMEs for
> renaming and then invokes some SCEV using functions before finally updating
> the SSA form. On the testcase we end up with 3 degenerate PHIs pointing at
> each other, so
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On Tue, 19 Dec 2017 11:37:43 +0300
Petr Ovtchenkov wrote:
ping^3
> On Thu, 16 Nov 2017 20:55:37 +0300
> Petr Ovtchenkov wrote:
>
> > On Wed, 20 Sep 2017 13:44:59 +0300
> > Petr Ovtchenkov wrote:
> >
> > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71212
> > >
> > > On Fri, 20 May 2016 16:
On 30 January 2018 at 09:28, Sameera Deshpande
wrote:
> On 30-Jan-2018 2:37 AM, "Richard Sandiford"
> wrote:
>
> Sameera Deshpande writes:
>> Hi!
>>
>> I am seeing multiple assembler errors with error message "Error:
>> conditional branch out of range" for customer code.
>>
>> The root cause of
On Tue, Jan 30, 2018 at 5:48 AM, Jeff Law wrote:
>
>
>
> stack-clash-protection will sometimes force a prologue to use pushes to
> save registers. We try to limit how often that happens as it constrains
> options for generating efficient prologue sequences for common cases.
>
> We check the value
On Mon, 29 Jan 2018, Kelvin Nilsen wrote:
> It was determined that the reported ICE occurs because a NULL value is
> passed from vectorizable_call () to
>
>targetm.vectorize.builtin_md_vectorized_function (
> callee, vectype_out, vectype_in).
>
> This patch avoids making this c
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