On 01/26/2018 06:25 AM, Richard Sandiford wrote: > LRA was using a subreg offset of 0 whenever constraints matched > two operands with different modes. That leads to an invalid offset > (and ICE) on big-endian targets if one of the modes is narrower > than a word. E.g. if a (reg:SI X) is matched to a (reg:QI Y), > the big-endian subreg should be (subreg:QI (reg:SI X) 3) rather > than (subreg:QI (reg:SI X) 0). Yup. That can't be right on big endian.
> > But this raises the issue of what the behaviour should be when the > matched operands occupy different numbers of registers. Should the > register numbers match, or should the locations of the lsbs match? > Although the documentation isn't clear, reload went for the second > interpretation (which seems the most natural to me): I can even recall seeing that interpretation in local-alloc.c and/or global.c from eons ago in the context of register tying. Both essentially punted doing anything smart in that case anyway leading to occasionally dreadful code for simple extensions. > > /* On a REG_WORDS_BIG_ENDIAN machine, point to the last register of a > multiple hard register group of scalar integer registers, so that > for example (reg:DI 0) and (reg:SI 1) will be considered the same > register. */ > > So I think this means that we can/must use the lowpart offset > unconditionally, rather than trying to separate out the multi-register > case. This also matches the LRA handling of constant integers, which > already uses lowpart subregs. > > The patch fixes gcc.target/aarch64/sve/extract_[34].c for aarch64_be. > > Tested on aarch64_be-none-elf, aarch64-linux-gnu and x86_64-linux-gnu. > OK to install? > > > 2018-01-26 Richard Sandiford <richard.sandif...@linaro.org> > > gcc/ > * lra-constraints.c (match_reload): Use subreg_lowpart_offset > rather than 0 when creating partial subregs. OK. Makes me wonder how many big endian LRA targets are getting significant use. jeff
