On Thu, Mar 23, 2017 at 05:24:31PM -0400, Jason Merrill wrote:
> On Thu, Mar 23, 2017 at 4:44 PM, Jakub Jelinek wrote:
> > The following C testcase shows how profiledbootstrap fails with checking
> > compiler. We have a (nested) FUNCTION_DECL inside of BLOCK_VARS of an
> > inline function, when i
On Thu, Mar 23, 2017 at 4:45 PM, Segher Boessenkool
wrote:
> On Thu, Mar 23, 2017 at 04:16:56PM +0100, Richard Biener wrote:
>> On Thu, Mar 23, 2017 at 3:58 PM, Segher Boessenkool
>> wrote:
>> > The algorithm fwprop uses never reconsiders a possible propagation,
>> > although it could succeed if
On Thu, Mar 23, 2017 at 7:20 PM, Bill Schmidt
wrote:
> Hi,
>
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80158 reports an ICE in
> SLSR while building 416.gamess on x86_64. This is a latent (but
> previously harmless) bug that was exposed by the fix for PR80054.
> When replacing any statement
On Fri, Mar 24, 2017 at 8:46 AM, Jakub Jelinek wrote:
> On Thu, Mar 23, 2017 at 05:24:31PM -0400, Jason Merrill wrote:
>> On Thu, Mar 23, 2017 at 4:44 PM, Jakub Jelinek wrote:
>> > The following C testcase shows how profiledbootstrap fails with checking
>> > compiler. We have a (nested) FUNCTION
On Fri, Mar 24, 2017 at 09:29:00AM +0100, Richard Biener wrote:
> Yeah, the thing BLOCK_NONLOCALIZED_VARS wants to do is optimize generated
> dwarf by adding a DW_AT_abstract_origin (just to refer to the
> subprogram DIE) but
Well, for FUNCTION_DECLs in BLOCK_VARS/BLOCK_NONLOCALIZED_VARS we actual
Hello.
Briefly described in the PR, running ICF (without any optimization level) can
create a thunk call
that does not use an SSA_NAME which is a default def of an argument of the
caller:
c (complex float b)
{
complex float arg.1;
float retval.0;
[100.00%]:
arg.1_2 = b;
retval.0_4 =
I would like to ping that. I'm not sure what's agreement after I read
discussion in: https://gcc.gnu.org/ml/gcc/2017-03/msg00070.html
Martin Sebor may know, CC'ing him.
Thanks,
Martin
On Fri, Mar 24, 2017 at 09:13:59AM +0100, Richard Biener wrote:
> >> https://gcc.gnu.org/ml/gcc-patches/2017-02/msg01485.html
> >>
> >> ?
> >
> > What about it? That suggestion would make fwprop do *less* useful work,
> > while in principle the problem is that it *already* does not enough!
>
> Ok
Hi all,
This PR complains that the bounds checking error strings contain a string placeholder for
"constant" or "lane"
which makes it hard for translators (who may want to move words around in a
different language for syntactical reasons).
This patch cleans that up. The bunching up of common f
On Fri, Mar 24, 2017 at 9:43 AM, Jakub Jelinek wrote:
> On Fri, Mar 24, 2017 at 09:29:00AM +0100, Richard Biener wrote:
>> Yeah, the thing BLOCK_NONLOCALIZED_VARS wants to do is optimize generated
>> dwarf by adding a DW_AT_abstract_origin (just to refer to the
>> subprogram DIE) but
>
> Well, for
On Fri, Mar 24, 2017 at 10:25 AM, Martin Liška wrote:
> Hello.
>
> Briefly described in the PR, running ICF (without any optimization level) can
> create a thunk call
> that does not use an SSA_NAME which is a default def of an argument of the
> caller:
>
> c (complex float b)
> {
> complex fl
On Fri, Mar 24, 2017 at 10:39 AM, Segher Boessenkool
wrote:
> On Fri, Mar 24, 2017 at 09:13:59AM +0100, Richard Biener wrote:
>> >> https://gcc.gnu.org/ml/gcc-patches/2017-02/msg01485.html
>> >>
>> >> ?
>> >
>> > What about it? That suggestion would make fwprop do *less* useful work,
>> > while i
Seems we have simply forgotten about the case of replacing with a
default-def.
Bootstrapped / tested on x86_64-unknown-linux-gnu, applied.
Richard.
2017-03-24 Richard Biener
PR tree-optimization/80167
* graphite-isl-ast-to-gimple.c
(translate_isl_ast_to_gimple::is_v
On 03/21/2017 09:00 AM, Jakub Jelinek wrote:
Hi!
doloop_condition_get computes cmp in several places, and in one of them
wants to fail if the condition inside of it isn't NE against const0_rtx.
The problem with that is that nothing checked what cmp is yet,
/* Check for (set (pc) (if_then_else
On 03/21/2017 02:21 PM, Jakub Jelinek wrote:
On Tue, Mar 21, 2017 at 06:53:34PM +0100, Jakub Jelinek wrote:
On Tue, Mar 21, 2017 at 08:41:43AM +0100, Jakub Jelinek wrote:
On Tue, Mar 21, 2017 at 08:38:20AM +1000, Richard Henderson wrote:
On 03/21/2017 07:15 AM, Jakub Jelinek wrote:
Not really
Hi Tom,
> On 23/03/17 18:25, Mike Stump wrote:
>> On Mar 23, 2017, at 8:46 AM, Tom de Vries wrote:
>>>
>>> I've run the gcc testsuite for target nvptx-none and ran into "test for
>>> excess errors" FAILs due to:
>>> ...
>>> sorry, unimplemented: target cannot support alloca.
>>
>> We'd encourage
On Fri, Mar 24, 2017 at 1:38 PM, Rainer Orth
wrote:
> Hi Tom,
>
>> On 23/03/17 18:25, Mike Stump wrote:
>>> On Mar 23, 2017, at 8:46 AM, Tom de Vries wrote:
I've run the gcc testsuite for target nvptx-none and ran into "test for
excess errors" FAILs due to:
...
sorry, uni
Hi Richard,
> Similar
>
> -m64
> FAIL: gcc.dg/Walloca-2.c note (test for warnings, line 38)
> FAIL: gcc.dg/Wvla-larger-than-2.c note (test for warnings, line 25)
>
> -m32
> FAIL: gcc.dg/Walloca-1.c (test for warnings, line 26)
> FAIL: gcc.dg/Walloca-1.c (test for excess errors)
> FAIL: gcc.dg/Wal
On Fri, Mar 24, 2017 at 12:45:28PM +0100, Richard Biener wrote:
> On Fri, Mar 24, 2017 at 9:43 AM, Jakub Jelinek wrote:
> > On Fri, Mar 24, 2017 at 09:29:00AM +0100, Richard Biener wrote:
> >> Yeah, the thing BLOCK_NONLOCALIZED_VARS wants to do is optimize generated
> >> dwarf by adding a DW_AT_ab
Hi Richard,
>> Similar
>>
>> -m64
>> FAIL: gcc.dg/Walloca-2.c note (test for warnings, line 38)
>> FAIL: gcc.dg/Wvla-larger-than-2.c note (test for warnings, line 25)
>>
>> -m32
>> FAIL: gcc.dg/Walloca-1.c (test for warnings, line 26)
>> FAIL: gcc.dg/Walloca-1.c (test for excess errors)
>> FAIL:
On Fri, Mar 24, 2017 at 06:37:10AM -0600, Jeff Law wrote:
> > 2017-03-21 Jakub Jelinek
> >
> > PR target/80102
> > * cfgcleanup.c (old_insns_match_p): Don't cross-jump in between /f
> > and non-/f instructions. If both i1 and i2 are frame related,
> > verify all CFA notes, thei
On Fri, Mar 24, 2017 at 3:46 AM, Jakub Jelinek wrote:
> On Thu, Mar 23, 2017 at 05:24:31PM -0400, Jason Merrill wrote:
>> On Thu, Mar 23, 2017 at 4:44 PM, Jakub Jelinek wrote:
>> > The following C testcase shows how profiledbootstrap fails with checking
>> > compiler. We have a (nested) FUNCTION
On Fri, Mar 24, 2017 at 09:07:54AM -0400, Jason Merrill wrote:
> >> And when it's cloned.
> >>
> >> But does it make sense for gen_decl_die to call
> >> dwarf2out_abstract_function when decl is null? That seems wrong.
> >
> > Before r144529 we had just:
> > if (DECL_ORIGIN (decl) != decl)
> >
On 03/24/2017 12:49 PM, Richard Biener wrote:
> On Fri, Mar 24, 2017 at 10:25 AM, Martin Liška wrote:
>> Hello.
>>
>> Briefly described in the PR, running ICF (without any optimization level)
>> can create a thunk call
>> that does not use an SSA_NAME which is a default def of an argument of the
On Fri, Mar 24, 2017 at 02:04:42PM +0100, Jakub Jelinek wrote:
> On Fri, Mar 24, 2017 at 06:37:10AM -0600, Jeff Law wrote:
> > > 2017-03-21 Jakub Jelinek
> > >
> > > PR target/80102
> > > * cfgcleanup.c (old_insns_match_p): Don't cross-jump in between /f
> > > and non-/f instructions. If
On Mon, Mar 06, 2017 at 12:53:38PM +0100, Richard Biener wrote:
> I think these are all bugs and should be fixed and thus this checking
> is good.
>
> Of course we'd better not break (too many) targets at this point...
I've tested it today and it passed on all targets I've tried make s-recog
on,
The boundary argument of the vec_load_bndry builtin needs to be
rewritten. At that point it must be constant already. The current
diagnostics in s390_expand_builtins is too late for this. The patch
adds an additional check for that builtin which will be triggered
already during preprocessing.
R
We accept reg + sym_ref as valid address if sym_ref is a literal pool
reference knowing that it will be rewritten as r13 + reg + offset.
However, annotate_constant_pool_refs was never able to handle that.
With the patch only single sym_refs are accepted.
Regression tested on s390x.
2017-03-24 A
On Fri, 24 Mar 2017, Jakub Jelinek wrote:
> On Mon, Mar 06, 2017 at 12:53:38PM +0100, Richard Biener wrote:
> > I think these are all bugs and should be fixed and thus this checking
> > is good.
> >
> > Of course we'd better not break (too many) targets at this point...
>
> I've tested it today
This patch series adds support for a new architecture level of S/390.
The most important feature of the new instruction set is the support
of single and extended precision floating point vector operations.
Binutils support is part of the 2.28 release:
https://sourceware.org/ml/binutils/2017-02/ms
This patch improves the handling of 128 bit vectors residing in GPRs
by adding more alternatives to the move pattern.
Regression tested on s390x.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel
* config/s390/constraints.md: Add comments.
(jKK): Reject element sizes > 8 bytes.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel
* config/s390/s390.md: Rename the cpu facilty vec to vx throughout
the file.
---
gcc/ChangeLog | 5 +
gcc/config/s390/s390.md | 46 +++---
2 files changed, 28 insertions(+), 23 del
This patch add the vector load element from immediate instruction to the
movdf/dd pattern for loading a FP zero and it removes the vector
instructions from the mov_64 pattern. These were pointless in
there because z13 support implies DFP support so these instructions will
always be matched in the m
The SD/SFmode move pattern used a wrong mnemonic for vector load
element.
On the vector load element instruction was an operand missing.
Regression tested on s390x.
2017-03-24 Andreas Krebbel
* config/s390/s390.md ("mov" SD_SF): Change vleg/vsteg to
vlef/vstef. Add missing op
Move the target support routine for the vector facility to the common
code file. This is required to enable the generic vectorization tests
on S/390. While doing this the too generic name for the check (vector)
is changed to s390_vx. The renaming required to modify all the
testcases currently us
The z13 vector support used the vector style comparison instructions
also for the scalar compares in vector registers. However, it is much
more convenient to just use the compare scalar instruction for that
purpose. The advantage is that this instruction generates a CC result
as our compares usua
This enables the vec_init pattern also for V4SF, V1TI, and V1TF.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel
* gcc.target/s390/vector/vec-init-2.c: New test.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel
* config/s390/s390.c (s390_expand_vec_init): Enable vector load
This adds support for the branch indirect instruction.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel
* config/s390/s390.md ("indirect_jump"): Turn insn definition into
expander.
("*indirect_jump", "*indirect2_jump"): New pattern definitions.
---
gcc/ChangeLog |
This patch adds support for the new bit operations introduced with
arch12.
The patch also renames the one complement pattern to the proper RTL
standard name.
2017-03-24 Andreas Krebbel
* config/s390/s390.c (s390_rtx_costs): Return low costs for the
canonical form of ~AND to ma
arch12 provides pop count vector instructions for bigger elements than
just chars.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel
* gcc.target/s390/vxe/popcount-1.c: New test.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel
* config/s390/vector.md ("popcountv16qi2", "popc
This reworks the fixuns_trunc* patterns a bit which got quite confusing
after adding z13 support. Now we just have a single RTL standard name
expander definition ("fixuns_trunc2") which then
multiplexes to either the emulation variants *_emu or the hardware
implementations.
gcc/ChangeLog:
2017-0
gcc/ChangeLog:
2017-03-24 Andreas Krebbel
* config/s390/s390.md ("*adddi3_sign", "*subdi3_sign", "mulditi3")
("mulditi3_2", "*muldi3_sign"): New patterns.
("muldi3", "*muldi3", "mulsi3", "*mulsi3"): Add an expander and
rename the pattern definition.
gcc/testsui
This patch covers the mechanical work of making the new architecture
option arch12 available wherever it will be needed later.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel
* gcc.target/s390/s390.exp: Run tests in arch12 and vxe dirs.
* lib/target-supports.exp: Add effec
This adds support for the vector load element and zero instruction and
makes sure it is used when initializing vectors with elements while
setting the rest to 0.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel
* config/s390/s390.c (s390_expand_vec_init): Use vllezl
instruction if po
This patch adds support for the new floating point vector elements (SF
and TF) introduced with arch12.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel
* config/s390/s390.c (s390_expand_vec_compare): Support other
vector floating point modes than just V2DF.
(s390_expand_vcond
Here, we were seeing that A:: is a template specialization, so we
tried to treat it as entering the scope of A. But since A is an
alias template, that doesn't make sense. Fixed by not considering
alias templates for this treatment.
Tested x86_64-pc-linux-gnu, applying to trunk.
commit 7fde9bb020
On 03/24/2017 03:29 AM, Martin Liška wrote:
I would like to ping that. I'm not sure what's agreement after I read
discussion in: https://gcc.gnu.org/ml/gcc/2017-03/msg00070.html
Martin Sebor may know, CC'ing him.
I haven't seen any followup posts after the one above. The other
(and I think mo
On Thu, Mar 23, 2017 at 05:09:58PM -0400, Jason Merrill wrote:
> On Thu, Mar 23, 2017 at 4:34 PM, Marek Polacek wrote:
> > On Tue, Mar 14, 2017 at 02:34:30PM -0400, Jason Merrill wrote:
> >> On Tue, Mar 14, 2017 at 2:33 PM, Jason Merrill wrote:
> >> > On Tue, Mar 7, 2017 at 12:10 PM, Marek Polace
On Mar 24, 2017, at 5:58 AM, Rainer Orth wrote:
> - { /* { dg-warning "statement may fall through" "" { target c } 23 } */
> - int a[i]; /* { dg-warning "statement may fall through" "" { target c++
> } 24 } */
> + { /* { dg-warning "statement may fall through" "" { target c } 24 } *
On 03/24/2017 05:54 AM, Richard Biener wrote:
On Fri, Mar 24, 2017 at 10:39 AM, Segher Boessenkool
wrote:
On Fri, Mar 24, 2017 at 09:13:59AM +0100, Richard Biener wrote:
https://gcc.gnu.org/ml/gcc-patches/2017-02/msg01485.html
?
What about it? That suggestion would make fwprop do *less* us
On 03/24/2017 07:35 AM, Jakub Jelinek wrote:
On Fri, Mar 24, 2017 at 02:04:42PM +0100, Jakub Jelinek wrote:
On Fri, Mar 24, 2017 at 06:37:10AM -0600, Jeff Law wrote:
2017-03-21 Jakub Jelinek
PR target/80102
* cfgcleanup.c (old_insns_match_p): Don't cross-jump in between /f
On 03/24/2017 09:37 AM, Martin Sebor wrote:
On 03/24/2017 03:29 AM, Martin Liška wrote:
I would like to ping that. I'm not sure what's agreement after I read
discussion in: https://gcc.gnu.org/ml/gcc/2017-03/msg00070.html
Martin Sebor may know, CC'ing him.
I haven't seen any followup posts af
* Claudiu Zissulescu [2017-03-20 12:43:26
+0100]:
> BLIBK register needs to be saved/restored in a interrupt. Fix this issue.
>
> gcc/
> 2016-09-21 Claudiu Zissulescu
>
> * config/arc/arc.c (arc_epilogue_uses): BLINK should be also
> restored when in interrupt.
> * config/
* Claudiu Zissulescu [2017-03-20 12:43:27
+0100]:
> ARC can use scaled offsets when loading (i.e. ld.as rA,[base,
> offset]). Where base and offset can be a register or an immediate
> operand. The scaling only applies on the offset part of the
> instruction. The compiler can accept an address
* Claudiu Zissulescu [2017-03-20 12:43:28
+0100]:
> No need for thread pointer in bare metal toolchain. Use TP register normally.
>
> gcc/
> 2016-09-29 Claudiu Zissulescu
>
> * config/arc/elf.h (ARGET_ARC_TP_REGNO_DEFAULT): Define.
> * config/arc/linux.h (ARGET_ARC_TP_REGNO_DEFA
On 03/24/2017 07:04 AM, Jakub Jelinek wrote:
On Fri, Mar 24, 2017 at 06:37:10AM -0600, Jeff Law wrote:
2017-03-21 Jakub Jelinek
PR target/80102
* cfgcleanup.c (old_insns_match_p): Don't cross-jump in between /f
and non-/f instructions. If both i1 and i2 are frame rel
The attached test case failed with gcc 4.9 and older, but started
compiling successfully with only the 1 expected warning with gcc 5.
Adding it to the test suite would ensure that this behavior doesn't
regress. Note that I have only tested it by compiling it manually, and
not by actually running it
* Claudiu Zissulescu [2017-03-20 12:43:29
+0100]:
> Missing case for ARCEM cpus. Add it.
>
> libgcc/
> 2016-09-29 Claudiu Zissulescu
>
> * config/arc/ieee-754/divdf3.S (__divdf3): Use __ARCEM__.
Looks good, thanks,
Andrew
> ---
> libgcc/config/arc/ieee-754/divdf3.S | 8
>
* Claudiu Zissulescu [2017-03-20 12:43:30
+0100]:
> Durring compilation process, (subreg (mem ...) ...) can occur. Hence,
> we need to check if the address of mem is a valid one. This patch is
> fixing this check by directly calling the address_operand, instead of
> calling move_double_src_opera
The following patch fixes
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80148
The test file is too big so there is no a testcase.
The patch was successfully bootstrapped and tested on x86-64.
Committed as rev. 246467.
Index: ChangeLog
===
Hi!
c*_mark_addressable doesn't look through VIEW_CONVERT_EXPRs that
vector subscripts are turned into, which means we don't diagnose
taking address of e.g. a vector element in a hard register.
On the other side, I think we want to support just normal vector
subscripting of vectors in hard regist
Hi!
As can be seen on the following testcase, when expanding an extension
in EXPAND_INITIALIZER context, we emit wrong extension operation
(one depending on the signedness of the result type rather than
on the signedness of the argument type, so e.g. extension of
unsigned int to long long int is d
It seemed odd to me that gcc was issuing a warning about compatibility
with traditional C that I couldn't turn off by pushing/popping
-Wtraditional over the problem area, so I made the attached (minor)
patch to fix it. Survives bootstrap, but the only testing I've done
with it has been compiling th
On Fri, 2017-03-24 at 14:10 -0400, Eric Gallager wrote:
> The attached test case failed with gcc 4.9 and older, but started
> compiling successfully with only the 1 expected warning with gcc 5.
> Adding it to the test suite would ensure that this behavior doesn't
> regress.
Thanks for posting thi
Hi!
I'm not aware of any target that would support sign extension of
something that can't be folded in the compiler into some type
larger than word/pointer. Zero extension is doable and assemble_variable
is able to deal with it by emitting low/high subregs of it (where the
low one will contain so
On Fri, Mar 24, 2017 at 11:47:35AM -0600, Jeff Law wrote:
> On 03/24/2017 07:35 AM, Jakub Jelinek wrote:
> > On Fri, Mar 24, 2017 at 02:04:42PM +0100, Jakub Jelinek wrote:
> > > On Fri, Mar 24, 2017 at 06:37:10AM -0600, Jeff Law wrote:
> > > > > 2017-03-21 Jakub Jelinek
> > > > >
> > > > >
Hi!
We ICE on the following testcase, because we attempt to use
DECL_BIT_FIELD_REPRESENTATIVE instead of original FIELD_DECL
in a COMPONENT_REF in a VL structure, but DECL_BIT_FIELD_REPRESENTATIVE's
DECL_FIELD_OFFSET is not really gimplified and even if it was,
it wouldn't be current. From the ex
On Fri, Mar 24, 2017 at 11:56:05AM -0600, Jeff Law wrote:
> > We could e.g.
> > #ifndef REG_CFA_NOTE
> > # define REG_CFA_NOTE(NAME) REG_NOTE(NAME)
> > #endif
> > and then
> > REG_CFA_NOTE (FRAME_RELATED_EXPR)
> > etc. in reg-notes.def (and document that REG_CFA_NOTE should be used for
> > notes re
On 3/24/17, David Malcolm wrote:
> On Fri, 2017-03-24 at 14:10 -0400, Eric Gallager wrote:
>> The attached test case failed with gcc 4.9 and older, but started
>> compiling successfully with only the 1 expected warning with gcc 5.
>> Adding it to the test suite would ensure that this behavior does
On Fri, Mar 24, 2017 at 12:54:35PM +0100, Richard Biener wrote:
> > I have implemented the "retry things" as well fwiw, but a) it is too
> > big and invasive for stage 4, and b) it kind of sucks, needs more
> > work, even more invasive. The workaround is cheap and solves the
> > immediate problem.
On Fri, Mar 24, 2017 at 03:05:21PM +0100, Andreas Krebbel wrote:
> 2017-03-24 Andreas Krebbel
>
> PR target/79904
> * config/s390/s390.c (s390_decompose_address): Reject reg +
> sym_ref literal pool references.
>
> gcc/testsuite/ChangeLog:
>
> 2017-03-24 Andreas Krebbel
>
On Fri, Mar 24, 2017 at 08:36:16PM +0100, Jakub Jelinek wrote:
> On Fri, Mar 24, 2017 at 11:56:05AM -0600, Jeff Law wrote:
> > > We could e.g.
> > > #ifndef REG_CFA_NOTE
> > > # define REG_CFA_NOTE(NAME) REG_NOTE(NAME)
> > > #endif
> > > and then
> > > REG_CFA_NOTE (FRAME_RELATED_EXPR)
> > > etc. i
PR 80103 provides a test case which results in an internal
compiler error when invoked with -mno-direct-move -mpower9-dform-
vector target options. The internal compiler error results because
these two target options are incompatible with each other.
The enclosed patch simply disables this parti
Update four citeseer.ist.psu.edu references with doi.org and one
with an updated one.
Applied.
Gerald
Index: news/profiledriven.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/news/profiledriven.html,v
retrieving revision 1.10
diff -u -r
On Fri, Mar 24, 2017 at 04:04:33PM -0600, Kelvin Nilsen wrote:
> PR 80103 provides a test case which results in an internal
> compiler error when invoked with -mno-direct-move -mpower9-dform-
> vector target options. The internal compiler error results because
> these two target options are incomp
This patch reworks the original patch I attached to the bug report, to try and
make it less hacky. It separates the bswap insns where there is hardware
support into separate read, write, and register swap instructions. This is
because the register allocators will try to push the bswap value in a r
Well instead of attaching the ChangeLog, I attached the patch without
ChangeLog.
Here is the ChangeLog entry for the patch:
[gcc]
2017-03-24 Michael Meissner
PR target/78543
* config/rs6000/rs6000.md (BSWAP): New mode iterator for modes
with hardware byte swap load/sto
Hi!
On Fri, Mar 24, 2017 at 08:36:16PM +0100, Jakub Jelinek wrote:
> + /* Skip over reg notes not related to CFI information. */
> + while (n1)
> + {
> + for (i = 0; i < ARRAY_SIZE (cfa_note_kinds) - 1; i++)
> + if (REG_NOTE_KIND (n1) == cfa_note_kinds[i]
Hi Mike,
On Fri, Mar 24, 2017 at 07:23:02PM -0400, Michael Meissner wrote:
> Reload fumbles in certain conditions.
Yeah. And it does not need bswap to get totally lost with this, so this
patch is a workaround, not a fix.
It does make things nicer though :-)
> LRA generates working code, but th
This fixes two PRs; we shouldn't try to avoid spilling a reg if it has
an alternate class it can use.
Bootstrapped and tested on x86_64-linux, approved by Vlad, committed.
Bernd
Index: gcc/ChangeLog
===
--- gcc/ChangeLog (revision
On Fri, Mar 24, 2017 at 06:37:46PM -0500, Segher Boessenkool wrote:
> On Fri, Mar 24, 2017 at 08:36:16PM +0100, Jakub Jelinek wrote:
> > + /* Skip over reg notes not related to CFI information. */
> > + while (n1)
> > + {
> > + for (i = 0; i < ARRAY_SIZE (cfa_note_kinds) - 1;
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