* Claudiu Zissulescu <claudiu.zissule...@synopsys.com> [2017-03-20 12:43:27
+0100]:
> ARC can use scaled offsets when loading (i.e. ld.as rA,[base,
> offset]). Where base and offset can be a register or an immediate
> operand. The scaling only applies on the offset part of the
> instruction. The compiler can accept an address like this:
>
> (plus:SI (mult:SI (reg:SI 2 r2 [orig:596 _2129 ] [596])
> (const_int 4 [0x4]))
> (const_int 60 [0x3c]))
>
> Hence, to emit this instruction we place the (const_int 60) into base
> and the register into offset to take advantage of the scaled offset
> facility of the load instruction. As a result the length of the load
> instruction is 8 bytes. However, the long_immediate_loadstore_operand
> predicate used for calculating the length attribute doesn't recognize
> this address and returns a wrong decision leading to a wrong length
> computation for a load instruction using the above address.
>
> gcc/
> 2016-09-21 Claudiu Zissulescu <claz...@synopsys.com>
>
> * config/arc/predicates.md (long_immediate_loadstore_operand):
> Consider scaled addresses cases.
Looks good thanks,
Andrew
> ---
> gcc/config/arc/predicates.md | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/gcc/config/arc/predicates.md b/gcc/config/arc/predicates.md
> index 0dec736..8dd8d55 100644
> --- a/gcc/config/arc/predicates.md
> +++ b/gcc/config/arc/predicates.md
> @@ -148,6 +148,11 @@
> {
> rtx x = XEXP (op, 1);
>
> + if ((GET_CODE (XEXP (op, 0)) == MULT)
> + && REG_P (XEXP (XEXP (op, 0), 0))
> + && CONSTANT_P (x))
> + return 1;
> +
> if (GET_CODE (x) == CONST)
> {
> x = XEXP (x, 0);
> --
> 1.9.1
>
