On Sun, 5 Jun 2016, Jan Hubicka wrote:
> Hi,
> both loop-ch and loop-ivcanon want to trottle down the heuristics on paths
> containing call. Testing for presence of GIMPLE_CALL is wrong for internal
> call and cheap builtins that are expanded inline.
>
> Bootstrapped/regtested x86_64-linux, OK?
On Fri, 3 Jun 2016, Jakub Jelinek wrote:
> On Tue, Jan 12, 2016 at 05:21:37PM +0300, Ilya Enkovich wrote:
> > > --- gcc/tree-vect-slp.c.jj 2016-01-08 21:45:57.0 +0100
> > > +++ gcc/tree-vect-slp.c 2016-01-11 12:07:19.633366712 +0100
> > > @@ -2999,12 +2999,9 @@ vect_get_constant_vecto
On Sun, 5 Jun 2016, Bernd Edlinger wrote:
> Ping...
>
> I think we all agreed on the general direction of this patch.
>
> The patch is basically unchanged from previous version,
> except one line in doc/extend.texi has been updated.
>
> So I would like to ask if it is OK for trunk.
The gimple_
The following patches have remained unreviewed for a week:
[gotools, libcc1] Update copyright dates
https://gcc.gnu.org/ml/gcc-patches/2016-05/msg02307.html
Richard already approved the update-copyright.py changes, but the actual
effects on gotools and libcc1 require either mainta
This patch fixes a few minor glitches that yield small irregularities in the
expanded code handed down to gigi, for example the declaration of subprograms
before that of the type of their parameters, types that are neither regular
nor Itypes, or return types with circularities. No functional chang
On Sat, Jun 4, 2016 at 4:25 AM, kugan wrote:
> Hi,
>
> PR71281 happens when we use factored out negate stmt in other
> reassociations. Since we don't set the uid for this stmt, we hit the
> gcc_assert (in reassoc_stmt_dominates_stmt_p) which checks for uid being
> set. Attached patch fixes this.
>
Hi,
yesterday I had the idea of this small clean-up: move the work done by
emit_diagnostic to a new non-variadic diagnostic_impl and use it to
implement the former and all the various inform, warning, permerror, etc
(lately we have the *_at_rich_loc variants too). Something similar can
be don
On Sun, Jun 5, 2016 at 12:54 PM, kugan
wrote:
> Hi All,
>
> For the testcase in PR71408 zero_one_operation seems still broken. In
> handling NEGATE_EXPR, as part of undistribute_ops_list, in
> zero_one_operation, we are doing propagate_op_to_single_use (op, stmt, def);
>
> This results in:
> - _1
On 03/06/2016 18:45, "Jakub Jelinek" wrote:
>On Thu, Jun 02, 2016 at 05:11:15PM +0100, Alan Hayward wrote:
>> * gcc.dg/vect/vect-live-1.c: New test.
>> * gcc.dg/vect/vect-live-2.c: New test.
>> * gcc.dg/vect/vect-live-5.c: New test.
>> * gcc.dg/vect/vect-live-slp-1.c: New tes
On Mon, Jun 06, 2016 at 10:03:12AM +0100, Alan Hayward wrote:
>
> On 03/06/2016 18:45, "Jakub Jelinek" wrote:
>
> >On Thu, Jun 02, 2016 at 05:11:15PM +0100, Alan Hayward wrote:
> >>* gcc.dg/vect/vect-live-1.c: New test.
> >>* gcc.dg/vect/vect-live-2.c: New test.
> >>* gcc.dg/vect/vec
This is a follow up to the initial implementation done in
https://gcc.gnu.org/ml/gcc-patches/2016-04/msg01710.html
It completes the transition to the new elaboration model, makes it a bit more
efficient by reusing already elaborated entities as much as possibke and fixes
an issue with function
This removes the specific mechanism present in Freeze_Entity to defer the
freezing of functions returning an incomplete type coming from a limited
context. It was invented to cope with the old elaboration model for
subprograms in gigi, which didn't really implement AI05-151 and AI05-019.
The new e
On 06/05/2016 06:02 PM, Bernd Edlinger wrote:
I think we all agreed on the general direction of this patch.
The patch is basically unchanged from previous version,
except one line in doc/extend.texi has been updated.
So I would like to ask if it is OK for trunk.
Are there any users of extrac
No functional change. Tested on x86_64-suse-linux, applied on the mainline.
2016-06-06 Eric Botcazou
* gcc-interface/decl.c (gnat_to_gnu_entity) : Remove
useless 'else' statements and tidy up.
: Fully deal with the declaration here.
: Use properly-typed consta
This ensures that we don't import an artificial location from the spec when an
object of a tagged type is elaborated.
Tested on x86_64-suse-linux, applied on the mainline.
2016-06-06 Eric Botcazou
* gcc-interface/trans.c (gnat_to_gnu): Rework special code dealing
with boolea
This is a regression present on the mainline and 6 branch: under some peculiar
circumstances, the qualified expression of an allocator can be elaborated
twice by gigi.
Tested on x86_64-suse-linux, applied on the mainline and 6 branch.
2016-06-06 Eric Botcazou
* gcc-interface/utils2
They are automatically set by the middle-end when the interrupt attribute is.
Tested on x86_64-suse-linux, applied on the mainline and 6 branch.
2016-06-06 Eric Botcazou
* gcc-interface/utils.c (gnat_internal_attribute_table): Add support
for noinline and noclone attributes.
On 05/30/2016 12:17 AM, Andi Kleen wrote:
Andi Kleen writes:
Ping^2!
I think patches #1 and #5 had unaddressed comments from Jan. I think you
should ping build system maintainers directly for #4.
Bernd
This fixes a small regression in ASIS mode introduced by the new elaboration
model for subprograms. Tested on x86_64-suse-linux, applied on the mainline.
2016-06-06 Eric Botcazou
* gcc-interface/decl.c (Gigi_Equivalent_Type): Make sure equivalent
types are present before ret
> On Sun, 5 Jun 2016, Jan Hubicka wrote:
>
> > Hi,
> > both loop-ch and loop-ivcanon want to trottle down the heuristics on paths
> > containing call. Testing for presence of GIMPLE_CALL is wrong for internal
> > call and cheap builtins that are expanded inline.
> >
> > Bootstrapped/regtested x86
On 29/05/16 23:05 +0200, Gerald Pfeifer wrote:
On Sat, 16 Jan 2016, Jonathan Wakely wrote:
This removes stray closing braces in the docs for dg-error, dg-warning
etc.
OK for trunk?
Yes.
Sorry for the delay. I expected someone else to pick this up for
review/approval, but now noticed that th
On 02/06/16 23:00 +0200, François Dumont wrote:
Hi
I was trying to play with tuple implementation and was annoyed by
repetition of _Head type when instantiating _Head_base so I thought
about this patch.
How do you like it ?
I still need to run tests, will do before commit, ok ?
L
Hi,
while looking into profile mismatches introduced by the backward threading pass
I noticed that the heuristics seems quite simplistics. First it should be
profile sensitive and disallow duplication when optimizing cold paths. Second
it should use estimate_num_insns because gimple statement coun
On Mon, 6 Jun 2016, Jan Hubicka wrote:
> > On Sun, 5 Jun 2016, Jan Hubicka wrote:
> >
> > > Hi,
> > > both loop-ch and loop-ivcanon want to trottle down the heuristics on paths
> > > containing call. Testing for presence of GIMPLE_CALL is wrong for internal
> > > call and cheap builtins that are
On 05/26/2016 04:36 PM, Richard Sandiford wrote:
This patch is effectively reverting a change from 1994. The reason
I think it's a hack is that store_bit_field_1 is creating a subreg
reference to one word of a field even though it has already proven that
the field spills into the following word.
On Fri, May 27, 2016 at 12:56 PM, Richard Biener
wrote:
> On Fri, May 27, 2016 at 1:11 PM, Bin.Cheng wrote:
>> On Fri, May 27, 2016 at 11:45 AM, Richard Biener
>> wrote:
>>> On Wed, May 25, 2016 at 1:22 PM, Bin Cheng wrote:
Hi,
As analyzed in PR68303 and PR69710, vectorizer generates
> This patch adds support for -mcpu=niagara7, corresponding to the SPARC
> M7 CPU as documented in the Oracle SPARC Architecture 2015 and the M7
> Processor Supplement. The patch also includes intrinsics support for
> all the VIS 4.0 instructions.
>
> This patch has been
On 06/02/2016 03:37 PM, H.J. Lu wrote:
Are you planning to submit your patch before July? If not, I will resubmit
mine and work out all the issues. It may take a long time to review and I
have patches to enable SSE, AVX, AVX512 f memset and memcpy, which
depend on it. I'd like to see them bef
> On Mon, 6 Jun 2016, Jan Hubicka wrote:
>
> > > On Sun, 5 Jun 2016, Jan Hubicka wrote:
> > >
> > > > Hi,
> > > > both loop-ch and loop-ivcanon want to trottle down the heuristics on
> > > > paths
> > > > containing call. Testing for presence of GIMPLE_CALL is wrong for
> > > > internal
> > > >
On Fri, Jun 03, 2016 at 02:09:44PM -0600, Martin Sebor wrote:
> I see. I've made the change in the latest update to the patch
> but I wasn't able to create a test case to verify it. Maybe
> that's because this is constexpr the COMPLEX_EXPR doesn't make
> it far enough to trigger a problem. If th
Lots of code calls dump_gimple_stmt then print a newline, however
dump_gimple_stmt will print a newline itself. This makes the vectorizer
debug
file messy. I think the confusion is because dump_generic_expr does NOT
print a
newline. This patch removes all prints of a newline direcly after a
dump_gi
Hi,
does this look better?
Honza
* gimple.c: Include builtins.h
(gimple_inexpensive_call_p): New function.
* gimple.h (gimple_inexpensive_call_p): Declare.
* tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Use it.
* tree-ssa-loop-ivcanon.c (tree_estima
Ping...
see https://gcc.gnu.org/ml/gcc-patches/2016-05/msg02010.html
Thanks
Bernd.
On 05/25/16 14:58, Bernd Edlinger wrote:
> Hi!
>
> This restricts the X constraint in asm statements, which
> can be easily folded by combine in something completely
> invalid.
>
> It is necessary to allow scratc
On 27/05/16 17:52, Jiong Wang wrote:
On 27/05/16 14:03, James Greenhalgh wrote:
On Tue, May 24, 2016 at 09:23:36AM +0100, Jiong Wang wrote:
* config/aarch64/aarch64-simd-builtins.def: Rename to
aarch64-builtins.def.
Why? We already have some number of intrinsics in here tha
Based on top of [1/6], this patch reimplement vector intrinsics for
conversion between floating-point and fixed-point.
gcc/
2016-06-06 Jiong Wang
* config/aarch64/aarch64-builtins.def (scvtf): Register vector modes.
(ucvtf): Likewise.
(fcvtzs): Likewise.
(fcvtzu)
These intrinsics were implemented before the instruction pattern
"aarch64_rsqrte" added, that these intrinsics were implemented through
inline assembly.
This mirgrate the implementation to builtin.
gcc/
2016-06-06 Jiong Wang
* config/aarch64/aarch64-builtins.def (rsqrte): New builtins
Similar as [3/6], these intrinsics were implemented before the instruction
pattern "aarch64_rsqrts" added, that these intrinsics were implemented
through inline assembly.
This mirgrate the implementation to builtin.
gcc/
2016-06-06 Jiong Wang
* config/aarch64/aarch64-builtins.def (rsqr
These intrinsics were implemented before "fabd_3" introduces.
Meanwhile
the patterns "fabd_3" and "*fabd_scalar3" can be merged into a
single "fabd3" using VALLF.
This patch migrate the implementation to builtins backed by this pattern.
gcc/
2016-06-01 Jiong Wang
* config/aarch64/aa
These intrinsics was implemented by inline assembly using "faddp" instruction.
There was a pattern "aarch64_addpv4sf" which supportsV4SF mode only while we can
extend this pattern to support VDQF mode, then we can reimplement these
intrinsics through builtlins.
gcc/
2016-06-06 Jiong Wang
On Sun, 2016-06-05 at 13:37 +0200, Bernd Schmidt wrote:
> On 06/03/2016 09:12 PM, David Malcolm wrote:
> > It's not clear to me if these approvals still hold.
>
> I was willing to go with it; I had a look through some of these
> patches
> and didn't spot anything untoward. To make it clear, this
Ping.
https://gcc.gnu.org/ml/gcc-patches/2016-05/msg02080.html
Thanks,
Kyrill
On 26/05/16 10:53, Kyrill Tkachov wrote:
Hi all,
In this PR we want to optimise:
int foo (int i)
{
return (i == 0) ? N : __builtin_clz (i);
}
on targets where CLZ is defined at zero to the constant 'N'.
This is de
On 05/26/2016 11:53 AM, Kyrill Tkachov wrote:
2016-05-26 Kyrylo Tkachov
PR middle-end/37780
* ifcvt.c (noce_try_ifelse_collapse): New function.
Declare prototype.
(noce_process_if_block): Call noce_try_ifelse_collapse.
* simplify-rtx.c (simplify_cond_clz_ctz): New functio
Ping.
https://gcc.gnu.org/ml/gcc-patches/2016-05/msg02078.html
Patches 1 and 3 have been approved.
Thanks,
Kyrill
On 26/05/16 10:52, Kyrill Tkachov wrote:
Hi all,
On arm we don't have a dedicated instruction that corresponds to a CTZ rtx but
we synthesise it
with an RBIT instruction followed
On 06/06/2016 04:17 PM, David Malcolm wrote:
I'm testing a revised patch now, incorporating the above, and renaming
s-selftests (plural) to s-selftest (singular) etc within
gcc/Makefile.in as requested by Bernhard elsewhere in this thread. I
assume that change is OK?
Sure.
Bernd
On Thu, May 26, 2016 at 10:52 AM, Kyrill Tkachov
wrote:
> Hi all,
>
> On arm we don't have a dedicated instruction that corresponds to a CTZ rtx
> but we synthesise it
> with an RBIT instruction followed by a CLZ. This is currently done at expand
> time.
> However, I'd like to push that step until
On Tue, 31 May 2016, Marek Polacek wrote:
> > diff --git gcc/testsuite/c-c++-common/attr-may-alias-1.c
> > gcc/testsuite/c-c++-common/attr-may-alias-1.c
> > index e69de29..978b9a5 100644
> > --- gcc/testsuite/c-c++-common/attr-may-alias-1.c
> > +++ gcc/testsuite/c-c++-common/attr-may-alias-1.c
>
On 06/03/2016 05:21 PM, H.J. Lu wrote:
> We can generate x86-64 TLS code sequences for general and local dynamic
> models without PLT, which uses indirect call via GOT:
>
> call *__tls_get_addr@GOTPCREL(%rip)
>
> instead of direct call:
>
> call __tls_get_addr[@PLT]
What are the actual pros and
On Tue, 31 May 2016, David Malcolm wrote:
> Ping:
> https://gcc.gnu.org/ml/gcc-patches/2016-04/msg01834.html
OK. What about field names in designated initializers (both C99-style and
old-style)?
--
Joseph S. Myers
jos...@codesourcery.com
On Mon, Jun 06, 2016 at 03:06:18PM +, Joseph Myers wrote:
> On Tue, 31 May 2016, Marek Polacek wrote:
>
> > > diff --git gcc/testsuite/c-c++-common/attr-may-alias-1.c
> > > gcc/testsuite/c-c++-common/attr-may-alias-1.c
> > > index e69de29..978b9a5 100644
> > > --- gcc/testsuite/c-c++-common/a
I applied this patch. Aaron's patch, AFAICT, would repeatedly fopen the error
file.
nathan
2016-06-05 Aaron Conole
Nathan Sidwell
PR libgcc/71400
* libgcov-driver-system.c (__gcov_error_file): Disable if IN_GCOV_TOOL.
(get_gcov_error_file): Check __gcov_error_file before trying t
On Mon, 6 Jun 2016, Marek Polacek wrote:
> > I don't see how this test is supposed to verify properties of the
> > composite type. I'd expect you to need to verify that something does not
> > get optimized away, that would get optimized away in the absence of
> > may_alias.
>
> Well, were it
This adds the missing functionality to filesystem::permissions().
PR libstdc++/71320
* src/filesystem/ops.cc (permissions(const path&, perms, error_code&)):
Add or remove permissions according to perms argument.
* testsuite/experimental/filesystem/operations/permis
Hi,
GCC now generates duplicated alias check in vectorizer when versioning loops.
In current implementation, DR_OFFSET and DR_INIT are added together too early
when creating structure dr_with_seg_len. This has two disadvantages: A)
structure dr_with_seg_len_pair_t is only canonicalized against
Hi all,
This small patch adds handling of the CSEL-type instructions to the Cortex-A57
scheduling model.
It is treated the same as simple ALU instructions.
With this patch I didn't see any overall differences in SPEC2006.
Bootstrapped and tested on arm-none-linux-gnueabihf and aarch64-linux-gn
On 05/06/16 21:15 +0300, Ville Voutilainen wrote:
{
public:
void swap(tuple&) noexcept { /* no-op */ }
+ // We need the default since we're going to define no-op
+ // allocator constructors.
+ tuple() = default;
+ // No-op allocator constructors.
+ template
Hi all,
This patch adds initial support for the Cortex-A73 processor through the
cortex-a73, cortex-a73.cortex-a35 and cortex-a73.cortex-a53 arguments to -mcpu
and -mtune.
The Cortex-A73 is an ARMv8-A processor.
Bootstrapped and tested on arm-none-linux-gnueabihf with an appropriately
patched
Hi all,
This patch adds initial support for the Cortex-A73 processor through the
cortex-a73, cortex-a73.cortex-a35 and cortex-a73.cortex-a53 arguments to -mcpu
and -mtune.
The Cortex-A73 is an ARMv8-A processor and the initial tuning is based on
the Cortex-A57 tuning (though not an exact copy).
On 02/06/16 17:09, Wilco Dijkstra wrote:
The Cortex-A57 scheduler is missing fcsel, so add it.
OK for commit?
ChangeLog:
2016-06-02 Wilco Dijkstra
* config/arm/cortex-a57.md (cortex_a57_fp_cpys): Add fcsel.
Ok from an arm perspective too.
Thanks,
Kyrill
---
diff --git a/gcc/c
Hi all,
When debugging the noce if-conversion passes one of the most frustrating and
time-consuming
things I have to do is find which of the dozen or so transforms triggered.
You'd think going through the cascade of if-gotos in noce_process_if_block in
gdb would work,
but this tends to be optim
* use lexicographical ordering, as "gcc -march=foo" does
* correct usage of @samp vs @option, add @samp where appropriate
* add armv6k, armv6z, arm6zk -march option values
* remove -march=ep9312, it is only valid for -mcpu
* add armv6s-m and document it, as it is no official ARM name.
Su
On Mon, 6 Jun 2016, Rainer Orth wrote:
> The following patches have remained unreviewed for a week:
>
> [gotools, libcc1] Update copyright dates
> https://gcc.gnu.org/ml/gcc-patches/2016-05/msg02307.html
>
> Richard already approved the update-copyright.py changes, but the actual
>
On 06/06/2016 09:32 AM, Bernd Edlinger wrote:
Ping...
see https://gcc.gnu.org/ml/gcc-patches/2016-05/msg02010.html
Thank you for working on the PR and sorry for the delay with LRA part of
review.
Change in lra-constraints.c is ok for me with the following change.
Instead of just
-
On 06/06/2016 06:28 PM, Kyrill Tkachov wrote:
This patch adds the name of the transform that succeeded in
if-conversion and prints it to the
dump file so that we can pinpoint the extact noce_try* function that
triggered.
Ok.
Bernd
On Mon, 2016-06-06 at 16:40 +0200, Bernd Schmidt wrote:
> On 06/06/2016 04:17 PM, David Malcolm wrote:
> > I'm testing a revised patch now, incorporating the above, and
> > renaming
> > s-selftests (plural) to s-selftest (singular) etc within
> > gcc/Makefile.in as requested by Bernhard elsewhere i
This patch is missing the invoke.texi changes to document all the new CPU
names.
--
Joseph S. Myers
jos...@codesourcery.com
On Mon, Jun 06, 2016 at 10:05:57AM +0200, Richard Biener wrote:
> So this ends up generating { a ? -1 : 0, b ? -1 : 0, ... }. That
Yes, that is already what we do now for loop vectorization.
> might be less optimal than doing { a, b, ... } ? { -1, -1 ... } : { 0, 0,
> .. }
Well, it would need
On 06/06/2016 11:04 AM, Vladimir Makarov wrote:
On 06/06/2016 09:32 AM, Bernd Edlinger wrote:
Ping...
see https://gcc.gnu.org/ml/gcc-patches/2016-05/msg02010.html
Thank you for working on the PR and sorry for the delay with LRA part of
review.
Change in lra-constraints.c is ok for me with t
On 06/06/2016 06:46 AM, Alan Hayward wrote:
Lots of code calls dump_gimple_stmt then print a newline, however
dump_gimple_stmt will print a newline itself. This makes the vectorizer
debug
file messy. I think the confusion is because dump_generic_expr does NOT
print a
newline. This patch removes a
On Mon, Jun 06, 2016 at 11:54:04AM -0600, Jeff Law wrote:
> >As for recog.c, I can not approve this as I am not a maintainer of it.
> >I only can say that the code looks questionable to me.
> I think the question on the recog part is a matter of how we choose to
> interpret what the "X" constraint
On 06/06/2016 12:01 PM, Jakub Jelinek wrote:
On Mon, Jun 06, 2016 at 11:54:04AM -0600, Jeff Law wrote:
As for recog.c, I can not approve this as I am not a maintainer of it.
I only can say that the code looks questionable to me.
I think the question on the recog part is a matter of how we choos
On Mon, Jun 06, 2016 at 12:04:04PM -0600, Jeff Law wrote:
> On 06/06/2016 12:01 PM, Jakub Jelinek wrote:
> >On Mon, Jun 06, 2016 at 11:54:04AM -0600, Jeff Law wrote:
> >>>As for recog.c, I can not approve this as I am not a maintainer of it.
> >>>I only can say that the code looks questionable to m
On Mon, Jun 6, 2016 at 11:04 AM, H.J. Lu wrote:
> On Mon, Jun 6, 2016 at 8:01 AM, Carlos O'Donell wrote:
>> On 06/03/2016 05:21 PM, H.J. Lu wrote:
>>> We can generate x86-64 TLS code sequences for general and local dynamic
>>> models without PLT, which uses indirect call via GOT:
>>>
>>> call *__
On Mon, 2016-06-06 at 17:27 +, Joseph Myers wrote:
> This patch is missing the invoke.texi changes to document all the new
> CPU
> names.
Hi,
correct, please consider adding the following patch to fix this.
Regards.
---
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index ce162a0..a
On Mon, 6 Jun 2016, Jakub Jelinek wrote:
On Mon, Jun 06, 2016 at 12:04:04PM -0600, Jeff Law wrote:
On 06/06/2016 12:01 PM, Jakub Jelinek wrote:
On Mon, Jun 06, 2016 at 11:54:04AM -0600, Jeff Law wrote:
As for recog.c, I can not approve this as I am not a maintainer of it.
I only can say that
On Mon, Jun 06, 2016 at 09:27:56PM +0200, Marc Glisse wrote:
> The last one would miss floating point registers (no 2 platforms use the
> same letter for those, hence my quest for something more generic).
>
> The goal of the experiment is described in PR59159 (for which "+X" is
> unlikely to be th
OK.
Jason
Hi!
On Mon, Jun 06, 2016 at 02:36:17PM +0200, Jakub Jelinek wrote:
> 2016-06-06 Martin Sebor
> Jakub Jelinek
>
> PR c++/70507
> PR c/68120
> * builtins.def (BUILT_IN_ADD_OVERFLOW_P, BUILT_IN_SUB_OVERFLOW_P,
> BUILT_IN_MUL_OVERFLOW_P): New builtins.
> *
On Mon, 2016-06-06 at 10:55 +0200, Paolo Carlini wrote:
> Hi,
>
> yesterday I had the idea of this small clean-up: move the work done
> by
> emit_diagnostic to a new non-variadic diagnostic_impl and use it to
> implement the former and all the various inform, warning, permerror,
> etc
> (lately
This adds another test case to -fself-test.
Successfully bootstrapped®rtested on x86_64-pc-linux-gnu.
OK for trunk?
gcc/ChangeLog:
* spellcheck.c (selftest::test_find_closest_string): New function.
(spellcheck_c_tests): Call the above.
---
gcc/spellcheck.c | 23 +
This adds another set of test cases to -fself-test, this time
for the basic functionality within pretty-print.c.
Successfully bootstrapped®rtested on x86_64-pc-linux-gnu.
OK for trunk?
gcc/ChangeLog:
* pretty-print.c: Include "selftest.h".
(pp_format): Fix comment.
(selft
Jeff approved an earlier version of this (as
unittests/test-ggc.c):
https://gcc.gnu.org/ml/gcc-patches/2015-10/msg03306.html
> Not terribly happy with that counter to used to create a big list
> to detect recursion. But I'm not offhand sure how to avoid without
> exposing more of the ggc system t
Dear all,
please find in attachment the first patch (of n) for the FAILED IMAGES
capability defined in the coarray TS 18508.
The patch adds support for three new intrinsic functions defined in
the TS for simulating a failure (fail image), checking an image status
(image_status) and getting the lis
On Fri, 3 Jun 2016, Jakub Jelinek wrote:
> On Fri, Jun 03, 2016 at 04:44:15PM +0200, Thomas Schwinge wrote:
> > Hi!
> >
> > Ping.
>
> I think it would be better to just add this support to newlib.
That suggestion doesn't really make sense to me. Why should newlib be
expected to follow the sam
On Fri, 3 Jun 2016, Marek Polacek wrote:
> This fixes an imprecise location info with abstract declarators. The problem
> was that when we build_id_declarator, the default location was input_location
> and we never attempted to use a more precise location. This patch does it.
>
> Bootstrapped/r
> > As far as I can
> > tell this just involves moving the start of namespace selftest
> > upwards a
> > bit in the files where we have tests.
>
> Yes, and it does seem cleaner to have all of the selftest code start
> like this:
>
> #if CHECKING_P
What are we gaining by ifdefing this? I woul
On Mon, Jun 06, 2016 at 05:53:50PM -0400, Trevor Saunders wrote:
> > > As far as I can
> > > tell this just involves moving the start of namespace selftest
> > > upwards a
> > > bit in the files where we have tests.
> >
> > Yes, and it does seem cleaner to have all of the selftest code start
> >
Hi David,
On 06/06/2016 22:26, David Malcolm wrote:
Thanks, looks like a nice simplification.
I see the new prototypes are wrapped in #ifdef ATTRIBUTE_GCC_DIAG.
Isn't that redundant? Looking at diagnostic-core.h, isn't it always
defined? (perhaps to the empty string)
Also the new functions ar
Hello!
Attached patch inserts CLD instruction at optimal location using
mode-switching pass, so there is no unnecessary access to flags reg in
paths that don't use calls or string instructions.
The patch handles insertions for interrupt handler functions and also
insertions for legacy TARGET_CLD
This patch adds built-in function support for the ISA 3.0 vabsub,
vabsduh, and vabsduw instructions.
I have bootstrapped and tested on powerpc64le-unkonwn-linux-gnu with no
regressions. Is this ok for the trunk?
I have also tested against the gcc-6 branch without regressions. Is
this ok for
The instruction sequence generated for 64-bit indirect calls on hppa does not
clobber register %r1, so
the clobbers for this register can be removed.
Tested on hppa64-hp-hpux11.11 with no observed regressions.
Dave
--
John David Anglin dave.ang...@bell.net
2016-06-06 John David Anglin
The attached patch generates indirect long calls to non-local functions on
64-bit hppa. This improves
opportunities for optimization and scheduling.
Tested on hppa64-hp-hpux11.11 with no observed regressions.
Dave
--
John David Anglin dave.ang...@bell.net
2016-06-06 John David Anglin
On Mon, Jun 06, 2016 at 11:57:49PM +0200, Jakub Jelinek wrote:
> On Mon, Jun 06, 2016 at 05:53:50PM -0400, Trevor Saunders wrote:
> > > > As far as I can
> > > > tell this just involves moving the start of namespace selftest
> > > > upwards a
> > > > bit in the files where we have tests.
> > >
>
Hi!
Ping.
On Tue, 31 May 2016 17:49:49 +0200, I wrote:
> OK for trunk, as follows?
>
> commit 3289032bf7fd7e4a0cce37e7acd71e3330729d83
> Author: Thomas Schwinge
> Date: Tue May 31 17:46:26 2016 +0200
>
> C/C++ OpenACC routine directive, undeclared name error: try to help the
> user, onc
On Mon, Jun 06, 2016 at 09:11:18PM +, Joseph Myers wrote:
> On Fri, 3 Jun 2016, Jakub Jelinek wrote:
>
> > On Fri, Jun 03, 2016 at 04:44:15PM +0200, Thomas Schwinge wrote:
> > > Hi!
> > >
> > > Ping.
> >
> > I think it would be better to just add this support to newlib.
>
> That suggestion
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