On 09/11/15 21:10, Tom de Vries wrote:
On 09/11/15 16:35, Tom de Vries wrote:
Hi,
this patch series for stage1 trunk adds support to:
- parallelize oacc kernels regions using parloops, and
- map the loops onto the oacc gang dimension.
The patch series contains these patches:
1Insert
On 09/11/15 21:12, Tom de Vries wrote:
On 09/11/15 16:35, Tom de Vries wrote:
Hi,
this patch series for stage1 trunk adds support to:
- parallelize oacc kernels regions using parloops, and
- map the loops onto the oacc gang dimension.
The patch series contains these patches:
1Insert
On Tue, Mar 08, 2016 at 11:16:28PM +0100, Andreas Schwab wrote:
> Marek Polacek writes:
>
> > diff --git gcc/testsuite/gcc.dg/pr70050.c gcc/testsuite/gcc.dg/pr70050.c
> > index e69de29..610456f 100644
> > --- gcc/testsuite/gcc.dg/pr70050.c
> > +++ gcc/testsuite/gcc.dg/pr70050.c
> > @@ -0,0 +1,11
On Tue, Mar 08, 2016 at 11:27:28PM +0100, Andreas Schwab wrote:
> On powerpc -m32:
>
> FAIL: gcc.dg/simd-7.c (test for excess errors)
> Excess errors:
> /daten/gcc/gcc-20160307/gcc/testsuite/gcc.dg/simd-7.c:8:1: warning: GCC
> vector returned by reference: non-standard ABI extension with no
> co
Ping*4.
Thanks,
Kyrill
On 02/03/16 13:46, Kyrill Tkachov wrote:
Ping*3.
Thanks,
Kyrill
On 24/02/16 13:48, Kyrill Tkachov wrote:
Ping*2
Thanks,
Kyrill
On 17/02/16 10:12, Kyrill Tkachov wrote:
Ping.
https://gcc.gnu.org/ml/gcc-patches/2016-02/msg00634.html
As mentioned before, this is actuall
Ping.
https://gcc.gnu.org/ml/gcc-patches/2016-03/msg00162.html
Thanks,
Kyrill
On 02/03/16 13:32, Kyrill Tkachov wrote:
Hi all,
I'm seeing the fails:
FAIL: gcc.target/arm/atomic_loaddi_2.c scan-assembler-times ldrd\tr[0-9]+,
r[0-9]+, \\[r[0-9]+\\] 1
FAIL: gcc.target/arm/atomic_loaddi_5.c scan-a
> Consider the attached test program. When built with -g in sparc64-*-*
> the resulting binary contains:
>
> - A .eh_frame segment containing CFA information for __libc_csu_init and
> __libc_csu_fini.
>
> - A .debug_frame segment containing CFA information for func2, func1 and
> main.
>
> T
This PR points out that nested functions returning VM types don't work as
expected (yeah, go figure). We got an ICE on the testcase because we were
trying to allocate variable-sized temporary instead of using __builtin_alloca
or its kin. Jakub suggested to follow what the C++ front end does here.
On Wed, Mar 09, 2016 at 12:05:51PM +0100, Marek Polacek wrote:
> This PR points out that nested functions returning VM types don't work as
> expected (yeah, go figure). We got an ICE on the testcase because we were
> trying to allocate variable-sized temporary instead of using __builtin_alloca
> o
Richard Biener writes:
> On Thu, 3 Mar 2016, James Greenhalgh wrote:
>
>>
>> Hi,
>>
>> ARM and AArch64 will still vectorize bb-slp-34.c - we're not operating
>> with a cost model so we vectorize to a 64-bit vector of two ints, and the
>> permutes are just element swaps.
>>
>> So, don't mark th
On Wed, Mar 09, 2016 at 12:53:02PM +0100, Rainer Orth wrote:
> Richard Biener writes:
>
> > On Thu, 3 Mar 2016, James Greenhalgh wrote:
> >
> >>
> >> Hi,
> >>
> >> ARM and AArch64 will still vectorize bb-slp-34.c - we're not operating
> >> with a cost model so we vectorize to a 64-bit vector of
On Wed, Mar 2, 2016 at 8:12 PM, Jakub Jelinek wrote:
> Hi!
>
> Like the recent patch for kmovw, vpextr{b,w} is another instruction
> with output being r32/m{8,16} rather than r32/m32, so we shouldn't use %k0
> for "m" constraint.
>
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for tr
Hi all,
I notice that the output code for our store exclusive patterns accesses
unallocated memory.
It wants to output an strexd instruction with a pair of consecutive registers
corresponding
to a DImode value. For that it creates the SImode top half of the DImode
register and puts it
into ope
On Sat, Mar 5, 2016 at 7:39 AM, Jakub Jelinek wrote:
> Hi!
>
> The r222470 commit changed =x into =v constraint in *truncdfsf_fast_mixed.
> The problem is that for some tunings we have a splitter
> /* For converting DF(xmm2) to SF(xmm1), use the following code instead of
>cvtsd2ss:
> unp
Hi James,
>> Unfortunately, the patch broke the test on sparc:
>>
>> FAIL: gcc.dg/vect/bb-slp-34.c -flto -ffat-lto-objects scan-tree-dump slp2
>> "basic block vectorized"
>> FAIL: gcc.dg/vect/bb-slp-34.c scan-tree-dump slp2 "basic block vectorized"
>>
>> While before the scan-tree-dump wasn't ru
I've committed this to gomp4 branch, to remove the squashing of debug
information. It appears to function correctly.
I'd had this patch for a while, but forgot to commit it.
nathan
2016-03-09 Nathan Sidwell
* config/nvptx/nvptx.c (nvptx_option_override): Don't kill debug level.
Index: c
I've committed this to trunk, to remove the squashing of debug information. It
appears to function correctly.
I'd had this patch for a while, but forgot to commit it.
nathan
2016-03-09 Nathan Sidwell
* config/nvptx/nvptx.c (nvptx_option_override): Don't kill debug level.
Index: config/n
The following fixes PR70143.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied.
Richard.
2016-03-09 Richard Biener
c-family/
PR c/70143
* c-common.c (strict_aliasing_warning): Add back
alias_sets_conflict_p check.
* gcc.dg/Wstrict-aliasing
On Wed, Mar 09, 2016 at 12:24:42PM +0100, Jakub Jelinek wrote:
> On Wed, Mar 09, 2016 at 12:05:51PM +0100, Marek Polacek wrote:
> > This PR points out that nested functions returning VM types don't work as
> > expected (yeah, go figure). We got an ICE on the testcase because we were
> > trying to
On Wed, Mar 09, 2016 at 03:34:40PM +0100, Marek Polacek wrote:
> --- gcc/testsuite/gcc.dg/nested-func-10.c
> +++ gcc/testsuite/gcc.dg/nested-func-10.c
> @@ -0,0 +1,45 @@
> +/* PR c/70093 */
> +/* { dg-do compile } */
> +/* { dg-options "" } */
> +
> +void
> +foo (int n)
> +{
> + struct S { int a[n
On Wed, Mar 09, 2016 at 02:06:03PM +0100, Uros Bizjak wrote:
> Let's go with the option 2) and always generate vec_concatv2df, as we
> only need it for [v,m,C] alternative. In the long term, we should
> enhance all patterns with new alternatives, but not in stage-4.
Ok, see patch below.
> Attache
Hello Nathan,
On Wed, 9 Mar 2016, Nathan Sidwell wrote:
> I've committed this to trunk, to remove the squashing of debug information.
> It appears to function correctly.
>
> I'd had this patch for a while, but forgot to commit it.
The preceding code special-casing response to -gstabs can also be
On Wed, Mar 09, 2016 at 03:45:45PM +0100, Jakub Jelinek wrote:
> Instead of the expecting warnings, wouldn't it be better to simply call
> __builtin_abort () in fn ()?
Maybe. Done.
> > + struct S x;
> > + x = fn ();
> > +
> > + if (x.a[0] != 42)
> > +__builtin_abort ();
> > +
> > + if (
On Wed, Mar 09, 2016 at 04:20:24PM +0100, Marek Polacek wrote:
> --- gcc/testsuite/gcc.dg/nested-func-10.c
> +++ gcc/testsuite/gcc.dg/nested-func-10.c
> @@ -0,0 +1,49 @@
> +/* PR c/70093 */
> +/* { dg-do compile } */
> +/* { dg-options "" } */
> +
> +void
> +foo (int n)
> +{
> + struct S { int a[n
On Wed, Mar 09, 2016 at 04:31:37PM +0100, Jakub Jelinek wrote:
> No, I meant:
> switch (n)
> {
> struct S x;
> case 1:
> fn ();
> break;
> case 2:
> fn2 ();
> break;
> case 3:
> x = fn ();
> if (x.a[0] != 42)
> __builtin_abort ();
>
On 03/09/16 09:55, Alexander Monakov wrote:
Hello Nathan,
On Wed, 9 Mar 2016, Nathan Sidwell wrote:
I've committed this to trunk, to remove the squashing of debug information.
It appears to function correctly.
I'd had this patch for a while, but forgot to commit it.
The preceding code specia
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied.
Richard.
2016-03-09 Richard Biener
Jakub Jelinek
PR tree-optimization/70138
* tree-vect-loop-manip.c (vect_update_ivs_after_vectorizer):
Also skip vect_double_reduction_def.
* gcc.dg/vect
On Wed, 9 Mar 2016, Nathan Sidwell wrote:
> On 03/09/16 09:55, Alexander Monakov wrote:
> > The preceding code special-casing response to -gstabs can also be removed
> > after this patch. Should I submit the (trivial) removal patch?
>
> No. I found that necessary to stop the testsuite testing s
Hi there,
This patch adds cortex-r8 to the list of cores using the armv7 multilib.
This patch is based on Thomas' multilib patch series:
https://gcc.gnu.org/ml/gcc-patches/2015-12/msg01584.html
https://gcc.gnu.org/ml/gcc-patches/2015-12/msg01585.html
https://gcc.gnu.org/ml/gcc-patches/2015-12/msg
On 08/03/16 14:56, Kyrill Tkachov wrote:
> Hi Andre,
>
> On 08/03/16 11:05, Andre Vieira (lists) wrote:
>> On 03/03/16 11:28, Kyrill Tkachov wrote:
>>> Hi Andre,
>>>
>>> On 02/03/16 12:21, Andre Vieira (lists) wrote:
Hi,
Tests used to check for "r8" which will not work because corte
Hi!
If a parameter is unused, eipa_sra replaces the SSA_NAMEs with that
PARM_DECL SSA_NAME_VAR with SSA_NAMEs with a VAR_DECL instead.
IMHO it is fine to do that even when all or some of its SSA_NAMEs
are (ab), but we need to copy that flag over.
Bootstrapped/regtested on x86_64-linux and i686-li
On Wed, Mar 09, 2016 at 03:51:04PM +0100, Jakub Jelinek wrote:
> Unfortunately, this really doesn't seem to work, I get ICEs on the
> testcases. I've tried to allow EXT_REX_SSE_REG_P for -mavx512f -mno-avx512vl
> just for MEM_P (operands[1]), but even that ICEs. Perhaps there are bugs
> in other
On Mar 9, 2016, at 8:57 AM, Andre Vieira (lists)
wrote:
>> I'm seeing a DejaGNU error while testing
>> RUNTESTFLAGS="arm.exp=pr45701-*.c":
>> ERROR: (DejaGnu) proc "^-" does not exist.
> 2016-03-09 Andre Vieira
>
> * gcc.target/arm/pr45701-1.c: Escape brackets.
Be sure to run test cases with
Hi!
The following testcase results in ICE in C++, while is properly rejected in
C. The problem is that the C++ FE treats some varargs builtins as magic and
doesn't perform any conversion on their args.
The first patch is just minimal, just ensures that we reject the builtins
without library imple
Dear Paul,
As you said on IRC the patch needs -l to apply. After that the gcc-5 branch
bootstrapped and regtested without any problem.
Thanks,
Dominique
> Le 7 mars 2016 à 11:22, Paul Richard Thomas a
> écrit :
>
> Dear All,
>
> I had promised to get the 5-branch up to date in respect of d
On March 9, 2016 6:02:26 PM GMT+01:00, Jakub Jelinek wrote:
>Hi!
>
>If a parameter is unused, eipa_sra replaces the SSA_NAMEs with that
>PARM_DECL SSA_NAME_VAR with SSA_NAMEs with a VAR_DECL instead.
>IMHO it is fine to do that even when all or some of its SSA_NAMEs
>are (ab), but we need to copy
On 07/03/16 11:02, Alan Lawrence wrote:
On 04/03/16 13:27, Richard Biener wrote:
I think to make it work with LTO you need to mark it 'Optimization'.
Also it's about
arrays so maybe
'Assume common declarations may be overridden with ones with a larger
trailing array'
also if we document it her
This patch is enabling work for the fix for PR c++/70105, so that
patch 2 in the kit can make use of location_t values when
sanitizing underlines.
This is an updated version of
"[PATCH 1/3] Delay location expansion within rich_location until printing"
https://gcc.gnu.org/ml/gcc-patches/2015-12
Dominique,
Many thanks for the verification. I will update my tree forthwith,
bootstrap, regtest and commit.
Thanks
Paul
On 9 March 2016 at 18:34, Dominique d'Humières wrote:
> Dear Paul,
>
> As you said on IRC the patch needs -l to apply. After that the gcc-5 branch
> bootstrapped and regtes
diagnostic_show_locus can sometimes do the wrong thing when handling
expressions built up from macros.
PR c++/70105 (currently marked as a P3 regression) has an example of
a diagnostic where over 500 lines of irrelevant source are printed,
and underlined, giving >1000 lines of useless spew to stde
On Wed, Mar 09, 2016 at 10:51:41AM -0800, Cesar Philippidis wrote:
> This patch teaches the c and c++ FEs how to update the list of clauses
> after calling c_finish_omp_clauses when parsing combined loop
> constructs. The problem here is, if an invalid clause isn't removed by
> the FE, the gimplifi
This patch teaches the c and c++ FEs how to update the list of clauses
after calling c_finish_omp_clauses when parsing combined loop
constructs. The problem here is, if an invalid clause isn't removed by
the FE, the gimplifier will ICE because the tree node representing the
clause contains incomple
On Tue, Mar 8, 2016 at 11:24 AM, Kelvin Nilsen
wrote:
>
> This patch adds support for two new Power9 instructions, xxpermr and vpermr,
> providing more efficient vector permutation operations on little-endian
> configurations. These new instructions are described in the Power ISA 3.0
> document.
On Wed, Mar 9, 2016 at 5:58 PM, Jakub Jelinek wrote:
> On Wed, Mar 09, 2016 at 03:51:04PM +0100, Jakub Jelinek wrote:
>> Unfortunately, this really doesn't seem to work, I get ICEs on the
>> testcases. I've tried to allow EXT_REX_SSE_REG_P for -mavx512f -mno-avx512vl
>> just for MEM_P (operands[1
On Tue, Mar 08, 2016 at 07:11:45PM +0100, Richard Biener wrote:
> I believe the safest fix is to re-instantiate the compatibility check by
> refactoring operand_equal_p to perform it on the full ref (but not recursions
> where it would be redundant and maybe too conservative).
> I've noticed this
Committed as revision 234093. Will close all the associated PRs.
Cheers
Paul
On 9 March 2016 at 19:33, Paul Richard Thomas
wrote:
> Dominique,
>
> Many thanks for the verification. I will update my tree forthwith,
> bootstrap, regtest and commit.
>
> Thanks
>
> Paul
>
> On 9 March 2016 at 18:34
On 03/01/16 13:08, Evandro Menezes wrote:
On 03/01/16 13:02, Wilco Dijkstra wrote:
Evandro Menezes wrote:
The meaning of these attributes are not clear to me. Is there a
reference somewhere about which insns are FP or SIMD or neither?
The meaning should be clear, "fp" is a floating point instr
While going through constexpr bugs looking for background
on one I'm currently working on I came across bug 65579 -
[C++11] gcc requires definition of a static constexpr member
even though it is not odr-used.
The bug points out that GCC (sometimes) emits references to
static constexpr data member
Hi,
I wrote attached patch to print the actual contents of the varmap
variable in tree-ssa-structalias.c.
Does it make sense to rewrite this into a dump_varmap/debug_varmap patch?
Thanks,
- Tom
diff --git a/gcc/tree-ssa-structalias.c b/gcc/tree-ssa-structalias.c
index de12380..9d02b14 100644
49 matches
Mail list logo
