Re: [PATCH v1 2/2] RISC-V: Adjust predicates for immediate shift operands

2020-11-17 Thread Jim Wilson
On Mon, Nov 16, 2020 at 2:45 PM Philipp Tomsich wrote: > This is an de-optimization only, if applied without patch 1 from the > series: the change to VRP ensures that the backend will never see a shift > wider than the immediate field. > The problem is that if a negative shift-amount makes it to

Re: [PATCH v1 2/2] RISC-V: Adjust predicates for immediate shift operands

2020-11-16 Thread Philipp Tomsich
Jim, On Mon, 16 Nov 2020 at 23:28, Jim Wilson wrote: > > On Mon, Nov 16, 2020 at 10:57 AM Philipp Tomsich wrote: >> >> In case a negative shift operand makes it through into the backend, >> it will be treated as unsigned and truncated (using a mask) to fit >> into the range 0..31 (for SImode) an

Re: [PATCH v1 2/2] RISC-V: Adjust predicates for immediate shift operands

2020-11-16 Thread Jim Wilson
On Mon, Nov 16, 2020 at 10:57 AM Philipp Tomsich wrote: > In case a negative shift operand makes it through into the backend, > it will be treated as unsigned and truncated (using a mask) to fit > into the range 0..31 (for SImode) and 0..63 (for DImode). > This is a de-optimization. This doesn'