> Sorry, I didn't realize that patch was missed. I attached new version.
>
> Changelog:
>
> 2012-05-29 Yuri Rumyantsev
>
>* config/i386/i386.c (x86_sched_reorder): New function.
>Added new function x86_sched_reorder.
Reading it, you get the impression that the new function is un
On Tue, May 29, 2012 at 12:01 PM, Igor Zamyatin wrote:
> Hi, Uros!
>
> Sorry, I didn't realize that patch was missed. I attached new version.
>
> Changelog:
>
> 2012-05-29 Yuri Rumyantsev
>
> * config/i386/i386.c (x86_sched_reorder): New function.
> Added new function x86_sched_reor
Hi, Uros!
Sorry, I didn't realize that patch was missed. I attached new version.
Changelog:
2012-05-29 Yuri Rumyantsev
* config/i386/i386.c (x86_sched_reorder): New function.
Added new function x86_sched_reorder.
As for multiply modes, currently we handled most frequent case f
Hello!
> Ping?
Please at least add and URL to the patch, it took me some time to
found the latest version [1], I'm not even sure if it is the latest
version...
I assume that you cleared all issues with middle-end and scheduler
maintainers, it is not clear from the message.
+ (1) IMUL instrcti
Ping?
On Sun, May 6, 2012 at 11:27 AM, Igor Zamyatin wrote:
> Ping. Could x86 maintainer(s) look at these changes?
>
> Thanks,
> Igor
>
> On Fri, Apr 20, 2012 at 4:04 PM, Igor Zamyatin wrote:
>> On Tue, Apr 17, 2012 at 12:27 AM, Igor Zamyatin wrote:
>>> On Fri, Apr 13, 2012 at 4:20 PM, Andrey B
Ping. Could x86 maintainer(s) look at these changes?
Thanks,
Igor
On Fri, Apr 20, 2012 at 4:04 PM, Igor Zamyatin wrote:
> On Tue, Apr 17, 2012 at 12:27 AM, Igor Zamyatin wrote:
>> On Fri, Apr 13, 2012 at 4:20 PM, Andrey Belevantsev wrote:
>>> On 13.04.2012 14:18, Igor Zamyatin wrote:
On Tue, Apr 17, 2012 at 12:27 AM, Igor Zamyatin wrote:
> On Fri, Apr 13, 2012 at 4:20 PM, Andrey Belevantsev wrote:
>> On 13.04.2012 14:18, Igor Zamyatin wrote:
>>>
>>> On Thu, Apr 12, 2012 at 5:01 PM, Andrey Belevantsev
>>> wrote:
On 12.04.2012 16:38, Richard Guenther wrote:
>
>>>
On Fri, Apr 13, 2012 at 4:20 PM, Andrey Belevantsev wrote:
> On 13.04.2012 14:18, Igor Zamyatin wrote:
>>
>> On Thu, Apr 12, 2012 at 5:01 PM, Andrey Belevantsev
>> wrote:
>>>
>>> On 12.04.2012 16:38, Richard Guenther wrote:
On Thu, Apr 12, 2012 at 2:36 PM, Igor Zamyatin
wrote
On 13.04.2012 14:18, Igor Zamyatin wrote:
On Thu, Apr 12, 2012 at 5:01 PM, Andrey Belevantsev wrote:
On 12.04.2012 16:38, Richard Guenther wrote:
On Thu, Apr 12, 2012 at 2:36 PM, Igor Zamyatin
wrote:
On Thu, Apr 12, 2012 at 4:24 PM, Richard Guenther
wrote:
On Thu, Apr 12, 2012 at 2:
On Fri, Apr 13, 2012 at 2:18 PM, Igor Zamyatin wrote:
> On Thu, Apr 12, 2012 at 5:01 PM, Andrey Belevantsev wrote:
>> On 12.04.2012 16:38, Richard Guenther wrote:
>>>
>>> On Thu, Apr 12, 2012 at 2:36 PM, Igor Zamyatin
>>> wrote:
On Thu, Apr 12, 2012 at 4:24 PM, Richard Guenther
On Thu, Apr 12, 2012 at 5:01 PM, Andrey Belevantsev wrote:
> On 12.04.2012 16:38, Richard Guenther wrote:
>>
>> On Thu, Apr 12, 2012 at 2:36 PM, Igor Zamyatin
>> wrote:
>>>
>>> On Thu, Apr 12, 2012 at 4:24 PM, Richard Guenther
>>> wrote:
On Thu, Apr 12, 2012 at 2:00 PM, Alexander Mona
On 12.04.2012 18:22, Richard Guenther wrote:
2012/4/12 Andrey Belevantsev:
On 12.04.2012 17:54, Richard Guenther wrote:
2012/4/12 Andrey Belevantsev:
On 12.04.2012 16:38, Richard Guenther wrote:
On Thu, Apr 12, 2012 at 2:36 PM, Igor Zamyatin
wrote:
On Thu, Apr 12, 2012 at 4:24 PM, Ri
2012/4/12 Andrey Belevantsev :
> On 12.04.2012 17:54, Richard Guenther wrote:
>>
>> 2012/4/12 Andrey Belevantsev:
>>>
>>> On 12.04.2012 16:38, Richard Guenther wrote:
On Thu, Apr 12, 2012 at 2:36 PM, Igor Zamyatin
wrote:
>
>
> On Thu, Apr 12, 2012 at 4:24 PM, Richar
On 12.04.2012 17:54, Richard Guenther wrote:
2012/4/12 Andrey Belevantsev:
On 12.04.2012 16:38, Richard Guenther wrote:
On Thu, Apr 12, 2012 at 2:36 PM, Igor Zamyatin
wrote:
On Thu, Apr 12, 2012 at 4:24 PM, Richard Guenther
wrote:
On Thu, Apr 12, 2012 at 2:00 PM, Alexander Monakov
2012/4/12 Andrey Belevantsev :
> On 12.04.2012 16:38, Richard Guenther wrote:
>>
>> On Thu, Apr 12, 2012 at 2:36 PM, Igor Zamyatin
>> wrote:
>>>
>>> On Thu, Apr 12, 2012 at 4:24 PM, Richard Guenther
>>> wrote:
On Thu, Apr 12, 2012 at 2:00 PM, Alexander Monakov
wrote:
>
>
On 12.04.2012 16:38, Richard Guenther wrote:
On Thu, Apr 12, 2012 at 2:36 PM, Igor Zamyatin wrote:
On Thu, Apr 12, 2012 at 4:24 PM, Richard Guenther
wrote:
On Thu, Apr 12, 2012 at 2:00 PM, Alexander Monakov wrote:
Can atom execute two IMUL in parallel? Or what exactly is the pipeline
be
On Thu, Apr 12, 2012 at 2:36 PM, Igor Zamyatin wrote:
> On Thu, Apr 12, 2012 at 4:24 PM, Richard Guenther
> wrote:
>> On Thu, Apr 12, 2012 at 2:00 PM, Alexander Monakov
>> wrote:
>>>
Can atom execute two IMUL in parallel? Or what exactly is the pipeline
behavior?
>>>
>>> As I underst
On Thu, Apr 12, 2012 at 4:24 PM, Richard Guenther
wrote:
> On Thu, Apr 12, 2012 at 2:00 PM, Alexander Monakov wrote:
>>
>>> Can atom execute two IMUL in parallel? Or what exactly is the pipeline
>>> behavior?
>>
>> As I understand from Intel's optimization reference manual, the behavior is
>> a
On Thu, Apr 12, 2012 at 2:00 PM, Alexander Monakov wrote:
>
>> Can atom execute two IMUL in parallel? Or what exactly is the pipeline
>> behavior?
>
> As I understand from Intel's optimization reference manual, the behavior is as
> follows: if the instruction immediately following IMUL has shorte
> Can atom execute two IMUL in parallel? Or what exactly is the pipeline
> behavior?
As I understand from Intel's optimization reference manual, the behavior is as
follows: if the instruction immediately following IMUL has shorter latency,
execution is stalled for 4 cycles (which is IMUL's laten
On Thu, Apr 12, 2012 at 12:20 PM, Igor Zamyatin wrote:
> On Wed, Apr 11, 2012 at 6:10 PM, Richard Guenther
> wrote:
>> On Wed, Apr 11, 2012 at 3:38 PM, Andi Kleen wrote:
>>> Igor Zamyatin writes:
>>>
Hi All!
It is known that imul placement is rather critical for Atom processors
>
On Wed, Apr 11, 2012 at 6:10 PM, Richard Guenther
wrote:
> On Wed, Apr 11, 2012 at 3:38 PM, Andi Kleen wrote:
>> Igor Zamyatin writes:
>>
>>> Hi All!
>>>
>>> It is known that imul placement is rather critical for Atom processors
>>> and changes try to improve imul scheduling for Atom.
>>>
>>> Th
On Wed, Apr 11, 2012 at 5:38 PM, Andi Kleen wrote:
> Igor Zamyatin writes:
>
>> Hi All!
>>
>> It is known that imul placement is rather critical for Atom processors
>> and changes try to improve imul scheduling for Atom.
>>
>> This gives +5% performance on several tests from new OA 2.0 testsuite
On Wed, Apr 11, 2012 at 3:38 PM, Andi Kleen wrote:
> Igor Zamyatin writes:
>
>> Hi All!
>>
>> It is known that imul placement is rather critical for Atom processors
>> and changes try to improve imul scheduling for Atom.
>>
>> This gives +5% performance on several tests from new OA 2.0 testsuite
Igor Zamyatin writes:
> Hi All!
>
> It is known that imul placement is rather critical for Atom processors
> and changes try to improve imul scheduling for Atom.
>
> This gives +5% performance on several tests from new OA 2.0 testsuite
> from EEMBC.
>
> Tested for i386 and x86-64, ok for trunk?
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