Re: [PATCH][RISC-V][PR target/70557] Improve storing 0 to memory on rv32

On 5/21/25 11:41 PM, Shreya Munnangi wrote: Patch is originally from Siarhei Volkau >. RISC-V has a zero register (x0) which we can use to store zero into memory without loading the constant into a distinct register. Adjust the constraints of the 32-bit movdi_32bit

Re: [PATCH][RISC-V][PR target/70557] Improve storing 0 to memory on rv32

On 5/21/25 12:20 PM, Shreya Munnangi wrote: Patch is originally from Siarhei Volkau >. RISC-V has a zero register (x0) which we can use to store zero into memory without loading the constant into a distinct register. Adjust the constraints of the 32-bit movdi_32bit