Re: RFA: MN10300: Add support for SETLB and Lcc instructions

2011-05-03 Thread Richard Henderson
On 05/03/2011 05:13 AM, Nick Clifton wrote: > The problem I found here was that I did not know how to find all of > the test-and-loop-back insns if the loop spanned multiple blocks. > The revised patch includes a comment saying that loops spanning > multiple blocks could be supported, but I would l

Re: RFA: MN10300: Add support for SETLB and Lcc instructions

2011-05-03 Thread Nick Clifton
Hi Richard, Thanks for the patch review. Sorry for not responding earlier, but some other work got in the way. I have attached a revised patch which addresses all of the points you raised except one: + else if (loop->header != loop->latch + reason = "it is not a simp

Re: RFA: MN10300: Add support for SETLB and Lcc instructions

2011-03-08 Thread Richard Henderson
> + /* If the comparison has not already been split out of the branch > + then do so now. */ > + if (REGNO (cmp_reg) != CC_REG) > +{ > + rtx cmp; > + > + cmp = emit_insn_before (gen_cmpsi (cmp_reg, XEXP (comparison, 1)), > branch); > + > + DUMP ("Extracted comparison from

Re: RFA: MN10300: Add support for SETLB and Lcc instructions

2011-03-08 Thread Nick Clifton
Hi Richard, Thanks for the review. Attached is a revised patch which addresses the issues that you raised: +/* A special mode used to distinguish the Lcc branch instruction + from the Bcc branch instruction. */ +CC_MODE (CC_LCC); Why not just use an unspec on the lcc insn. I should