Re: [Patch 1/4][Aarch64] v2: Implement Aarch64 SIMD ABI

2019-02-13 Thread Steve Ellcey
On Wed, 2019-02-13 at 16:54 +, Szabolcs Nagy wrote: > > +/* Table of machine attributes. */ > > +static const struct attribute_spec aarch64_attribute_table[] = > > +{ > > + /* { name, min_len, max_len, decl_req, type_req, fn_type_req, > > + affects_type_identity, handler, exclude } */

Re: [Patch 1/4][Aarch64] v2: Implement Aarch64 SIMD ABI

2019-02-13 Thread Szabolcs Nagy
On 08/11/2018 17:52, Steve Ellcey wrote: > This is a resubmission of patch 1 to support the Aarch64 SIMD ABI [1] in > GCC, it does not have any functional changes from the last submit. > > The significant difference between the standard ARM ABI and the SIMD ABI > is that in the normal ABI a callee

Re: [EXT] Re: [Patch 1/4][Aarch64] v2: Implement Aarch64 SIMD ABI

2018-12-12 Thread Richard Sandiford
Steve Ellcey writes: > On Wed, 2018-12-12 at 11:39 +, Richard Sandiford wrote: >> >> Steve Ellcey writes: >> > On Fri, 2018-12-07 at 17:34 +, Richard Sandiford wrote: >> > > > + (match_operand:TX 2 "register_operand" "w")) >> > > > + (set (mem:TX (plus:P (match_dup 0) >> > >

Re: [EXT] Re: [Patch 1/4][Aarch64] v2: Implement Aarch64 SIMD ABI

2018-12-12 Thread Steve Ellcey
On Wed, 2018-12-12 at 11:39 +, Richard Sandiford wrote: > > Steve Ellcey writes: > > On Fri, 2018-12-07 at 17:34 +, Richard Sandiford wrote: > > > > + (match_operand:TX 2 "register_operand" "w")) > > > > + (set (mem:TX (plus:P (match_dup 0) > > > > + (match_o

Re: [Patch 1/4][Aarch64] v2: Implement Aarch64 SIMD ABI

2018-12-12 Thread Richard Sandiford
Steve Ellcey writes: > On Fri, 2018-12-07 at 17:34 +, Richard Sandiford wrote: >> > + (match_operand:TX 2 "register_operand" "w")) >> > + (set (mem:TX (plus:P (match_dup 0) >> > + (match_operand:P 5 "const_int_operand" "n"))) >> > + (match_operand:TX 3 "r

Re: [Patch 1/4][Aarch64] v2: Implement Aarch64 SIMD ABI

2018-12-11 Thread Steve Ellcey
On Fri, 2018-12-07 at 17:34 +, Richard Sandiford wrote: > > I'm not an expert on this stuff, but it looks like: > > struct cgraph_node *node = cgraph_node::get (fndecl); > return node && node->simdclone; > > might work. But in some ways it would be cleaner to add the > aarch64_vector_pc

Re: [Patch 1/4][Aarch64] v2: Implement Aarch64 SIMD ABI

2018-12-07 Thread Richard Sandiford
Sorry for the slow review. Steve Ellcey writes: > @@ -1470,6 +1479,45 @@ aarch64_hard_regno_mode_ok (unsigned regno, > machine_mode mode) >return false; > } > > +/* Return true if this is a definition of a vectorized simd function. */ > + > +static bool > +aarch64_simd_decl_p (tree fndec

[Patch 1/4][Aarch64] v2: Implement Aarch64 SIMD ABI

2018-11-08 Thread Steve Ellcey
This is a resubmission of patch 1 to support the Aarch64 SIMD ABI [1] in GCC, it does not have any functional changes from the last submit. The significant difference between the standard ARM ABI and the SIMD ABI is that in the normal ABI a callee saves only the lower 64 bits of registers V8-V15,