On Wed, 2018-12-12 at 11:39 +0000, Richard Sandiford wrote: > > Steve Ellcey <sell...@marvell.com> writes: > > On Fri, 2018-12-07 at 17:34 +0000, Richard Sandiford wrote: > > > > + (match_operand:TX 2 "register_operand" "w")) > > > > + (set (mem:TX (plus:P (match_dup 0) > > > > + (match_operand:P 5 "const_int_operand" > > > > "n"))) > > > > + (match_operand:TX 3 "register_operand" "w"))])] > > > > > > Think this last part should be: > > > > > > (set (mem:TX (plus:P (plus:P (match_dup 0) > > > (match_dup 4)) > > > (match_operand:P 5 "const_int_operand" > > > "n"))) > > > (match_operand:TX 3 "register_operand" "w"))])] > > > > I think you are right about this. What I have for > > loadwb_pair<TX:mode>_<P:mode> matches what is there for > > loadwb_pair<GPF:mode>_<P:mode>. If this one is wrong, then I assume > > the others are wrong too? This won't make a practical difference since > > we call these with gen_loadwb_pair*_* calls and not via pattern > > recognition, but still they should be right. Should I change them > > all? I did not change this as part of this patch. > > I think we should fix the new pattern, but I agree fixing the others > should be a separate patch. > > Patch LGTM with that change.
I am not sure this is right. I created a patch (separate from any of the SIMD changes) to fix the storewb_pair<GPI:mode>_<P:mode> and storewb_pair<GPF:mode>_<P:mode> and when I try to build GCC with that change, gcc aborts while building libgcc. I didn't think this change could affect the build but it appears to do so. /home/sellcey/gcc-md-fix/src/gcc/libgcc/static-object.mk:17: recipe for target 'addtf3.o' failed make[1]: *** [addtf3.o] Error 1 Please submit a full bug report, with preprocessed source if appropriate. Please include the complete backtrace with any bug report. See <https://gcc.gnu.org/bugs/> for instructions. /home/sellcey/gcc-md-fix/src/gcc/libgcc/static-object.mk:17: recipe for target 'unwind-dw2.o' failed make[1]: *** [unwind-dw2.o] Error 1 0x86bc7b dwarf2out_frame_debug_expr /home/sellcey/gcc-md-fix/src/gcc/gcc/dwarf2cfi.c:1910 0x86acaf dwarf2out_frame_debug_expr /home/sellcey/gcc-md-fix/src/gcc/gcc/dwarf2cfi.c:1616 0x86c13b dwarf2out_frame_debug /home/sellcey/gcc-md-fix/src/gcc/gcc/dwarf2cfi.c:2169 0x86c13b scan_insn_after /home/sellcey/gcc-md-fix/src/gcc/gcc/dwarf2cfi.c:2511 The patch I was trying was: diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 6657316..3530dd4 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -1464,7 +1464,8 @@ (set (mem:GPI (plus:P (match_dup 0) (match_dup 4))) (match_operand:GPI 2 "register_operand" "r")) - (set (mem:GPI (plus:P (match_dup 0) + (set (mem:GPI (plus:P (plus:P (match_dup 0) + (match_dup 4)) (match_operand:P 5 "const_int_operand" "n"))) (match_operand:GPI 3 "register_operand" "r"))])] "INTVAL (operands[5]) == INTVAL (operands[4]) + GET_MODE_SIZE (<GPI:MODE>mode)" @@ -1480,7 +1481,8 @@ (set (mem:GPF (plus:P (match_dup 0) (match_dup 4))) (match_operand:GPF 2 "register_operand" "w")) - (set (mem:GPF (plus:P (match_dup 0) + (set (mem:GPF (plus:P (plus:P (match_dup 0) + (match_dup 4)) (match_operand:P 5 "const_int_operand" "n"))) (match_operand:GPF 3 "register_operand" "w"))])] "INTVAL (operands[5]) == INTVAL (operands[4]) + GET_MODE_SIZE (<GPF:MODE>mode)"
