On 09/01/13 16:36, Tejas Belagod wrote:
Hi,
Attached is a patch that implements support for AdvSIMD instruction LD1R.
Tested on aarch64-none-elf. OK to commit on aarch64-4.7-branch?
Thanks,
Tejas Belagod
ARM.
2013-01-09 Tejas Belagod
gcc/
* config/aarch64/aarch64-simd.md (*aarch6
PING.
Tejas Belagod wrote:
Hi,
Attached is a patch that implements support for AdvSIMD instruction LD1R.
Tested on aarch64-none-elf. OK to commit on aarch64-4.7-branch?
Thanks,
Tejas Belagod
ARM.
2013-01-09 Tejas Belagod
gcc/
* config/aarch64/aarch64-simd.md (*aarch64_simd_ld1r):
Hi,
Attached is a patch that implements support for AdvSIMD instruction LD1R.
Tested on aarch64-none-elf. OK to commit on aarch64-4.7-branch?
Thanks,
Tejas Belagod
ARM.
2013-01-09 Tejas Belagod
gcc/
* config/aarch64/aarch64-simd.md (*aarch64_simd_ld1r): New.
* config/aarch