Re: [PING][Patch, AArch64-4.7] Implement support for LD1R.

[Tejas Belagod]

PING.

Tejas Belagod wrote:

Hi,

Attached is a patch that implements support for AdvSIMD instruction LD1R.

Tested on aarch64-none-elf. OK to commit on aarch64-4.7-branch?

Thanks,
Tejas Belagod
ARM.

2013-01-09  Tejas Belagod  <tejas.bela...@arm.com>

gcc/
        * config/aarch64/aarch64-simd.md (*aarch64_simd_ld1r<mode>): New.
        * config/aarch64/iterators.md (VALLDI): New.

testsuite/
        * gcc.target/aarch64/aarch64/vect-ld1r-compile-fp.c: New.
        * gcc.target/aarch64/vect-ld1r-compile.c: New.
        * gcc.target/aarch64/vect-ld1r-fp.c: New.
        * gcc.target/aarch64/vect-ld1r.c: New.
        * gcc.target/aarch64/vect-ld1r.x: New.