Re: [PATCH v2 1/3] RISC-V: movmem for RISCV with V extension

On 12/19/23 10:28 PM, Jeff Law wrote: On 12/19/23 02:53, Sergei Lewis wrote: gcc/ChangeLog * config/riscv/riscv.md (movmem): Use riscv_vector::expand_block_move, if and only if we know the entire operation can be performed using one vector load followed by one vector stor

Re: [PATCH v2 1/3] RISC-V: movmem for RISCV with V extension

Hi, this patchset has been tested with the following configurations: rv64gcv_zvl128b rv64gcv_zvl256b rv32imafd_zve32x1p0 rv32gc_zve64f_zvl128b Will fix the formatting in v3. Thanks On Wed, Dec 20, 2023 at 5:28 AM Jeff Law wrote: > > > On 12/19/23 02:53, Sergei Lewis wrote: > > gcc/ChangeLog

Re: [PATCH v2 1/3] RISC-V: movmem for RISCV with V extension

On 12/19/23 02:53, Sergei Lewis wrote: gcc/ChangeLog * config/riscv/riscv.md (movmem): Use riscv_vector::expand_block_move, if and only if we know the entire operation can be performed using one vector load followed by one vector store gcc/testsuite/ChangeLog PR target

[PATCH v2 1/3] RISC-V: movmem for RISCV with V extension

gcc/ChangeLog * config/riscv/riscv.md (movmem): Use riscv_vector::expand_block_move, if and only if we know the entire operation can be performed using one vector load followed by one vector store gcc/testsuite/ChangeLog PR target/112109 * gcc.target/riscv/rvv/base/movmem-1.