Re: [PATCH v1 0/1]RISC-V :The following changes enable P8700 MIPS processor for RISC-V.

2025-05-17 Thread Jeff Law
On 5/12/25 5:20 AM, Umesh Kalappa wrote: --- gcc/config/riscv/mips-p8700.md | 139 +++ gcc/config/riscv/riscv-cores.def | 5 ++ gcc/config/riscv/riscv-opts.h| 3 +- gcc/config/riscv/riscv.cc| 22 + gcc/config/riscv/riscv.md| 3

[PATCH v1 0/1]RISC-V :The following changes enable P8700 MIPS processor for RISC-V.

2025-05-12 Thread Umesh Kalappa
--- gcc/config/riscv/mips-p8700.md | 139 +++ gcc/config/riscv/riscv-cores.def | 5 ++ gcc/config/riscv/riscv-opts.h| 3 +- gcc/config/riscv/riscv.cc| 22 + gcc/config/riscv/riscv.md| 3 +- 5 files changed, 170 insertions(+), 2 deletions