On 5/12/25 5:20 AM, Umesh Kalappa wrote:
---
gcc/config/riscv/mips-p8700.md | 139 +++++++++++++++++++++++++++++++
gcc/config/riscv/riscv-cores.def | 5 ++
gcc/config/riscv/riscv-opts.h | 3 +-
gcc/config/riscv/riscv.cc | 22 +++++
gcc/config/riscv/riscv.md | 3 +-
5 files changed, 170 insertions(+), 2 deletions(-)
As I mentioned earlier, you still need to include an insn reservation
for all the insn types mentioned in riscv.md -- even types not used by
your design.
The core problem is someone could ask for code generation using an
extension you do not support on your design, but with your design's
tuning. Concretely, someone could ask for the V extension via a -march
flag but p8700 tuning via -mtune.
That will trip an assert in the RISC-V backend.
Go to riscv.md and fine this attribute:
(define_attr "type"
Every type listed in that attribute must have a mapping to a function
unit in your scheduler model.
(define_attr "type"
As an example look at xiangshan.md and look for the reservation
"xiangshan_alu_unknown". You need to so something similar for the p8700.
Jeff
