Hello,
> This patch [actually the change at 201915] also broke X86 Darwin
> bootstrap/ABI: pr59269
> - ISTM that SSE_REGNO_P() now returns true for a different set of registers
> than before the patch,
> I've attached a starting-point to fix to the PR - but would welcome any
> additional inputs
Hi Kirill,
On 23 Aug 2013, at 08:35, Kirill Yukhin wrote:
> On 22 Aug 12:06, Richard Henderson wrote:
>> Ok.
>
> I've updated ChangeLog (thanks, HJ!) and
> checked in to main trunk: http://gcc.gnu.org/ml/gcc-cvs/2013-08/msg00545.html
This patch [actually the change at 201915] also broke X86 Da
Hello,
On 22 Aug 12:06, Richard Henderson wrote:
> Ok.
I've updated ChangeLog (thanks, HJ!) and
checked in to main trunk: http://gcc.gnu.org/ml/gcc-cvs/2013-08/msg00545.html
--
Thanks, K
On Thu, Aug 22, 2013 at 12:06 PM, Richard Henderson wrote:
> On 08/22/2013 11:56 AM, Kirill Yukhin wrote:
>> ChangeLog:
>> 2013-08-22 Kirill Yukhin
>>
>> * gcc/config/i386/i386.md (*movti_internal): Use
>> predicate to determine if EVEX is needed.
>> (*movsi_internal): Ditto.
On 08/22/2013 11:56 AM, Kirill Yukhin wrote:
> ChangeLog:
> 2013-08-22 Kirill Yukhin
>
> * gcc/config/i386/i386.md (*movti_internal): Use
> predicate to determine if EVEX is needed.
> (*movsi_internal): Ditto.
> (*movdf_internal): Ditto.
> (*movsf_internal): Ditto.
Hello,
On 21 Aug 13:02, Richard Henderson wrote:
> On 08/21/2013 11:28 AM, Kirill Yukhin wrote:
> > (eq_attr "alternative" "12,13")
> > - (cond [(ior (not (match_test "TARGET_SSE2"))
> > + (cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO
> > (operands[0]))")
> > +
Hello,
> The patch is ok to commit.
Thanks a lot! Checked in to main trunk:
http://gcc.gnu.org/ml/gcc-cvs/2013-08/msg00524.html
--
K
On 08/21/2013 11:28 AM, Kirill Yukhin wrote:
>>> + && (mode == XImode
>>> + || VALID_AVX512F_REG_MODE (mode)
>>> + || VALID_AVX512F_SCALAR_MODE (mode)))
>>> + return true;
>>> +
>>> + /* In xmm16-xmm31 we can store only 512 bit modes. */
>>> + if (EXT_REX_SSE_REGNO_
On 08/20/2013 10:48 AM, Kirill Yukhin wrote:
> @@ -34589,8 +34649,20 @@ ix86_hard_regno_mode_ok (int regno, enum
> machine_mode mode)
> {
>/* We implement the move patterns for all vector modes into and
>out of SSE registers, even when no operation instructions
> - are av
On 08/07/2013 01:07 PM, Kirill Yukhin wrote:
> + -1, -1, -1, -1, -1, -1, -1, -1, /* new SSE registers 16-23*/
> + -1, -1, -1, -1, -1, -1, -1, -1, /* new SSE registers 24-31*/
Don't say "new", say "avx512" -- that comment will be there for 10 years.
> @@ -4080,6 +4111,8 @@ ix86_condi
On Wed, Jul 24, 2013 at 8:27 PM, Kirill Yukhin wrote:
> Hello,
> By this patch I am starting series of patches toward Intel (R) AVX-512 and
> SHA (see [1])
> extensions enabling in GCC.
> I've already submitted corresponding patches to BinUtils (see [2],[3]).
>
> This patch adds comand-line optio
On Wed, Jul 24, 2013 at 8:27 PM, Kirill Yukhin wrote:
> Hello,
> By this patch I am starting series of patches toward Intel (R) AVX-512 and
> SHA (see [1])
> extensions enabling in GCC.
> I've already submitted corresponding patches to BinUtils (see [2],[3]).
>
> This patch adds comand-line optio
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