On 08/20/2013 10:48 AM, Kirill Yukhin wrote:
> @@ -34589,8 +34649,20 @@ ix86_hard_regno_mode_ok (int regno, enum
> machine_mode mode)
> {
> /* We implement the move patterns for all vector modes into and
> out of SSE registers, even when no operation instructions
> - are available. OImode move is available only when AVX is
> - enabled. */
> + are available. */
> +
> + /* XImode is available only when AVX512F is enabled. */
> + if (TARGET_AVX512F
> + && (mode == XImode
> + || VALID_AVX512F_REG_MODE (mode)
> + || VALID_AVX512F_SCALAR_MODE (mode)))
> + return true;
> +
> + /* In xmm16-xmm31 we can store only 512 bit modes. */
> + if (EXT_REX_SSE_REGNO_P (regno))
> + return false;
You're rejecting scalar modes here. Not what you wanted, surely.
> @@ -1857,9 +1925,9 @@
>
> (define_insn "*movdi_internal"
> [(set (match_operand:DI 0 "nonimmediate_operand"
> - "=r ,o ,r,r ,r,m ,*y,*y,?*y,?m,?r ,?*Ym,*x,*x,*x,m ,?r
> ,?r,?*Yi,?*Ym,?*Yi")
> + "=r ,o ,r,r ,r,m ,*y,*y,?*y,?m,?r ,?*Ym,*v,*v,*v,m ,?r
> ,?r,?*Yi,?*Ym,?*Yi")
> (match_operand:DI 1 "general_operand"
> - "riFo,riF,Z,rem,i,re,C ,*y,m ,*y,*Yn,r ,C ,*x,m ,*x,*Yj,*x,r ,*Yj
> ,*Yn"))]
> + "riFo,riF,Z,rem,i,re,C ,*y,m ,*y,*Yn,r ,C ,*v,m ,*v,*Yj,*v,r ,*Yj
> ,*Yn"))]
> "!(MEM_P (operands[0]) && MEM_P (operands[1]))"
> {
> switch (get_attr_type (insn))
> @@ -1896,6 +1964,8 @@
> return "%vmovq\t{%1, %0|%0, %1}";
> case MODE_TI:
> return "%vmovdqa\t{%1, %0|%0, %1}";
> + case MODE_XI:
> + return "vmovdqa64\t{%g1, %g0|%g0, %g1}";
>
> case MODE_V2SF:
> gcc_assert (!TARGET_AVX);
> @@ -1989,7 +2059,9 @@
> (cond [(eq_attr "alternative" "2")
> (const_string "SI")
> (eq_attr "alternative" "12,13")
> - (cond [(ior (not (match_test "TARGET_SSE2"))
> + (cond [(match_test "TARGET_AVX512F")
> + (const_string "XI")
> + (ior (not (match_test "TARGET_SSE2"))
> (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
> (const_string "V4SF")
> (match_test "TARGET_AVX")
I think you want to be adding new alternatives, rather than replacing "x" with
"v". Otherwise you're going to force the use of evex encoding when moving
between low register numbers too.
Likewise with all other scalar move patterns.
> diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
> index 12c0626..8f26888 100644
> --- a/gcc/config/i386/mmx.md
> +++ b/gcc/config/i386/mmx.md
> @@ -78,9 +78,9 @@
>
> (define_insn "*mov<mode>_internal"
> [(set (match_operand:MMXMODE 0 "nonimmediate_operand"
> - "=r ,o ,r,r ,m ,?!y,!y,?!y,m ,r ,?!Ym,x,x,x,m,*x,*x,*x,m ,r
> ,Yi,!Ym,*Yi")
> + "=r ,o ,r,r ,m ,?!y,!y,?!y,m ,r ,?!Ym,v,v,v,m,*x,*x,*x,m ,r
> ,Yi,!Ym,*Yi")
> (match_operand:MMXMODE 1 "vector_move_operand"
> - "rCo,rC,C,rm,rC,C ,!y,m ,?!y,?!Yn,r ,C,x,m,x,C ,*x,m ,*x,Yj,r
> ,*Yj,!Yn"))]
> + "rCo,rC,C,rm,rC,C ,!y,m ,?!y,?!Yn,r ,C,v,m,v,C ,*x,m ,*x,Yj,r
> ,*Yj,!Yn"))]
> "TARGET_MMX
> && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
Failure to add %g case here?
r~
