On 7/12/23 01:27, Richard Biener wrote:
Using SSA_NAME_DEF_STMT during expansion is OK, but I don't think you
can rely on REG_EXPR here since you don't know whether any coalescing
happened. That said, maybe the implementation currently guarantees
you'll only see a REG_EXPR SSA name if there
On Wed, 12 Jul 2023, Richard Sandiford wrote:
> Richard Biener writes:
> > On Wed, 12 Jul 2023, juzhe.zh...@rivai.ai wrote:
> >
> >> Thanks Richard.
> >>
> >> Is it correct that the better way is to add optabs
> >> (len_strided_load/len_strided_store),
> >> then expand LEN_MASK_GATHER_LOAD/LEN_
From: Richard Sandiford
Date: 2023-07-12 17:33
To: Richard Biener
CC: juzhe.zhong\@rivai.ai; jeffreyalaw; gcc-patches; Kito.cheng; Robin Dapp
Subject: Re: [PATCH V5] RISC-V: Support gather_load/scatter RVV
auto-vectorization
Richard Biener writes:
> On Wed, 12 Jul 2023, juzhe.zh...@rivai.ai wr
Richard Biener writes:
> On Wed, 12 Jul 2023, juzhe.zh...@rivai.ai wrote:
>
>> Thanks Richard.
>>
>> Is it correct that the better way is to add optabs
>> (len_strided_load/len_strided_store),
>> then expand LEN_MASK_GATHER_LOAD/LEN_MASK_SCATTER_STORE to
>> len_strided_load/len_strided_store op
Subject: Re: Re: [PATCH V5] RISC-V: Support gather_load/scatter RVV
auto-vectorization
On Wed, 12 Jul 2023, juzhe.zh...@rivai.ai wrote:
> Thanks Richard.
>
> Is it correct that the better way is to add optabs
> (len_strided_load/len_strided_store),
> then expand LEN_M
uzhe.zh...@rivai.ai
>
> From: Richard Biener
> Date: 2023-07-12 15:27
> To: juzhe.zh...@rivai.ai
> CC: jeffreyalaw; gcc-patches; Kito.cheng; Robin Dapp; richard.sandiford
> Subject: Re: Re: [PATCH V5] RISC-V: Support gather_load/scatter RVV
> auto-vectorization
> On Wed, 12
expand_scatter_store_optab_fn
of internal-fn.cc
Am I right? Thanks.
juzhe.zh...@rivai.ai
From: Richard Biener
Date: 2023-07-12 15:27
To: juzhe.zh...@rivai.ai
CC: jeffreyalaw; gcc-patches; Kito.cheng; Robin Dapp; richard.sandiford
Subject: Re: Re: [PATCH V5] RISC-V: Support gather_load/scatter RVV
auto-vectorization
On
m doing wrong here.
> Thanks.
>
>
> juzhe.zh...@rivai.ai
>
> From: Jeff Law
> Date: 2023-07-12 13:32
> To: juzhe.zh...@rivai.ai; gcc-patches
> CC: Kito.cheng; Robin Dapp
> Subject: Re: [PATCH V5] RISC-V: Support gather_load/scatter RVV
> auto-vectorizatio
Law
Date: 2023-07-12 13:32
To: juzhe.zh...@rivai.ai; gcc-patches
CC: Kito.cheng; Robin Dapp
Subject: Re: [PATCH V5] RISC-V: Support gather_load/scatter RVV
auto-vectorization
On 7/11/23 20:34, juzhe.zh...@rivai.ai wrote:
> Hi, Jeff.
>
> >> Hmm, I'm not sure this is safe, e
On 7/11/23 20:34, juzhe.zh...@rivai.ai wrote:
Hi, Jeff.
>> Hmm, I'm not sure this is safe, especially if gimple->rtl expansion is
complete. While you might be able to get REG_EXPR, I would not really
expect SSA_NAME_DEF_STMT to be correct. At the least it'll need some
way to make sure it'
TL
>>interfaces?
I saw ARM SVE is using them in many places for expanding patterns.
And I think it's convenient so that's why I use them.
Thanks.
juzhe.zh...@rivai.ai
From: Jeff Law
Date: 2023-07-12 10:01
To: Juzhe-Zhong; gcc-patches
CC: kito.cheng; rdapp.gcc
Subject: Re: [PATCH
On 7/7/23 08:32, Juzhe-Zhong wrote:
This patch fully support gather_load/scatter_store:
1. Support single-rgroup on both RV32/RV64.
2. Support indexed element width can be same as or smaller than Pmode.
3. Support VLA SLP with gather/scatter.
4. Fully tested all gather/scatter with LMUL = M1/M
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