Thanks Richard. I have addressed all comments on V7 patch: https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624220.html
Drop vlse/vsse codegen optimization in RISC-V backend, instead I will support LEN_MASK_STRIDED_LOAD/LEN_MASK_STRIDE_STORE in the future. Thanks. juzhe.zh...@rivai.ai From: Richard Sandiford Date: 2023-07-12 17:33 To: Richard Biener CC: juzhe.zhong\@rivai.ai; jeffreyalaw; gcc-patches; Kito.cheng; Robin Dapp Subject: Re: [PATCH V5] RISC-V: Support gather_load/scatter RVV auto-vectorization Richard Biener <rguent...@suse.de> writes: > On Wed, 12 Jul 2023, juzhe.zh...@rivai.ai wrote: > >> Thanks Richard. >> >> Is it correct that the better way is to add optabs >> (len_strided_load/len_strided_store), >> then expand LEN_MASK_GATHER_LOAD/LEN_MASK_SCATTER_STORE to >> len_strided_load/len_strided_store optab (if it is strided load/store) in >> expand_gather_load_optab_fn >> expand_scatter_store_optab_fn >> >> of internal-fn.cc >> >> Am I right? Thanks. > > Yes. > > In priciple the vectorizer can also directly take advantage of this > and code generate an internal .LEN_STRIDED_LOAD ifn. Yeah, in particular, having a strided load should relax some of the restrictions around the relationship of the vector offset type to the loaded/stored data. E.g. a "gather" of N bytes with a 64-bit stride would in principle be possible without needing an Nx64-bit vector offset type. Richard
