On Fri, Sep 30, 2011 at 5:22 PM, Roman Zhuykov wrote:
> 2011/7/21 :
>> This patch should be applied only after pending patches by Revital.
>
>
> Ping. New version is attached, it suits current trunk without
> additional patches.
Thanks for the ping.
> Also this related patch needs approval:
> h
2011/7/26 Richard Sandiford :
> Note that on ARM, the comparison and loop counter addition can happen
> as a single parallel:
Certainly, I notice such "subs" ARM instructions. IMHO, this pattern seems to
appear rarely in real loops. For loops without doloop_end pattern we have to
make the follow
zhr...@ispras.ru writes:
> The next three describe the control part of new supported loops.
> - the last jump instruction should look like: pc=(regF!=0)?label:pc, regF is
> flag register;
> - the last instruction which sets regF should be: regF=COMPARE(regC,X), where
> X
> is a constant, or m
Hello Roman,
> This patch should be applied only after pending patches by Revital. This
patch
> significantly enhances the existing implementation of the SMS. Patch
adds
> support of scheduling loops without doloop pattern. The loop should meet
the
> following requirements.
Thanks for the patch
This patch should be applied only after pending patches by Revital. This patch
significantly enhances the existing implementation of the SMS. Patch adds
support of scheduling loops without doloop pattern. The loop should meet the
following requirements.
First three are the same as for loop with
