zhr...@ispras.ru writes:
> The next three describe the control part of new supported loops.
> - the last jump instruction should look like: pc=(regF!=0)?label:pc, regF is
> flag register;
> - the last instruction which sets regF should be: regF=COMPARE(regC,X), where
> X
> is a constant, or maybe a register, which is not changed inside a loop;
> - only one instruction modifies regC inside a loop (other can use regC, but
> not
> write), and it should simply adjust it by a constant: regC=regC+step, where
> step is a constant.
Note that on ARM, the comparison and loop counter addition can happen
as a single parallel:
(insn 29 27 30 3 (parallel [
(set (reg:CC_NOOV 24 cc)
(compare:CC_NOOV (plus:SI (reg:SI 142 [ ivtmp.9 ])
(const_int -1 [0xffffffffffffffff]))
(const_int 0 [0])))
(set (reg:SI 142 [ ivtmp.9 ])
(plus:SI (reg:SI 142 [ ivtmp.9 ])
(const_int -1 [0xffffffffffffffff])))
]) /tmp/bar5.c:9 6 {addsi3_compare0}
(nil))
I think we'd need to handle that too before getting rid of the
ARM doloop_end pattern.
Richard
