Re: [PATCH 2/5] aarch64: rcpc3: Add relevant iterators to handle Neon intrinsics

2023-11-24 Thread Richard Sandiford
Victor Do Nascimento writes: > The LDAP1 and STL1 Neon ACLE intrinsics, operating on 64-bit data > values, operate on single-lane (Vt.1D) or twin-lane (Vt.2D) SIMD > register configurations, either in the DI or DF modes. This leads to > the need for a mode iterator accounting for the V1DI, V1DF,

[PATCH 2/5] aarch64: rcpc3: Add relevant iterators to handle Neon intrinsics

2023-11-09 Thread Victor Do Nascimento
The LDAP1 and STL1 Neon ACLE intrinsics, operating on 64-bit data values, operate on single-lane (Vt.1D) or twin-lane (Vt.2D) SIMD register configurations, either in the DI or DF modes. This leads to the need for a mode iterator accounting for the V1DI, V1DF, V2DI and V2DF modes. This patch there