Victor Do Nascimento <victor.donascime...@arm.com> writes: > The LDAP1 and STL1 Neon ACLE intrinsics, operating on 64-bit data > values, operate on single-lane (Vt.1D) or twin-lane (Vt.2D) SIMD > register configurations, either in the DI or DF modes. This leads to > the need for a mode iterator accounting for the V1DI, V1DF, V2DI and > V2DF modes. > > This patch therefore introduces the new V12DIF mode iterator with > which to generate functions operating on signed 64-bit integer and > float values and V12DIUP for generating the unsigned and > polynomial-type counterparts. Along with this, we modify the > associated mode attributes accordingly in order to allow for the > implementation of the relevant backend patterns for the intrinsics. > > gcc/ChangeLog: > > * config/aarch64/iterators.md (V12DIF): New. > (V12DUP): Likewise. > (VEL): Add support for all V12DIF-associated modes. > (Vetype): Add support for V1DI and V1DF. > (Vel): Likewise. > --- > gcc/config/aarch64/iterators.md | 25 +++++++++++++++++-------- > 1 file changed, 17 insertions(+), 8 deletions(-) > > diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md > index f9e2210095e..471438e27be 100644 > --- a/gcc/config/aarch64/iterators.md > +++ b/gcc/config/aarch64/iterators.md > @@ -314,6 +314,12 @@ > ;; All byte modes. > (define_mode_iterator VB [V8QI V16QI]) > > +;; 1 and 2 lane DI and DF modes. > +(define_mode_iterator V12DIF [V1DI V1DF V2DI V2DF]) > + > +;; 1 and 2 lane DI mode for unsigned and poly types. > +(define_mode_iterator V12DIUP [V1DI V2DI])
Probably easiest just to call it V12DI, without the UP. The same iterator could be useful in other situations. > + > ;; 2 and 4 lane SI modes. > (define_mode_iterator VS [V2SI V4SI]) > > @@ -1195,10 +1201,10 @@ > (define_mode_attr Vetype [(V8QI "b") (V16QI "b") > (V4HI "h") (V8HI "h") > (V2SI "s") (V4SI "s") > - (V2DI "d") > + (V2DI "d") (V1DI "d") > (V4HF "h") (V8HF "h") > (V2SF "s") (V4SF "s") > - (V2DF "d") > + (V2DF "d") (V1DF "d") > (V2x8QI "b") (V2x4HI "h") > (V2x2SI "s") (V2x1DI "d") > (V2x4HF "h") (V2x2SF "s") > @@ -1358,10 +1364,12 @@ > (define_mode_attr VEL [(V8QI "QI") (V16QI "QI") > (V4HI "HI") (V8HI "HI") > (V2SI "SI") (V4SI "SI") > - (DI "DI") (V2DI "DI") > + (DI "DI") (V1DI "DI") > + (V2DI "DI") Very, very minor, but: would be good to have one fewer space before "DI", so that the quotes line up. > (V4HF "HF") (V8HF "HF") > (V2SF "SF") (V4SF "SF") > - (DF "DF") (V2DF "DF") > + (DF "DF") (V1DF "DF") > + (V2DF "DF") Same here. OK for trunk with those changes, thanks. Richard > (SI "SI") (HI "HI") > (QI "QI") > (V4BF "BF") (V8BF "BF") > @@ -1378,12 +1386,13 @@ > (define_mode_attr Vel [(V8QI "qi") (V16QI "qi") > (V4HI "hi") (V8HI "hi") > (V2SI "si") (V4SI "si") > - (DI "di") (V2DI "di") > + (DI "di") (V1DI "si") > + (V2DI "di") > (V4HF "hf") (V8HF "hf") > (V2SF "sf") (V4SF "sf") > - (V2DF "df") (DF "df") > - (SI "si") (HI "hi") > - (QI "qi") > + (V1DF "df") (V2DF "df") > + (DF "df") (SI "si") > + (HI "hi") (QI "qi") > (V4BF "bf") (V8BF "bf") > (VNx16QI "qi") (VNx8QI "qi") (VNx4QI "qi") (VNx2QI "qi") > (VNx8HI "hi") (VNx4HI "hi") (VNx2HI "hi")
