: [PATCH] RISC-V: Legitimise the const0_rtx for RVV load/store
address
LGTM, pushed to trunk
> This patch try to legitimise the const0_rtx (aka zero register) as the
> base register for the RVV load/store instructions.
>
> For example:
> vint32m1_t test_vle32_v_i32m1_shor
LGTM, pushed to trunk
> This patch try to legitimise the const0_rtx (aka zero register)
> as the base register for the RVV load/store instructions.
>
> For example:
> vint32m1_t test_vle32_v_i32m1_shortcut (size_t vl)
> {
> return __riscv_vle32_v_i32m1 ((int32_t *)0, vl);
> }
The example is kin
From: Pan Li
This patch try to legitimise the const0_rtx (aka zero register)
as the base register for the RVV load/store instructions.
For example:
vint32m1_t test_vle32_v_i32m1_shortcut (size_t vl)
{
return __riscv_vle32_v_i32m1 ((int32_t *)0, vl);
}
Before this patch:
li a5,0
vsetvli z