Re: [PATCH] RISC-V: Fix ICE in non-canonical march parsing

2023-11-15 Thread Kito Cheng
On Thu, Nov 16, 2023 at 2:32 AM Patrick O'Neill wrote: > > Does relax mean no longer enforcing the canonical order of extensions? Yes, we've discussed that a long time ago, but we just didn't have enough people to moving that forward: https://github.com/riscv-non-isa/riscv-toolchain-conventions/

Re: [PATCH] RISC-V: Fix ICE in non-canonical march parsing

2023-11-15 Thread Patrick O'Neill
Does relax mean no longer enforcing the canonical order of extensions? Patrick On 11/14/23 17:52, Kito Cheng wrote: LGTM, and BTW...I am thinking we could relax the canonical order during parsing, did you have interesting and time working on that item? On Wed, Nov 15, 2023 at 9:35 AM Patrick

Re: [PATCH] RISC-V: Fix ICE in non-canonical march parsing

2023-11-14 Thread Kito Cheng
LGTM, and BTW...I am thinking we could relax the canonical order during parsing, did you have interesting and time working on that item? On Wed, Nov 15, 2023 at 9:35 AM Patrick O'Neill wrote: > > Passing in a base extension in non-canonical order (i, e, g) causes GCC > to ICE: > xgcc: error: '-ma

[PATCH] RISC-V: Fix ICE in non-canonical march parsing

2023-11-14 Thread Patrick O'Neill
Passing in a base extension in non-canonical order (i, e, g) causes GCC to ICE: xgcc: error: '-march=rv64ge': ISA string is not in canonical order. 'e' xgcc: internal compiler error: in add, at common/config/riscv/riscv-common.cc:671 ... This is fixed by skipping to the next extension when a non-