Re: [PATCH] RISC-V: Adjust tt-ascalon-d8 branch cost

2025-09-08 Thread Jeff Law
On 9/8/25 1:08 AM, Robin Dapp wrote: diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 07d40f459e3..bfd43fba101 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -659,7 +659,7 @@ static const struct riscv_tune_param tt_ascalon_d8_tune_info = {  

Re: [PATCH] RISC-V: Adjust tt-ascalon-d8 branch cost

2025-09-08 Thread Jeff Law
On 9/7/25 3:19 PM, Anton Blanchard wrote: If-conversion isn't being applied to this nbench code: #include #define INTERNAL_FPF_PRECISION 4 typedef uint16_t u16; void ShiftMantLeft1(u16 *carry, u16 *mantissa) { int i; int new_carry; u16 accum;

Re: [PATCH] RISC-V: Adjust tt-ascalon-d8 branch cost

2025-09-08 Thread Robin Dapp
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 07d40f459e3..bfd43fba101 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -659,7 +659,7 @@ static const struct riscv_tune_param tt_ascalon_d8_tune_info = { {COSTS_N_INSNS (3), COSTS_N_INSNS (3)},

[PATCH] RISC-V: Adjust tt-ascalon-d8 branch cost

2025-09-07 Thread Anton Blanchard
If-conversion isn't being applied to this nbench code: #include #define INTERNAL_FPF_PRECISION 4 typedef uint16_t u16; void ShiftMantLeft1(u16 *carry, u16 *mantissa) { int i; int new_carry; u16 accum; for(i=INTERNAL_FPF_PRECISION-1;i>=0;i--) {