On 10/27/23 01:38, Robin Dapp wrote:
Suggested adapt codes as follows:
unsigned int element_size = GET_MODE_SIZE (mode).to_constant ();
poly_int64 nunits = exact_div (BYTES_PER_RISCV_VECTOR *TARGET_MAX_LMUL,
element_size);
if (!get_vector_mode(mode, nunits).exists(&vmode))
gcc_unreachable
> It seems that you didn't commit it yet.
>
> A nit comment:
>
> + int lmul = riscv_autovec_lmul == RVV_DYNAMIC ? RVV_M8 : riscv_autovec_lmul;
>
> I change you could use TARGET_MAX_LMUL
No didn't commit yet, testsuite was still running.
OK, added it, will commit later.
Regards
Robin
t: Re: [PATCH] RISC-V: Add rawmemchr expander.
Attached v3 that I'd commit.
Regards
Robin
From 246b986a8ea2332ced7a094dd68d35d84dcbbc04 Mon Sep 17 00:00:00 2001
From: Robin Dapp
Date: Tue, 24 Oct 2023 10:33:15 +0200
Subject: [PATCH v3] RISC-V: Add rawmemchr expander.
This patch adds a
Attached v3 that I'd commit.
Regards
Robin
>From 246b986a8ea2332ced7a094dd68d35d84dcbbc04 Mon Sep 17 00:00:00 2001
From: Robin Dapp
Date: Tue, 24 Oct 2023 10:33:15 +0200
Subject: [PATCH v3] RISC-V: Add rawmemchr expander.
This patch adds a vectorized rawmemchr expander. It also moves the
vect
> I notice we have expand_block_move
> in riscv-v.cc
>
> Maybe we should move it into riscv-string.cc ?
Yes I will also move that one.
Regards
Robin
I notice we have expand_block_move
in riscv-v.cc
Maybe we should move it into riscv-string.cc ?
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-10-27 15:51
To: Kito Cheng; juzhe.zh...@rivai.ai
CC: rdapp.gcc; gcc-patches; palmer; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Add rawmemchr
> Could you put it into riscv-string.cc rather than riscv-v.cc? I would
> like to put those builtin function expander together if possible,
> riscv-string.cc might little bit confuse, but it's all included in
> string.h
Ok, sure. Will commit the adjusted patch if no further comments.
Regards
Ro
GTM. Thanks.
>
>
> juzhe.zh...@rivai.ai
>
>
> From: Robin Dapp
> Date: 2023-10-27 15:38
> To: 钟居哲; gcc-patches; palmer; kito.cheng; Jeff Law
> CC: rdapp.gcc
> Subject: Re: [PATCH] RISC-V: Add rawmemchr expander.
> > Suggested adapt code
LGTM. Thanks.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-10-27 15:38
To: 钟居哲; gcc-patches; palmer; kito.cheng; Jeff Law
CC: rdapp.gcc
Subject: Re: [PATCH] RISC-V: Add rawmemchr expander.
> Suggested adapt codes as follows:
>
> unsigned int element_size = GET_MODE_S
> Suggested adapt codes as follows:
>
> unsigned int element_size = GET_MODE_SIZE (mode).to_constant ();
> poly_int64 nunits = exact_div (BYTES_PER_RISCV_VECTOR *TARGET_MAX_LMUL,
> element_size);
> if (!get_vector_mode(mode, nunits).exists(&vmode))
> gcc_unreachable ();
Actually I was initiall
ject: [PATCH] RISC-V: Add rawmemchr expander.
Hi,
this patch adds a vectorized rawmemchr expander.
It's basically strstr but for 8, 16 and 32-byte needles.
Apart from adjusting the common-code tests I re-used a
similar test that Stefan added to the s390 backend.
Regards
Robin
gcc/
Hi,
this patch adds a vectorized rawmemchr expander.
It's basically strstr but for 8, 16 and 32-byte needles.
Apart from adjusting the common-code tests I re-used a
similar test that Stefan added to the s390 backend.
Regards
Robin
gcc/ChangeLog:
* config/riscv/autovec.md (rawmemchr):
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