On Mon, Aug 22, 2016 at 06:01:22PM -0400, Michael Meissner wrote:
> > > +static void
> > > +rs6000_split_v4si_init_di_reg (rtx dest, rtx si1, rtx si2, rtx tmp)
> > > +{
> > > + const unsigned HOST_WIDE_INT mask_32bit = HOST_WIDE_INT_C (0x);
> >
> > Does using that macro buy us anything?
On Mon, Aug 22, 2016 at 11:37:55AM -0500, Segher Boessenkool wrote:
> [ seems this mail never arrived, resending, sorry if it turns out a duplicate
> ]
>
> Hi Mike,
>
> Okay for trunk. A few comments...
>
> On Fri, Aug 19, 2016 at 06:17:54PM -0400, Michael Meissner wrote:
> > --- gcc/config/rs
[ seems this mail never arrived, resending, sorry if it turns out a duplicate ]
Hi Mike,
Okay for trunk. A few comments...
On Fri, Aug 19, 2016 at 06:17:54PM -0400, Michael Meissner wrote:
> --- gcc/config/rs6000/rs6000.c
> (.../svn+ssh://meiss...@gcc.gnu.org/svn/gcc/trunk/gcc/config/rs
This is a rewrite of patch #3 to improve vector int initialization on the
PowerPC 64-bit systems wtih direct move (power8, and forthcoming power9).
This patch adds full support for doing vector int initialization in the GPR and
vector registers, rather than creating a stack temporary, doing 4 stor
