On Mon, Aug 22, 2016 at 06:01:22PM -0400, Michael Meissner wrote:
> > > +static void
> > > +rs6000_split_v4si_init_di_reg (rtx dest, rtx si1, rtx si2, rtx tmp)
> > > +{
> > > + const unsigned HOST_WIDE_INT mask_32bit = HOST_WIDE_INT_C (0xffffffff);
> >
> > Does using that macro buy us anything? Won't the plain number work just
> > as well?
>
> I would imagine you don't want to use a bare 0xffffffff if the compiler is
> being built in a 32-bit environment. Also, using mask_32bit as a const
> allowed
> me to code the following lines without breaking them into smaller lines due to
> the archic 79 character column limit.
HOST_WIDE_INT is always at least 64-bit nowadays. I didn't mean use the
number everywhere, I meant just deleting the HOST_WIDE_INT_C.
> > > + /* Generate RLDIC. */
> > > + rtx si1_di = gen_rtx_REG (DImode, regno_or_subregno (si1));
> > > + rtx shift_rtx = gen_rtx_ASHIFT (DImode, si1_di, GEN_INT (32));
> > > + rtx mask_rtx = GEN_INT (mask_32bit << 32);
> > > + rtx and_rtx = gen_rtx_AND (DImode, shift_rtx, mask_rtx);
> > > + gcc_assert (!reg_overlap_mentioned_p (dest, si1));
> > > + emit_insn (gen_rtx_SET (dest, and_rtx));
> >
> > Maybe gen_rotldi3_mask (after taking the "*" off of that)? Is that too
> > unfriendly to use? We could add another helper.
>
> The problem is rotld3_mask takes a match_operator, and you pretty much would
> have to construct the AND part of the expression,
Ah yes. I'll see if I can do another helper.
Thanks,
Segher
