Re: [PATCH, rs6000] Fix constraints issue in _mm_cvtss_si{32,64}

2018-11-08 Thread Segher Boessenkool
Hi! On Thu, Nov 08, 2018 at 02:18:51PM -0600, Bill Schmidt wrote: > We recently discovered that GCC is getting lucky with register allocation of > some inline assembly code, despite invalid register constraints. In these > two functions, a "wi" constraint (VSX valid for direct moves) was used for

[PATCH, rs6000] Fix constraints issue in _mm_cvtss_si{32,64}

2018-11-08 Thread Bill Schmidt
Hi, We recently discovered that GCC is getting lucky with register allocation of some inline assembly code, despite invalid register constraints. In these two functions, a "wi" constraint (VSX valid for direct moves) was used for a temporary that, as written, is further constrained to be an FPR.