Hi,
We recently discovered that GCC is getting lucky with register allocation of
some inline assembly code, despite invalid register constraints. In these
two functions, a "wi" constraint (VSX valid for direct moves) was used for a
temporary that, as written, is further constrained to be an FPR. This patch
fixes the problem by introducing a separate temporary with an "f" constraint
and breaking the lifetime of the existing temporary. The existing temporary
can now have a less onerous "wa" constraint as it is no longer used within a
direct move instruction.
Installed and tested on powerpc64le-linux-gnu with no regressions. Is this
okay for trunk?
Thanks,
Bill
2018-11-08 Bill Schmidt <wschm...@linux.ibm.com>
Jinsong Ji <j...@us.ibm.com>
* config/rs6000/xmmintrin.h (_mm_cvtss_si32): Fix incorrect
constraints by introducing a new temporary.
(_mm_cvtss_si64): Likewise.
Index: gcc/config/rs6000/xmmintrin.h
===================================================================
--- gcc/config/rs6000/xmmintrin.h (revision 265895)
+++ gcc/config/rs6000/xmmintrin.h (working copy)
@@ -908,13 +908,15 @@ _mm_cvtss_si32 (__m128 __A)
__m64 res = 0;
#ifdef _ARCH_PWR8
__m128 vtmp;
+ double dtmp;
__asm__(
- "xxsldwi %x1,%x2,%x2,3;\n"
- "xscvspdp %x1,%x1;\n"
- "fctiw %1,%1;\n"
- "mfvsrd %0,%x1;\n"
+ "xxsldwi %x1,%x3,%x3,3;\n"
+ "xscvspdp %x2,%x1;\n"
+ "fctiw %2,%2;\n"
+ "mfvsrd %0,%x2;\n"
: "=r" (res),
- "=&wi" (vtmp)
+ "=&wa" (vtmp),
+ "=f" (dtmp)
: "wa" (__A)
: );
#else
@@ -939,13 +941,15 @@ _mm_cvtss_si64 (__m128 __A)
__m64 res = 0;
#ifdef _ARCH_PWR8
__m128 vtmp;
+ double dtmp;
__asm__(
- "xxsldwi %x1,%x2,%x2,3;\n"
- "xscvspdp %x1,%x1;\n"
- "fctid %1,%1;\n"
- "mfvsrd %0,%x1;\n"
+ "xxsldwi %x1,%x3,%x3,3;\n"
+ "xscvspdp %x2,%x1;\n"
+ "fctid %2,%2;\n"
+ "mfvsrd %0,%x2;\n"
: "=r" (res),
- "=&wi" (vtmp)
+ "=&wa" (vtmp),
+ "=f" (dtmp)
: "wa" (__A)
: );
#else
