[PATCH]AArch64[committed] testsuite: remove broken test

Hi All, This test is somewhat broken, on systems with the profiling extension it fails because the +profile is required. The functionality tested here is already tested in nativecpu tests, so deleting this test. Committed under the obvious rule. Regtested on aarch64-none-linux-gnu and no issue

[PATCH][AArch64][committed] Fix typo in aarch64_mangle_type

Committing as obvious. Thanks, Kyrill 2018-11-26 Kyrylo Tkachov * config/aarch64/aarch64.c (aarch64_mangle_type): Fix typo in comment. diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 77d12603e3b9bfdf0f65733162a4320ffc9239f7..58858ef935ba744e6e50b9ceb8cdf182

[PATCH][AArch64][committed] Fix gcc.target/aarch64/spellcheck_1.c and spellcheck_4.c

Hi all, These two tests started failing after commit r264335 that adjusted the cutoff point at which the diagnostic suggestions machinery decides a suggestion is meaningful. For these tests it means we no longer suggest anything as an alternative to "armv8-a-typo" as an "arch=" pargma value. W

[PATCH][AArch64][committed] Fix gcc.target/aarch64/combine_bfi_1.c

Hi all, This test started failing because some of the functions in the combine dump that it scans uses a different pattern to match the same instruction: insv_regsi rather than aarch64_bfi. The code generation is still the same. The patch changes the scan to look for the actual instruction we w

[PATCH][AArch64][committed] Fix gcc.target/aarch64/vec_init_1.c for tiny and large mcmodels

Hi all, This recently-committed test fails the INS scan for tiny and large memory models. That is because instead of the: make_vector: adrpx1, a adrpx0, b moviv0.4s, 0 ldr s2, [x1, #:lo12:a] ldr s1, [x0, #:lo12:b] ins v0.s[2

[Patch][aarch64][committed] Fix test broken by patch for PR target/81356

My patch for PR target/81356 caused the test gfortran.dg/pr45636.f90 to generate an XPASS instead of an XFAIL.  This change seems correct since we no longer define TARGET_USE_BY_PIECES_INFRASTRUCTURE_P so I am going to check this patch in as obvious in order to make the test a PASS instead of XPASS

[GCC][PATCH][AARCH64][Committed] Fix failing lrint inline tests on bare-metal.

Hi All, The tests introduced for lrint in r249064 are failing on aarch64 bare metal because it's using different registers. This patch generalizes the regexpr for the result so that it works both for bare metal and linux. regtested on aarch64-none-linux-gnu and aarch64-none-elf Committed as r24

[PATCH][AArch64][committed] Fix some target attribute inlining tests for -fPIC

Hi all, Some of the new target attribute tests fail when testing with an explicit -fPIC: NA->FAIL: gcc.target/aarch64/target_attr_14.c scan-assembler-not bl.*bar NA->FAIL: gcc.target/aarch64/target_attr_5.c scan-assembler-not bl.*bar NA->FAIL: gcc.target/aarch64/target_att

[PATCH][AArch64][committed] Mark target_attr_1.c as compile-only

As mentioned at https://gcc.gnu.org/ml/gcc-patches/2015-08/msg00251.html some assemblers don't support -mcpu=thunderx, so the dg-do assemble test will FAIL. Mark this test as compile-only as assembling it is not essential to the functionality it tests. Committed as obvious with r226886. 2015-

[PATCH][AArch64][committed] Do not ICE after apologising for -mcmodel=large -fPIC

Hi all, If we try to compile a file with -mcmodel=large -fPIC we will emit a sorry in initialize_aarch64_code_model because that combination is not implemented. However, there is a missing break in that case statement and we end up falling through to the gcc_unreachable and ICE'ing. The right thi

[PATCH][AArch64][committed] Delete unused variable i

Hi all, I've committed this patch as obvious with r212225. It fixes aarch64 bootstrap. Cheers, Kyrill 2014-07-02 Kyrylo Tkachov * config/aarch64/aarch64.c (aarch64_expand_vec_perm): Delete unused variable i.diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c

[PATCH][AArch64][committed] Fix typo in aarch64.c

Hi all, I've committed the attached typo fix as obvious as r207654. Cheers, Kyrill 2014-02-10 Kyrylo Tkachov * config/aarch64/aarch64.c (aarch64_override_options): Fix typo from coretex to cortex.diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 16c51a8.

[PATCH][AArch64][committed] Add comment on why plus_constant is not used in aarch64_legitimize_reload_address

Hi all, I've committed this patch as obvious. It adds a comment in aarch64_legitimize_reload_address explaining that we need the RTL structure to be preserved before push_reload and using plus_constant would fold that, causing ICEs. Thanks, Kyrill [gcc/] 2013-11-07 Kyrylo Tkachov *

[PATCH, AArch64, COMMITTED]

Hi, This patch was actually written by Ian, I'm submitting it on his behalf. /Marcus In draft revisions of the A64 ISA it was not possible to use SP on the right hand side of a register + register add. This meant that we needed two scratch registers when a large constant was being added to