Hi All,
The tests introduced for lrint in r249064 are failing on aarch64
bare metal because it's using different registers.
This patch generalizes the regexpr for the result so that it works
both for bare metal and linux.
regtested on aarch64-none-linux-gnu and aarch64-none-elf
Committed as r249127 under the GCC obvious rule.
Thanks,
Tamar
gcc/testsuite/
2017-06-12 Tamar Christina <tamar.christ...@arm.com>
* gcc.target/aarch64/inline-lrint_1.c: Broaden regexp.
* gcc.target/aarch64/inline-lrint_2.c: Likewise.
* gcc.target/aarch64/no-inline-lrint_1.c: Likewise.
* gcc.target/aarch64/no-inline-lrint_2.c: Likewise.diff --git a/gcc/testsuite/gcc.target/aarch64/inline-lrint_1.c b/gcc/testsuite/gcc.target/aarch64/inline-lrint_1.c
index 876cecd674b7cb35bc18d5cd3aa5587813e53dd9..478875ff874bca26fea53249eb63141242335e7b 100644
--- a/gcc/testsuite/gcc.target/aarch64/inline-lrint_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/inline-lrint_1.c
@@ -13,8 +13,6 @@ TEST (fif, float , int, )
TEST (dlld, double, long long, l)
TEST (fllf, float , long long, l)
-/* { dg-final { scan-assembler-times "frintx\td\[0-9\]+, d\[0-9\]+" 3 } } */
-/* { dg-final { scan-assembler-times "frintx\ts\[0-9\]+, s\[0-9\]+" 3 } } */
-/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, d\[0-9\]+" 3 } } */
-/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, s\[0-9\]+" 3 } } */
+/* { dg-final { scan-assembler-times "frintx\t\[d,s\]\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */
+/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */
/* { dg-final { scan-assembler-not "bl" } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/inline-lrint_2.c b/gcc/testsuite/gcc.target/aarch64/inline-lrint_2.c
index baa5aee761788e2b83f8f9283bb0aa7d79aad348..6080e186d8f0c6f5ede81c6438e059e8b976378f 100644
--- a/gcc/testsuite/gcc.target/aarch64/inline-lrint_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/inline-lrint_2.c
@@ -13,10 +13,6 @@ TEST (fif, float , int, )
TEST (dlld, double, long long, l)
TEST (fllf, float , long long, l)
-/* { dg-final { scan-assembler-times "frintx\td\[0-9\]+, d\[0-9\]+" 3 } } */
-/* { dg-final { scan-assembler-times "frintx\ts\[0-9\]+, s\[0-9\]+" 3 } } */
-/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, d\[0-9\]+" 1 } } */
-/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, s\[0-9\]+" 1 } } */
-/* { dg-final { scan-assembler-times "fcvtzs\tw\[0-9\]+, d\[0-9\]+" 2 } } */
-/* { dg-final { scan-assembler-times "fcvtzs\tw\[0-9\]+, s\[0-9\]+" 2 } } */
+/* { dg-final { scan-assembler-times "frintx\t\[d,s\]\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */
+/* { dg-final { scan-assembler-times "fcvtzs\t\[w,x\]\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */
/* { dg-final { scan-assembler-not "bl" } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/no-inline-lrint_1.c b/gcc/testsuite/gcc.target/aarch64/no-inline-lrint_1.c
index fb7f0655687568e9d6783acf88ef56b54a73c2c5..d5e9200562c166ace4d8e72d9a9f560e35846b29 100644
--- a/gcc/testsuite/gcc.target/aarch64/no-inline-lrint_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/no-inline-lrint_1.c
@@ -13,8 +13,7 @@ TEST (fif, float , int, )
TEST (dlld, double, long long, l)
TEST (fllf, float , long long, l)
-/* { dg-final { scan-assembler-times "frintx\td\[0-9\]+, d\[0-9\]+" 3 } } */
-/* { dg-final { scan-assembler-times "frintx\ts\[0-9\]+, s\[0-9\]+" 3 } } */
+/* { dg-final { scan-assembler-times "frintx\t\[d,s\]\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */
/* { dg-final { scan-assembler-times "bl\tlrint" 4 } } */
/* { dg-final { scan-assembler-times "bl\tllrint" 2 } } */
/* { dg-final { scan-assembler-not "fcvtzs" } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/no-inline-lrint_2.c b/gcc/testsuite/gcc.target/aarch64/no-inline-lrint_2.c
index c99843c3a25fbd519f2959d3eb0ce3da3f7f16d9..05c0a2affa0b3712f00b10ae10a6a7c7aa6e8637 100644
--- a/gcc/testsuite/gcc.target/aarch64/no-inline-lrint_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/no-inline-lrint_2.c
@@ -13,8 +13,7 @@ TEST (fif, float , int, )
TEST (dlld, double, long long, l)
TEST (fllf, float , long long, l)
-/* { dg-final { scan-assembler-times "frintx\td\[0-9\]+, d\[0-9\]+" 3 } } */
-/* { dg-final { scan-assembler-times "frintx\ts\[0-9\]+, s\[0-9\]+" 3 } } */
+/* { dg-final { scan-assembler-times "frintx\t\[d,s\]\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */
/* { dg-final { scan-assembler-times "bl\tlrint" 4 } } */
/* { dg-final { scan-assembler-times "bl\tllrint" 2 } } */
/* { dg-final { scan-assembler-not "fcvtzs" } } */
