> On 5 Dec 2024, at 20:07, Richard Sandiford wrote:
>
> External email: Use caution opening links or attachments
>
>
> Jennifer Schmitz writes:
>>> On 5 Dec 2024, at 11:44, Richard Biener wrote:
>>>
>>> External email: Use caution opening links or attachments
>>>
>>>
>>> On Thu, 5 Dec 20
> On 5 Dec 2024, at 16:56, Richard Sandiford wrote:
>
> External email: Use caution opening links or attachments
>
>
> Jennifer Schmitz writes:
>> @@ -3622,6 +3631,57 @@ gimple_folder::redirect_pred_x ()
>> return redirect_call (instance);
>> }
>>
>> +/* Fold calls with predicate pfalse:
The new fold-mem-offsets RTL pass takes significant amount of time
and memory. Add a timevar for it.
Built on x86_64-unknown-linux-gnu, pushed as obvious.
This doesn't resolve the bug of course.
PR rtl-optimization/117922
* timevar.def (TV_FOLD_MEM_OFFSETS): New.
* fold-
On 12/5/24 6:18 AM, Konstantinos Eleftheriou wrote:
From: kelefth
Avoid-store-forwarding doesn't handle the case where an instruction in the
store-load sequence contains a REG_EH_REGION note, leading to the insertion
of instructions after it, while it should be the last instruction in the
ba
From: Pan Li
This patch would like to refactor the testcases for rvv binop
and cmp after sorts of optimization option passing to testcase.
To fits different optimization option asm dump checks.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
It is test only
From: Pan Li
Like the strided load/store, the testcases of vector binop and cmp
are designed to pick up different sorts of optimization options but
actually these option are ignored according to the Execution log of
the gcc.log.
This patch would like to make it correct almost the same as how we
Hi.
This is a patch for the bug 117923.
I'd like to know if there's a simpler fix for this.
I tried keeping all the fields in the same struct and annotating the
scalar fields as in:
enum GTY((skip)) machine_mode mode;
but it didn't fix the issue.
Any other ideas?
The following test suites pas
r15-919-gef27b91b62c3aa removed 1 / 3 size reduction for innermost
loop, but it doesn't accurately remember what's "innermost" for 2
testcases in PR117888.
1) For pass_cunroll, the "innermost" loop could be an originally outer
loop with inner loop completely unrolled by cunrolli. The patch moves
l
On Thu, Dec 5, 2024 at 2:37 PM Martin Uecker wrote:
>
> Am Donnerstag, dem 05.12.2024 um 14:28 -0800 schrieb Bill Wendling:
> > On Thu, Dec 5, 2024 at 1:09 PM Qing Zhao wrote:
> > > > On Dec 3, 2024, at 10:29, Qing Zhao wrote:
> > > > > On Dec 3, 2024, at 10:07, Martin Uecker wrote:
> > > > > T
On 12/5/24 5:15 PM, Marek Polacek wrote:
On Thu, Dec 05, 2024 at 09:29:41AM -0500, Patrick Palka wrote:
On Wed, 4 Dec 2024, Marek Polacek wrote:
Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk?
-- >8 --
Here we ICE with a partially-substituted pack indexing. The pack
expanded to
Am Donnerstag, dem 05.12.2024 um 14:28 -0800 schrieb Bill Wendling:
> On Thu, Dec 5, 2024 at 1:09 PM Qing Zhao wrote:
> > > On Dec 3, 2024, at 10:29, Qing Zhao wrote:
> > > > On Dec 3, 2024, at 10:07, Martin Uecker wrote:
> > > > The language extension does not exist yet, so there is no problem.
Am Donnerstag, dem 05.12.2024 um 21:09 + schrieb Qing Zhao:
>
> > On Dec 3, 2024, at 10:29, Qing Zhao wrote:
> > >
> > > > >
> > > > > > >
> > > > > > > It would be clearer if you the syntax ".n" which resembles
> > > > > > > the syntax for designated initializers that is already us
On Thu, Dec 5, 2024 at 1:09 PM Qing Zhao wrote:
> > On Dec 3, 2024, at 10:29, Qing Zhao wrote:
> >> On Dec 3, 2024, at 10:07, Martin Uecker wrote:
> >> The language extension does not exist yet, so there is no problem.
> > Yeah, I should mention this as “corresponding future language extension”
On Thu, Dec 5, 2024 at 2:13 PM Antoni Boucher wrote:
>
> Thanks for the review.
> See explanations and questions below.
>
> Le 2024-12-05 à 17 h 03, Andrew Pinski a écrit :
> > On Thu, Dec 5, 2024 at 1:46 PM Antoni Boucher wrote:
> >>
> >> Hi.
> >> This is a patch for the bug 117886.
> >> I ran t
On Thu, Dec 05, 2024 at 09:29:41AM -0500, Patrick Palka wrote:
> On Wed, 4 Dec 2024, Marek Polacek wrote:
>
> > Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk?
> >
> > -- >8 --
> > Here we ICE with a partially-substituted pack indexing. The pack
> > expanded to an empty pack, which
Thanks for the review.
See explanations and questions below.
Le 2024-12-05 à 17 h 03, Andrew Pinski a écrit :
On Thu, Dec 5, 2024 at 1:46 PM Antoni Boucher wrote:
Hi.
This is a patch for the bug 117886.
I ran the jit tests on x86-64 and there are as much failures as on the
master branch (4).
On Thu, Dec 5, 2024 at 1:46 PM Antoni Boucher wrote:
>
> Hi.
> This is a patch for the bug 117886.
> I ran the jit tests on x86-64 and there are as much failures as on the
> master branch (4).
> I also ran the jit tests on Aarch64 with another patch and there are
> much less failures.
> Iains ran
Hi.
This is a patch for the bug 117886.
I ran the jit tests on x86-64 and there are as much failures as on the
master branch (4).
I also ran the jit tests on Aarch64 with another patch and there are
much less failures.
Iains ran the tests with this patch on Darwin and this fixes the
failures of
> On Dec 3, 2024, at 10:29, Qing Zhao wrote:
>
>
>
>> On Dec 3, 2024, at 10:07, Martin Uecker wrote:
>>
>> Am Dienstag, dem 03.12.2024 um 14:31 + schrieb Qing Zhao:
>>>
On Dec 3, 2024, at 01:33, Martin Uecker wrote:
Am Montag, dem 02.12.2024 um 22:58 + schrieb Qing
Jennifer Schmitz writes:
>> On 5 Dec 2024, at 11:44, Richard Biener wrote:
>>
>> External email: Use caution opening links or attachments
>>
>>
>> On Thu, 5 Dec 2024, Jennifer Schmitz wrote:
>>
>>>
>>>
On 17 Oct 2024, at 19:23, Richard Sandiford
wrote:
External email:
On Thu, Dec 05, 2024 at 04:16:22PM +, Andrew Carlotti wrote:
> On Sun, Dec 01, 2024 at 03:54:25PM -0700, Jeff Law wrote:
> >
> >
> > On 11/13/24 12:03 PM, Richard Sandiford wrote:
> > > Andrew Carlotti writes:
> >
> > > > >
> > > > > I think this is mostly my ignorance of the code, and wou
On Thu, Dec 05, 2024 at 12:01:47PM -0500, Jason Merrill wrote:
Thanks for the review.
> > --- gcc/cp/constexpr.cc.jj 2024-07-17 23:36:01.164308696 +0200
> > +++ gcc/cp/constexpr.cc 2024-07-24 15:49:26.881791327 +0200
> > @@ -4113,6 +4136,11 @@ find_array_ctor_elt (tree ary, tree dind
> >
On 12/4/24 12:27 PM, Marek Polacek wrote:
On Tue, Dec 03, 2024 at 04:27:22PM -0500, Jason Merrill wrote:
On 12/3/24 2:46 PM, Marek Polacek wrote:
On Thu, Nov 28, 2024 at 12:04:56PM -0500, Jason Merrill wrote:
On 11/27/24 9:06 PM, Marek Polacek wrote:
Not a bugfix, but this should only affect
On 28/05/2024 10:31, Gerald Pfeifer wrote:
> On Mon, 10 Jul 2023, Kyrylo Tkachov via Gcc-patches wrote:
>> I know the GCC source is inconsistent on this but the proper branding
>> these days is "ARM" -> "Arm" and "ARMv8.1-M" -> "Armv8.1-M".
>
> Arm, Red Hat, and SUSE - those three are spelt incor
The fix for PR116778:
Brief:
The bug appears in LRA after rematerialization pass while creating live ranges.
File lra.cc:
*
/* Now we know what pseudos should be spilled. Try to
rematerialize them first. */
if (lra
> On 5 Dec 2024, at 11:44, Richard Biener wrote:
>
> External email: Use caution opening links or attachments
>
>
> On Thu, 5 Dec 2024, Jennifer Schmitz wrote:
>
>>
>>
>>> On 17 Oct 2024, at 19:23, Richard Sandiford
>>> wrote:
>>>
>>> External email: Use caution opening links or attachm
I was just looking back through some old emails and saw that this was never
reviewed.
On 26/04/2024 18:37, Andrew Pinski wrote:
> On many cores, the mov instruction is "free" so the sequence:
> cmp w0, #0
> csetw0, ne
> add w0, w0, 42
> is more expensive than j
On 7/24/24 11:55 AM, Jakub Jelinek wrote:
On Tue, Jul 23, 2024 at 09:38:15PM -0400, Jason Merrill wrote:
Thanks.
but please see
https://github.com/llvm/llvm-project/pull/97274#issuecomment-2230929277
comment and whether we really want the preprocessor to preprocess it for
C++ as (or as-if)
stat
Soumya AR writes:
> NBSL, BSL1N, and BSL2N are bit-select intructions on SVE2 with certain
> operands
> inverted. These can be extended to work with Neon modes.
>
> Since these instructions are unpredicated, duplicate patterns were added with
> the predicate removed to generate these instructions
Hi all,
This is V2 of a patch which adds new insns which optimise vector concatenations
when a narrowing truncation is performed on the resulting vector. This is for
integer as well as floating-point vectors.
The aforementioned operation usually results in codegen such as...
uzp1v0.2
Soumya AR writes:
> The ASRD instruction on SVE performs an arithmetic shift right by an immediate
> for divide.
>
> This patch enables the use of ASRD with Neon modes.
>
> For example:
>
> int in[N], out[N];
>
> void
> foo (void)
> {
> for (int i = 0; i < N; i++)
> out[i] = in[i] / 4;
> }
>
On Sun, Dec 01, 2024 at 03:54:25PM -0700, Jeff Law wrote:
>
>
> On 11/13/24 12:03 PM, Richard Sandiford wrote:
> > Andrew Carlotti writes:
>
> > > >
> > > > I think this is mostly my ignorance of the code, and would be obvious
> > > > if I tried it out locally, but: why do we need to do this a
Fix several things to enable combine to handle addcarry/subborrow patterns:
- Fix wrong canonical form of addcarry insn and friends. For
commutative operand (PLUS RTX) binary operand (LTU) takes precedence before
unary operand (ZERO_EXTEND).
- Swap operands of GTU comparison to canonicalize addca
GIMPLE code which performs a narrowing truncation on the result of a
vector concatenation currently results in an unnecessary XTN being
emitted following a UZP1 to concate the operands. In cases such as this,
UZP1 should instead use a smaller arrangement specifier to replace the
XTN instruction. Th
Jennifer Schmitz writes:
> @@ -3622,6 +3631,57 @@ gimple_folder::redirect_pred_x ()
>return redirect_call (instance);
> }
>
> +/* Fold calls with predicate pfalse:
> + _m predication: lhs = op1.
> + _x or _z: lhs = {0, ...}.
> + Implicit predication that reads from memory: lhs = {0, .
On Mon, Dec 02, 2024 at 08:59:20AM -0700, Jeff Law wrote:
>
>
> On 10/31/24 12:29 PM, Andrew Carlotti wrote:
> > This pass is used to optimise assignments to the FPMR register in
> > aarch64. I chose to implement this as a middle-end pass because it
> > mostly reuses the existing RTL PRE code wi
The mmintrin.h header was adjusted for GCC-14 to generate a
(suppressible) warning if it was used, saying that support would be
removed in GCC-15.
Make that come true by removing the contents of this header and
emitting an error.
At this point in time I've not removed the internal support for the
Ping
Tamar Christina writes:
>> > @@ -7976,22 +7976,30 @@ store_constructor (tree exp, rtx target, int
>> > cleared,
>> poly_int64 size,
>> > gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp)
>> > * TYPE_VECTOR_SUBPARTS (etype),
>> >
This is the 3rd ping of the Middle-end review for this patch.
Thanks a lot!
Qing
> On Nov 26, 2024, at 10:30, Qing Zhao wrote:
>
> Another ping on the Middle-end review of this patch.
>
> This patch has been waiting for the middle-end review for a long time.
>
> Please review it and provid
> > What do you think, Andi and Richi? I myself slightly prefer keeping the DP
> > but
> > I would be fine with either option.
>
> I think we can keep both, though I have no strong opinion.
Keeping both is fine for me.
-Andi
Here are a bit less obvious cases of duplicate, mostly of the
form (op (op:c @0 @1) (op:c @0 @1)) where it's enough to have
one :c to get all relevant cases.
Bootstrapped on x86_64-unknown-linux-gnu, testing in progress.
* match.pd: Remove redundant :c, reported by genmatch as
dup
On Wed, 4 Dec 2024, Marek Polacek wrote:
> Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk?
>
> -- >8 --
> Here we ICE with a partially-substituted pack indexing. The pack
> expanded to an empty pack, which we can't index.
IIUC this can only happen when called from tsubst_pack_index
> > But yeah, thinking about it some more, 1 seems like a lot. Maybe the
> > limit
> > could be 1000. That's also big enough. I could try to run the testcase
> > set to
> > 1000 on my not-so-powerful laptop this time and check that even on that
> > machine
> > it finishes "fast" (under a
чт, 5 дек. 2024 г. в 14:23, Georg-Johann Lay :
>
> This is an addendum to the -msplit-ldst patch.
>
> When -msplit-ldst is on, it may be possible to propagate __zero_reg__
> to the sources of the new stores. For example, without this patch,
>
> unsigned long lx;
>
> void store_lsr17 (void)
> {
>
The standard says that Compare, Pred and Hash objects should be swapped
as described in [swappable.requirements] which means calling swap
unqualified with std::swap visible to name lookup.
libstdc++-v3/ChangeLog:
PR libstdc++/117921
* include/bits/hashtable_policy.h (_Hash_code_ba
Richard Biener writes:
> On Thu, 5 Dec 2024, Richard Sandiford wrote:
>
>> Richard Biener writes:
>> > On Fri, 29 Nov 2024, Jakub Jelinek wrote:
>> >
>> >> On Fri, Nov 29, 2024 at 09:19:55AM +0100, Richard Biener wrote:
>> >> > For a TSVC testcase we see failed register coalescing due to a
>> >>
Hi!
On 2020-01-31T11:20:14+, Andrew Stubbs wrote:
> This is one of those things I don't know why we didn't notice sooner.
..., and here's another thing I don't know why we didn't notice sooner.
;-P (Category: "don't we all love C++?!")
> [...]
> I also needed a convenient way to create 0.0
On 29/11/2024 06:02, Arvin Zhong wrote:
> Hi GCC reviewers,
>
> The star-mc1 CPU is an Armv8-m Mainline CPU supporting ARM CDE feature.
> The attached is the patch to support adding CDE options for -mcpu=star-mc1.
> The patch has been built and tested on the GCC upstream with arm-none-eabi.
>
> I
genmatch currently has a difficulty to decide whether a duplicate
structural match is really duplicate as uses of captures within
predicates or in C code can be order dependent. For example
a reported duplicate results in
{
tree captures[4] ATTRIBUTE_UNUSED = { _p1, _p0, _q20, _q21 }
if (g
On Thu, 5 Dec 2024, Richard Sandiford wrote:
> Richard Biener writes:
> > On Fri, 29 Nov 2024, Jakub Jelinek wrote:
> >
> >> On Fri, Nov 29, 2024 at 09:19:55AM +0100, Richard Biener wrote:
> >> > For a TSVC testcase we see failed register coalescing due to a
> >> > different schedule of GIMPLE .F
Richard Biener writes:
> On Fri, 29 Nov 2024, Jakub Jelinek wrote:
>
>> On Fri, Nov 29, 2024 at 09:19:55AM +0100, Richard Biener wrote:
>> > For a TSVC testcase we see failed register coalescing due to a
>> > different schedule of GIMPLE .FMA and stores fed by it. This
>> > can be mitigated by ma
From: kelefth
Avoid-store-forwarding doesn't handle the case where an instruction in the
store-load sequence contains a REG_EH_REGION note, leading to the insertion
of instructions after it, while it should be the last instruction in the
basic block. This causes an ICE when compiling using `-O -f
On Thu, Dec 05, 2024 at 11:37:45AM +0100, Richard Biener wrote:
> * c-c++-common/torture/pr117912-1.c: New testcase.
> * c-c++-common/torture/pr117912-2.c: Likewise.
> * gcc.dg/torture/pr117912-3.c: Likewise.
Thanks for the patch.
I'd certainly suggest to replace the third test w
On Tue, 3 Dec 2024, Tamar Christina wrote:
> > > This patch implements a new OEP flag called OEP_STRUCTURAL_EQ. This flag
> > > will
> > > check if the operands would produce the same bit values after the
> > > computations
> > > even if the final sign is different.
> >
> > I think the name is
On Thu, Dec 5, 2024 at 1:39 PM Alexandre Oliva wrote:
>
> Hi,
>
> Thanks for the review.
>
> I hadn't seen your response yet, and for days I have been just about to
> send v3 with some incremental changes.
>
> Here they are, for the record. They fix a bug I had introduced while
> converting const
On Wed, 4 Dec 2024, Tamar Christina wrote:
> > -Original Message-
> > From: Richard Biener
> > Sent: Wednesday, December 4, 2024 2:53 PM
> > To: Tamar Christina
> > Cc: gcc-patches@gcc.gnu.org; nd ; Richard Sandiford
> >
> > Subject: Re: [PATCH 6/7]middle-end: add vec_init support for v
Hi,
Thanks for the review.
I hadn't seen your response yet, and for days I have been just about to
send v3 with some incremental changes.
Here they are, for the record. They fix a bug I had introduced while
converting constants and masks to wide_int, simplifies some internal
APIs, reworks some
Hi Thomas!
On 12/4/24 13:35, Thomas Schwinge wrote:
Hi Arthur!
On 2024-11-25T11:24:08+0100, Arthur Cohen wrote:
Thanks, this patch (and your other one on the matter) looks good
Oh, wow -- I passed the first non-trivial Rust programming I've done!
:-D ;-)
but I
have a slight issue with it.
On Thu, 5 Dec 2024, Filip Kastl wrote:
> On Fri 2024-11-15 12:08:24, Richard Biener wrote:
> > On Fri, 15 Nov 2024, Filip Kastl wrote:
> >
> > > Hi,
> > >
> > > Andi's greedy bit test finding algorithm was reverted. I found a fix for
> > > the
> > > problem that caused the revert. I made this
On Thu, Dec 5, 2024 at 2:25 AM wrote:
>
> From: Pan Li
>
> This patch would like to refactor the all unsigned SAT_TRUNC patterns,
> aka:
> * Extract type check outside.
> * Re-arrange the related match pattern forms together.
OK.
> The below test suites are passed for this patch.
> * The rv64gc
On Thu, 5 Dec 2024, Filip Kastl wrote:
> Hi Andi and Richi,
>
> sorry for the late reply. While looking for a testcase where the DP algorithm
> performs better than Andi's greedy one I found out some new things about bit
> test switch lowering and I had to think them through. I write about what
On Thu, 5 Dec 2024, Jakub Jelinek wrote:
> 2024-12-05 Jakub Jelinek
>
> PR c/107980
> gcc/
> * ginclude/stdarg.h (va_start): For C23+ change parameters from
> v, ... to just ... and define to __builtin_c23_va_start(__VA_ARGS__)
> rather than __builtin_va_start(v, 0).
>
On 02/12/2024 21:21, Christophe Lyon wrote:
> If the target does not support floating-point, we register FP vector
> types as 'void' (see register_vector_type).
>
> The leads to warnings about 'pure attribute on function returning
> void' when we declare the various load intrinsics because their
>
On Thu, 5 Dec 2024, Jakub Jelinek wrote:
> Hi!
>
> The following testcases are miscompiled on s390x-linux, because the
> doloop_optimize
> /* Ensure that the new sequence doesn't clobber a register that
> is live at the end of the block. */
> {
> bitmap modified = BITMAP_ALLOC (NULL
On Thu, 5 Dec 2024, Jennifer Schmitz wrote:
>
>
> > On 17 Oct 2024, at 19:23, Richard Sandiford
> > wrote:
> >
> > External email: Use caution opening links or attachments
> >
> >
> > Jennifer Schmitz writes:
> >> [...]
> >> Looking at the diff of the vect dumps (below is a section of the
Hi Andi and Richi,
sorry for the late reply. While looking for a testcase where the DP algorithm
performs better than Andi's greedy one I found out some new things about bit
test switch lowering and I had to think them through. I write about what I
found bellow.
On Thu 2024-11-21 10:01:38, Andi
On Fri 2024-11-15 12:08:24, Richard Biener wrote:
> On Fri, 15 Nov 2024, Filip Kastl wrote:
>
> > Hi,
> >
> > Andi's greedy bit test finding algorithm was reverted. I found a fix for
> > the
> > problem that caused the revert. I made this patch to reintroduce the greedy
> > alg into GCC. Howe
VN again is the culprit for exploiting address equivalences before
__builtin_object_size got the chance to do its job. This time
it isn't about union members but adjacent structure fields where
an address to one after the last element of an array field can
spill over to the next field.
The follow
Hi!
The following testcases are miscompiled on s390x-linux, because the
doloop_optimize
/* Ensure that the new sequence doesn't clobber a register that
is live at the end of the block. */
{
bitmap modified = BITMAP_ALLOC (NULL);
for (rtx_insn *i = doloop_seq; i != NULL; i = NE
This is an addendum to the -msplit-ldst patch.
When -msplit-ldst is on, it may be possible to propagate __zero_reg__
to the sources of the new stores. For example, without this patch,
unsigned long lx;
void store_lsr17 (void)
{
lx >>= 17;
}
compiles to:
store_lsr17:
lds r26,lx+2
gcc/ChangeLog:
* doc/invoke.texi: Add store-forwarding-max-distance.
Signed-off-by: Filip Kastl
---
gcc/doc/invoke.texi | 5 +
1 file changed, 5 insertions(+)
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index d2409a41d50..4b1acf9b79c 100644
--- a/gcc/doc/invoke.texi
+++
Add missing '=' after -param=cycle-accurate-model.
gcc/ChangeLog:
* params.opt: Add missing '=' after -param=cycle-accurate-model.
Signed-off-by: Filip Kastl
---
gcc/params.opt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/params.opt b/gcc/params.opt
index f5c
> On 17 Oct 2024, at 19:23, Richard Sandiford wrote:
>
> External email: Use caution opening links or attachments
>
>
> Jennifer Schmitz writes:
>> [...]
>> Looking at the diff of the vect dumps (below is a section of the diff for
>> strided_store_2.c), it seemed odd that vec_to_scalar oper
This patch adds the TARGET_CREATE_FMV_DISPATCHER_AT_DEFAULT_IMPL flag
which changes FMV behavior for target_version functions to match the Arm
C Language Extension.
The functional differences consist of:
1. Generating the resolver for the dispatched symbol at the site of the
default version de
From: Alfie Richards
Hi Jason,
Thank you for the feedback! Hopefully that is all addressed in this version.
Again regtested and I think this version is functionally identical to the
previous.
Kind regards,
Alfie Richards
Alfie Richards (1):
C++: Add flag to generate resolver at default ver
ср, 4 дек. 2024 г. в 13:39, Georg-Johann Lay :
>
> This patch reworks patterns that add / subtract an (inverted) MSB.
> It handles more cases by using mode iterators.
>
> Ok for trunk?
>
Please apply.
Denis
Hi Paul,
thanks for the review. Committed as gcc-15-5933-gdd1cdba3242.
Sorry for the break in mail hierarchy. I am on my laptop now and don't
have the whole hierarchy here.
Thanks again,
Andre
> Hi Andre,
>
> The patch looks to be straightforward. OK for mainline.
>
> Thanks!
>
> Paul
>
чт, 5 дек. 2024 г. в 00:07, Georg-Johann Lay :
>
> In nonlocal_goto sets, change hard_frame_pointer_rtx only after
> emit_stack_restore() restored SP. This is needed because SP
> my be stored in some frame location.
>
> The only change to test results is that gcc.c-torture/execute/pr64242.c
> is p
> On 3 Dec 2024, at 11:32, Tamar Christina wrote:
>
>> -Original Message-
>> From: Kyrylo Tkachov
>> Sent: Tuesday, December 3, 2024 10:19 AM
>> To: Tamar Christina
>> Cc: GCC Patches ; nd ; Richard
>> Earnshaw ; Marcus Shawcroft
>> ; ktkac...@gcc.gnu.org; Richard Sandiford
>>
>> Sub
ср, 4 дек. 2024 г. в 20:16, Georg-Johann Lay :
>
> This patch splits multi-byte loads and stores into single-byte
> ones provided:
>
> - New option -msplit-ldst is on (e.g. -O2 and higher), and
> - The memory is non-volatile, and
> - The address space is generic, and
> - The split addresses are
> On 4 Dec 2024, at 19:02, Richard Sandiford wrote:
>
> The arm_neon.h intrinsic definitions use a bitmask of flags to
> indicate what side-effects the intrinsic might have. However,
> their names are a bit confusing:
>
> - FLAG_AUTO_FP was originally suggested as a way of saying
> "automati
On 12/5/24 8:45 AM, Richard Biener wrote:
c_parser_gimple_compound_statement returns whether the
compound statement ended with a return statement, not
whether there was an error, so this change looks wrong.
Thanks, I will have to dig deeper to understand error handling then.
Heiko
Hi!
va_start macro was changed in C23 from the C17 va_start (va_list ap, parmN)
where parmN is the identifier of the last parameter into
va_start (va_list ap, ...) where arguments after ap aren't evaluated.
Late in the C23 development
"If any additional arguments expand to include unbalanced paren
On Wed, Dec 04, 2024 at 02:22:27PM -0500, Jason Merrill wrote:
> Maybe the diagnostic could say it's invalid because it allows a register?
Thanks. Here is what I've committed after another bootstrap/regtest
on x86_64-linux and i686-linux:
2024-12-05 Jakub Jelinek
PR c/41045
gcc/
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