Segher, you'll recognize these as your patches from pr88343. All I've
done here is give you a testcase for the legitimize_tls_address change
(which you said you had no idea what the patch was for!)
Fixes lack of r30 save/restore on powerpc-linux.
// -m32 -fpic -ftls-model=initial-exec
__thre
On Tue, Feb 5, 2019 at 10:46 AM Nikhil Benesch wrote:
>
> Ian—is there anything preventing this from getting merged? (I don't have
> write access.)
Thanks, committed now.
Ian
> On Thu, Jan 24, 2019 at 11:31 AM Nikhil Benesch
> wrote:
>
> > On Thu, Jan 24, 2019 at 10:15 AM Richard Biener
> > w
On Feb 5, 2019, Jason Merrill wrote:
> On Tue, Feb 5, 2019 at 1:37 AM Alexandre Oliva wrote:
>> On Jan 31, 2019, Jason Merrill wrote:
>>
>> > Let's use strip_using_decl instead
>>
>> Aah, nice! Thanks, I'll make the changes, test them, and post a new patch.
>>
>>
>> >> @@ -13288,7 +13295,
As reported in bug 88584, if you have a file-scope array with external
linkage, initialized at file scope, and that array is shadowed at
block scope, and is declared again with external linkage and an
incomplete type in an inner scope, it is wrongly given a complete type
in that inner scope when th
On Tue, 5 Feb 2019, Jakub Jelinek wrote:
> Hi!
>
> The r253411 change to improve diagnostics added code to set DECL_ARGUMENTS
> to the declarator->u.arg_info->parms. My understanding is that this was
> meant for function prototypes, so that we can emit better diagnostics for
> those. Unfortunat
On Tue, 5 Feb 2019, Дилян Палаузов wrote:
> Will it help, if bugzilla is tweaked to send reminders every two weeks
> for ready-patches? This also has the advantage, that people will not
> have to once update a patch in BZ and then send it over gcc-patches.
For any proposed changes to patch sub
PR libstdc++/89128
* include/bits/stl_queue.h (queue, priority_queue): Add deduction
guides.
* include/bits/stl_stack.h (stack): Likewise.
* testsuite/23_containers/priority_queue/deduction.cc: New test.
* testsuite/23_containers/queue/deduction.cc:
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Hi!
The r253411 change to improve diagnostics added code to set DECL_ARGUMENTS
to the declarator->u.arg_info->parms. My understanding is that this was
meant for function prototypes, so that we can emit better diagnostics for
those. Unfortunately, start_decl doesn't always return a new decl, but
Hi!
Apparently VECTOR_CSTs shouldn't be stepped if they contain floating
elements and also widening conversions can be problematic if there is
wrapping in the narrower type. On the following testcase, we create a
stepped VECTOR_CST with REAL_CST elts and ICE whenever we try to print it or
when we
On Tue, 2019-02-05 at 21:40 +, Andrea Corallo wrote:
> David Malcolm writes:
>
> > On Sat, 2019-02-02 at 16:34 +0100, Jakub Jelinek wrote:
> > > On Sat, Feb 02, 2019 at 10:18:43AM -0500, David Malcolm wrote:
> > > > > > Alternatively, should these patches go into a branch of
> > > > > > queued
Okay then. This patch takes the hopefully biggest steps towards
a std::variant rewrite. The problem we have with the current
approach is that we'd really like to write fairly straightforward
code for variant's special member functions, but can't, because
the specification suggests fairly straightfo
On 2/5/19 12:14 PM, Jason Merrill wrote:
On 2/5/19 1:46 PM, Martin Sebor wrote:
On 2/1/19 7:41 AM, Jason Merrill wrote:
On 1/31/19 5:49 PM, Martin Sebor wrote:
On 1/30/19 3:15 PM, Jason Merrill wrote:
On 1/29/19 7:15 PM, Martin Sebor wrote:
+ /* Try to convert the original SIZE to a ssi
On Feb 2, 2019, at 2:32 AM, Jakub Jelinek wrote:
>
> Regardless of the PR87485 decision, I think we should fix this testcase.
> ok for trunk?
Ok.
> 2019-02-02 Jakub Jelinek
>
> PR rtl-optimization/11304
> * gcc.target/i386/call-1.c (set_eax): Add "eax" clobber.
> * gcc.ta
David Malcolm writes:
> On Sat, 2019-02-02 at 16:34 +0100, Jakub Jelinek wrote:
>> On Sat, Feb 02, 2019 at 10:18:43AM -0500, David Malcolm wrote:
>> > > > Alternatively, should these patches go into a branch of queued
>> > > > jit
>> > > > changes for gcc 10?
>> > >
>> > > Is there anything like
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On Tue, Feb 05, 2019 at 04:17:48PM -0500, Jason Merrill wrote:
> On 2/5/19 3:43 PM, Marek Polacek wrote:
> > On Tue, Feb 05, 2019 at 01:24:15PM -0500, Jason Merrill wrote:
> > > On 2/5/19 11:31 AM, Jakub Jelinek wrote:
> > > > On Tue, Feb 05, 2019 at 11:24:14AM -0500, Jason Merrill wrote:
> > > > >
On 2/5/19 3:43 PM, Marek Polacek wrote:
On Tue, Feb 05, 2019 at 01:24:15PM -0500, Jason Merrill wrote:
On 2/5/19 11:31 AM, Jakub Jelinek wrote:
On Tue, Feb 05, 2019 at 11:24:14AM -0500, Jason Merrill wrote:
Yes, thanks, mark_rvalue_use is definitely wrong here. But mark_lvalue_use
might be wr
Hi Steve,
Thanks for looking at this. A few comments on the patch:
+bool
+aarch64_masks_and_shift_for_bfi_p (scalar_int_mode mode,
+ unsigned HOST_WIDE_INT mask1,
+ unsigned HOST_WIDE_INT shft_amnt,
+
On Tue, Feb 05, 2019 at 01:24:15PM -0500, Jason Merrill wrote:
> On 2/5/19 11:31 AM, Jakub Jelinek wrote:
> > On Tue, Feb 05, 2019 at 11:24:14AM -0500, Jason Merrill wrote:
> > > Yes, thanks, mark_rvalue_use is definitely wrong here. But
> > > mark_lvalue_use
> > > might be wrong as well; we don'
On 2/4/19 9:07 AM, Jeff Law wrote:
> On 2/4/19 6:15 AM, Richard Biener wrote:
>>
>> When I introduced tree-form bitmaps I forgot to think about GC.
>> The following drops the chain_prev annotation to make the marker
>> work for trees. I've also maked the obstack member GTY skip
>> (and prevent bit
[PATCH, rs6000] Fix instruction counts on powerpc64 test cases.
This patch fixes the assembler instruction counts for some test cases
that started failing due to changes in code generation. The targets
were adjusted a bit as well to avoid generating BE/LE endian code on
unsupported platforms.
Bo
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On 2/5/19 1:46 PM, Martin Sebor wrote:
On 2/1/19 7:41 AM, Jason Merrill wrote:
On 1/31/19 5:49 PM, Martin Sebor wrote:
On 1/30/19 3:15 PM, Jason Merrill wrote:
On 1/29/19 7:15 PM, Martin Sebor wrote:
+ /* Try to convert the original SIZE to a ssizetype. */
+ if (orig_size != error_
On 1/30/19 10:56 AM, Alexandre Oliva wrote:
Because of rank compares, and checks for ck_list, we know that if we
see user_conv_p or ck_list in ics1, we'll also see it in ics2. This
reasoning does not extend to ck_aggr, however, so we might have
ck_aggr conversions starting both ics1 and ics2, wh
Ian—is there anything preventing this from getting merged? (I don't have
write access.)
On Thu, Jan 24, 2019 at 11:31 AM Nikhil Benesch
wrote:
> On Thu, Jan 24, 2019 at 10:15 AM Richard Biener
> wrote:
> >
> > Ah, I missed that pt is probably a pointer type as well, then the code
> > simply ali
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On 2/1/19 7:41 AM, Jason Merrill wrote:
On 1/31/19 5:49 PM, Martin Sebor wrote:
On 1/30/19 3:15 PM, Jason Merrill wrote:
On 1/29/19 7:15 PM, Martin Sebor wrote:
+ /* Try to convert the original SIZE to a ssizetype. */
+ if (orig_size != error_mark_node
+ && !TYPE_UNSIGNED (
On Sat, 2019-02-02 at 16:34 +0100, Jakub Jelinek wrote:
> On Sat, Feb 02, 2019 at 10:18:43AM -0500, David Malcolm wrote:
> > > > Alternatively, should these patches go into a branch of queued
> > > > jit
> > > > changes for gcc 10?
> > >
> > > Is there anything like an ABI involved? If so we shoul
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On 2/5/19 11:31 AM, Jakub Jelinek wrote:
On Tue, Feb 05, 2019 at 11:24:14AM -0500, Jason Merrill wrote:
Yes, thanks, mark_rvalue_use is definitely wrong here. But mark_lvalue_use
might be wrong as well; we don't know here how the expression is used by the
inner conversions for the user-defined
This patch by Ben Shi fixes the Go frontend to check duplicate
implicit indexes in slices/array composite literals. This fixes
https://golang.org/issue/28186. Bootstrapped and ran Go testsuite on
x86_64-pc-linux-gnu. Committed to mainline.
Ian
Index: gcc/go/gofrontend/MERGE
Splitters are not allowed to use data flow routines depending on
REG_DEAD notes since these are not recomputed by the split pass and
might therefore be outdated. The splitter we have for load and test
FP turns a potentially stale REG_DEAD note into a clobber of that
register. This then leads to w
On 2/5/19 11:40 AM, Jakub Jelinek wrote:
On Tue, Feb 05, 2019 at 11:16:04AM -0500, Jason Merrill wrote:
--- gcc/cp/optimize.c.jj2019-01-21 23:32:43.0 +0100
+++ gcc/cp/optimize.c 2019-02-04 16:40:21.354179933 +0100
@@ -417,6 +417,12 @@ maybe_thunk_body (tree fn, bool force)
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On powerpc64-linux, this testcase complains the ABI for vector args
has changed, making the testcase fail (excess output). This patch
shuts up that warning.
Committing as obvious.
Segher
2019-02-05 Segher Boessenkool
* gcc.dg/vect/pr84711.c: Use -Wno-psabi.
---
gcc/testsuite/gcc
Hi all,
For the Dot Product instructions we have the scheduling types neon_dot and
neon_dot_q for the 128-bit versions.
It seems that we're only using the former though, not assigning the neon_dot_q
type anywhere.
This patch fixes that by adding the mode attribute suffix to the type,
similar
On 2/4/19 11:24 PM, Marc Glisse wrote:
> On Mon, 4 Feb 2019, Martin Jambor wrote:
>
>>> Looking for "optional" and "-Wmaybe-uninitialized" shows
>>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78044
>>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80635
>>>
>>> Google also gives
>>> https://www.b
On Tue, Feb 05, 2019 at 11:16:04AM -0500, Jason Merrill wrote:
> > --- gcc/cp/optimize.c.jj2019-01-21 23:32:43.0 +0100
> > +++ gcc/cp/optimize.c 2019-02-04 16:40:21.354179933 +0100
> > @@ -417,6 +417,12 @@ maybe_thunk_body (tree fn, bool force)
> > gcc_assert (clone_
On Tue, Feb 05, 2019 at 11:24:14AM -0500, Jason Merrill wrote:
> Yes, thanks, mark_rvalue_use is definitely wrong here. But mark_lvalue_use
> might be wrong as well; we don't know here how the expression is used by the
> inner conversions for the user-defined conversion. Can we remove the call
>
On 2/4/19 3:48 PM, Marek Polacek wrote:
In this test we have a user-defined conversion converting const int & to
T, and we're binding a const int to const int & -- the parameter of the
converting ctor. We call Func with "VIEW_CONVERT_EXPR(Val)"
as an argument. I like to use a diagram for the co
On Tue, Feb 05, 2019 at 05:04:03PM +0100, Jakub Jelinek wrote:
> On Sat, Feb 02, 2019 at 05:09:37PM -0600, Segher Boessenkool wrote:
> > > 2019-02-01 Kelvin Nilsen
> > >
> > > * gcc.target/powerpc/vec-extract-slong-1.c: Require p8 execution
> > > hardware.
> > > * gcc.target/powerpc/vec-e
On February 5, 2019 4:32:29 PM GMT+01:00, Jakub Jelinek
wrote:
>Hi!
>
>RTL DCE is called in different modes, sometimes it is allowed to alter
>cfg,
>in other cases it is not. The following testcase ICEs because when it
>is
>not allowed to alter cfg (combiner's df_analyze) we remove a noop move
>
On 2/5/19 4:01 AM, Jakub Jelinek wrote:
Hi!
As the following testcase shows, for thunks the expansion code sometimes
requires that arguments with gimple reg type aren't addressable,
thunk needs to be simple passing of arguments directly to another call, not
having extra statements in between tha
On Tue, Feb 5, 2019 at 1:37 AM Alexandre Oliva wrote:
> On Jan 31, 2019, Jason Merrill wrote:
>
> > Let's use strip_using_decl instead
>
> Aah, nice! Thanks, I'll make the changes, test them, and post a new patch.
>
>
> >> @@ -13288,7 +13295,8 @@ grok_special_member_properties (tree decl)
> >> {
On Sat, Feb 02, 2019 at 05:09:37PM -0600, Segher Boessenkool wrote:
> > 2019-02-01 Kelvin Nilsen
> >
> > * gcc.target/powerpc/vec-extract-slong-1.c: Require p8 execution
> > hardware.
> > * gcc.target/powerpc/vec-extract-schar-1.c: Likewise.
> > * gcc.target/powerpc/vec-extract-
On Tue, Feb 05, 2019 at 08:58:44AM -0600, Bill Seurer wrote:
> On 02/05/19 05:31, Segher Boessenkool wrote:
> >Do we not want to test this on LE anymore? Oh, P7, heh. Okay. Not
> >enough coffee yet :-)
>
> It will work if I specify -mbig-endian -mabi=elfv1 but yeah, we don't
> really care abou
On Mon, Feb 4, 2019 at 4:52 PM Marek Polacek wrote:
> On Mon, Feb 04, 2019 at 09:44:01AM -0500, Jason Merrill wrote:
> > On 2/1/19 2:55 PM, Marek Polacek wrote:
> > > On Fri, Feb 01, 2019 at 12:02:44PM -0500, Jason Merrill wrote:
> > > > On 2/1/19 11:26 AM, Marek Polacek wrote:
> > > > > On Wed, J
The additional logic added to __is_convertible_helper in order to
support is_nothrow_convertible makes some uses of is_convertible
ill-formed. This appears to be due to PR c++/87603, but can be avoided
just by defining a separate helper for is_nothrow_convertible. The same
problems are likely to s
Hi!
The following patch ensures we don't access bytes beyond the original MEM,
those might not be mapped etc., or for big endian the offset computation
computes the offset incorrectly.
Bootstrapped/regtested on powerpc64{,-le}-linux, Wilco has tested it on
aarch64_be-*, preapproved by Segher in t
Hi!
RTL DCE is called in different modes, sometimes it is allowed to alter cfg,
in other cases it is not. The following testcase ICEs because when it is
not allowed to alter cfg (combiner's df_analyze) we remove a noop move that
was considered to potentially throw and that made a bb unreachable (
Hi,
due to the AAPCS parameter passing of 8-byte aligned structures, which happen to
be 8-byte aligned or only 4-byte aligned in the test case, ldrd instructions
are generated that may access 4-byte aligned stack slots, which will trap on
ARMv5 and
ARMv6 according to the following document:
htt
On 02/05/19 05:31, Segher Boessenkool wrote:
Do we not want to test this on LE anymore? Oh, P7, heh. Okay. Not
enough coffee yet :-)
It will work if I specify -mbig-endian -mabi=elfv1 but yeah, we don't
really care about P7 generating LE code.
+/* { dg-final { scan-assembler-times "xvcmp
On 05/02/19 14:45 +, Jonathan Wakely wrote:
This fixes two PRs, one trivial (don't use C++17 features in C++11
mode) and one more serious (don't require MoveInsertable when we
should only need CopyInsertable).
It would be nice to rely on if-constexpr in C++11 mode, but it causes
clang warnin
This fixes two PRs, one trivial (don't use C++17 features in C++11
mode) and one more serious (don't require MoveInsertable when we
should only need CopyInsertable).
It would be nice to rely on if-constexpr in C++11 mode, but it causes
clang warnings, complicates testcase bisection/reduction, and
These peepholes match a pair of SImode loads or stores that can be
implemented with a single LDRD or STRD instruction.
When compiling for TARGET_ARM, these peepholes originally created a set
pattern in DI mode to be caught by movdi patterns.
This approach failed to take into account the possibilit
Hello,
the current way to come forward is to send biweekly manual reminders.
Will it help, if bugzilla is tweaked to send reminders every two weeks for
ready-patches? This also has the advantage,
that people will not have to once update a patch in BZ and then send it over
gcc-patches.
Regards
On Tue, Feb 05, 2019 at 02:15:30PM +0100, Richard Biener wrote:
>
> The following fixes an ICE in the type verifier for transparent_union
> marked unions that we refuse to handle such.
> (gcc.dg/transparent-union-6.c)
>
> Bootstrap & regtest running on x86_64-unknown-linux-gnu, OK?
>
> Thanks,
The following fixes an ICE in the type verifier for transparent_union
marked unions that we refuse to handle such.
(gcc.dg/transparent-union-6.c)
Bootstrap & regtest running on x86_64-unknown-linux-gnu, OK?
Thanks,
Richard.
2019-02-05 Richard Biener
PR c/88606
* c-decl.c
On 2/5/19 2:31 AM, Joseph Myers wrote:
> My main comment here is that if you go with the approach of a single
> header shared by multilibs, you should also update the driver code so it
> no longer uses any sort of multilib suffix when searching for this header
> (it *should* still use the sysroo
On 2/4/19 11:10 AM, Jakub Jelinek wrote:
> On Thu, Jan 24, 2019 at 04:25:13PM +0100, Martin Liška wrote:
>> @@ -11361,6 +11365,13 @@ gfc_match_gcc_builtin (void)
>>else if (gfc_match (" ( inbranch ) ") == MATCH_YES)
>> clause = SIMD_INBRANCH;
>>
>> + if (gfc_match (" if ( '%n' ) ", targ
Hi Bill,
On Mon, Feb 04, 2019 at 03:01:24PM -0600, Bill Seurer wrote:
> [PATCH, rs6000] Fix instruction counts on powerpc64 test cases.
>
> This patch fixes the assembler instruction counts for some test cases
> that started failing due to changes in code generation. The targets
> were adjusted
Hi All,
We currently return cost 2 for NEON REG to REG moves, which would be incorrect
for 64 bit moves. We currently don't have a pattern for this in the neon_move
alternatives because this is a bit of a special case. We would almost never
want it to use this r -> r pattern unless it really has
Hi,
On 04/02/19 17:48, Jason Merrill wrote:
On Mon, Feb 4, 2019 at 11:00 AM Paolo Carlini wrote:
On 04/02/19 15:47, Jason Merrill wrote:
On 2/1/19 3:52 PM, Paolo Carlini wrote:
Hi,
I think that this ICE on invalid (and valid, for c++17+) can be in
fact avoided by accepting in make_typename_
On Tue, 5 Feb 2019, Jakub Jelinek wrote:
> Hi!
>
> Like the other emit_*_via_libcall functions, emit_block_comp_via_libcall
> expects to be called with the MEM rtxes, not their addresses.
> E.g. emit_block_op_via_libcall does:
> dst_addr = copy_addr_to_reg (XEXP (dst, 0));
> dst_addr = conver
Hi!
As the following testcase shows, for thunks the expansion code sometimes
requires that arguments with gimple reg type aren't addressable,
thunk needs to be simple passing of arguments directly to another call, not
having extra statements in between that.
In particular, for pass_by_reference a
Hi!
Like the other emit_*_via_libcall functions, emit_block_comp_via_libcall
expects to be called with the MEM rtxes, not their addresses.
E.g. emit_block_op_via_libcall does:
dst_addr = copy_addr_to_reg (XEXP (dst, 0));
dst_addr = convert_memory_address (ptr_mode, dst_addr);
dst_tree = make
Hi Aaron,
On Mon, Feb 04, 2019 at 01:06:57PM -0600, Aaron Sawdey wrote:
> This is the second part of the fix for 89112, fixing the conditions that
> caused it to happen.
> This patch adds REG_BR_PROB notes to the branches generated by inline
> expansion of memcmp
> and strncmp. This prevents any
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