maybe_legitimize_operands normally goes through each operand in turn
and legitimises it in isolation. For example, if two operands to
an instruction initially have constant value C, and the instruction
requires both operands to be registers, the function ends up forcing
C into a register twice and
On Tue, 22 May 2018, Jeff Law wrote:
> So OK for the trunk. If there's fallout in gcc-9, we'll obviously have
> to deal with it.
IMHO what happened here is not healthy. Thank you for the green light.
Alexander
Hi!
As mentioned in the PR, vptestm* instructions with the same input operand used
twice perform the same comparison as vpcmpeq* against zero vector, with the
advantage that a register holding CONST0_RTX (mode) is not needed.
Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
2
In this PR, SLP failed to include a comparison node in the SLP
tree and so marked the node as external. It then went on to call
vect_is_simple_use on the comparison with its STMT_VINFO_DEF_TYPE
still claiming that it was an internal definition.
We already avoid that for vect_analyze_stmt by tempo
On Mon, 21 May 2018, Jason Merrill wrote:
>> broke bootstrap on systems using libc++ instead of libstdc++
>> In file included from /usr/include/c++/v1/new:91:
>> /usr/include/c++/v1/exception:180:5: error: no member named 'fancy_abort'
>> in namespace 'std::__1'; did you mean simply 'fancy_ab
Hi Kyrill,
On 2018/5/22 18:52, Kyrill Tkachov wrote:
> Hi Shaokun,
>
> On 22/05/18 09:40, Shaokun Zhang wrote:
>> This patch adds HiSilicon's an mcpu: tsv110.
>>
>> ---
>> gcc/ChangeLog| 9 +++
>> gcc/config/aarch64/aarch64-cores.def | 5 ++
>> gcc/config/aar
The first hunk fixes looking through the array reference; the second
fixes looking through the base class conversion. There's more to do
to implement DR 1299, but this is a solid improvement from a fairly
trivial patch.
Tested x86_64-pc-linux-gnu, applying to trunk.
commit a065c041556f30a685e2d6b
Hi Ramana,
On 2018/5/22 18:28, Ramana Radhakrishnan wrote:
> On Tue, May 22, 2018 at 9:40 AM, Shaokun Zhang
> wrote:
>> tsv110 is designed by HiSilicon and supports v8_4A, it also optimizes
>> L1 Icache which can access L1 Dcache.
>> Therefore, DC CVAU is not necessary in __aarch64_sync_cache_ran
During function template argument deduction, when we encounter a
non-template parameter with a type that depends on other parameters,
we want to check whether substituting in the arguments we already have
causes a substitution failure. Since we might not have all the
arguments yet, we need to do t
On Tue, May 22, 2018 at 7:25 PM, Marek Polacek wrote:
> On Mon, May 21, 2018 at 09:51:44PM -0400, Jason Merrill wrote:
>> On Mon, May 21, 2018 at 7:34 PM, Marek Polacek wrote:
>> > The previous version of this patch got confused by
>> >
>> > for (int i = 0; n > 0 ? true : false; i++)
>> > /
Here's another small refinement to -Wstringop-truncation to
avoid diagnosing more arguably "safe" cases of strncat() that
match the expected pattern of
strncat (d, s, sizeof d - strlen (d) - 1);
such as
extern char a[4];
strncat (a, "12", sizeof d - strlen (a) - 1);
Since the bound is de
On Mon, May 21, 2018 at 09:51:44PM -0400, Jason Merrill wrote:
> On Mon, May 21, 2018 at 7:34 PM, Marek Polacek wrote:
> > The previous version of this patch got confused by
> >
> > for (int i = 0; n > 0 ? true : false; i++)
> > // ...
> >
> > because even though we see a ; followed by a :,
I posted this patch at the end of GCC 8 as a RFC. Now that we are in GCC 9, I
would like to repose it. Sorry to spam some of you. It is unclear whom the
reviewers for things like target hooks and basic mode handling are.
Here is the original patch.
https://gcc.gnu.org/ml/gcc-patches/2018-04/msg
On 03/29/2018 08:00 AM, Florian Weimer wrote:
> This patch performs lazy initialization of the relevant CPUID feature
> register value. It will needlessly invoke the CPUID determination code
> on architectures which lack CPUID support or support for the feature
> register, but I think it's not wor
On 05/07/2018 06:29 AM, Christophe Lyon wrote:
> Hello,
>
>
> I am preparing the submission of a patch series to support the FDPIC ABI
> for Linux on ARM.
>
> During development, we internally used arm-linux-uclibceabi as target
> name, but I had to change it to handle feedback when I submitted
On 05/16/2018 04:30 AM, Alexander Monakov wrote:
>
>
> On Mon, 23 Apr 2018, Alexander Monakov wrote:
>
>> As discussed in the cover letter, the code removed in this patch is
>> unnecessary,
>> references to global reg vars from inline asms do not work reliably, and so
>> we
>> should simply re
Hi,
PR85712 shows where an existing test case fails in the SLSR pass because
the code is flawed that cleans up alternative interpretations (CAND_ADD
versus CAND_MULT, for example) after a replacement. This patch fixes the
flaw by ensuring that we always visit all interpretations, not just
subseq
> How do you mean that? Why would be that dependent?
I don't really understand the question... The coverage result contains the
working directory where the program was run so by definition it depends on the
working directory. Put it differently, run the same program in 2 different
directories
On 05/21/2018 03:46 PM, Segher Boessenkool wrote:
> This patch creates "be" and "le" selectors, which can be used by all
> architectures, similar to ilp32 and lp64.
>
> Is this okay for trunk?
>
>
> Segher
>
>
> 2017-05-21 Segher Boessenkool
>
> gcc/testsuite/
> * lib/target-supports
On 05/22/2018 12:55 PM, Luis Machado wrote:
>
>
> On 05/16/2018 08:18 AM, Luis Machado wrote:
>>
>>
>> On 05/16/2018 06:08 AM, Kyrill Tkachov wrote:
>>>
>>> On 15/05/18 12:12, Luis Machado wrote:
Hi,
On 05/15/2018 06:37 AM, Kyrill Tkachov wrote:
> Hi Luis,
>
> On 14/05/
2018-05-22 20:56 GMT+02:00 H.J. Lu :
> On Mon, May 21, 2018 at 10:47 PM, Janus Weil wrote:
>> 2018-05-21 18:57 GMT+02:00 Steve Kargl :
>>> On Mon, May 21, 2018 at 12:14:13PM +0200, Janus Weil wrote:
So, here is the promised follow-up patch. It mostly removes
GFC_STD_F2008_TS and rep
On Thu, May 17, 2018 at 1:56 AM, Richard Sandiford
wrote:
> Richard Biener writes:
>>> @@ -2698,23 +2703,26 @@ convert_mult_to_fma_1 (tree mul_result,
>>> }
>>
>>> if (negate_p)
>>> - mulop1 = force_gimple_operand_gsi (&gsi,
>>> - bu
On Wed, Apr 25, 2018 at 03:17:28PM -0500, Indu Bhagat wrote:
> In function minmax_replacement in tree-ssa-phiopt.c, MIN_EXPR/MAX_EXPR
> are substituted for when the following condition is false - (HONOR_NANS
> (type) || HONOR_SIGNED_ZEROS (type)). So for FP mode, this is false when
> _both_ of t
On Mon, May 21, 2018 at 10:47 PM, Janus Weil wrote:
> 2018-05-21 18:57 GMT+02:00 Steve Kargl :
>> On Mon, May 21, 2018 at 12:14:13PM +0200, Janus Weil wrote:
>>>
>>> So, here is the promised follow-up patch. It mostly removes
>>> GFC_STD_F2008_TS and replaces it by GFC_STD_F2018 in a mechanical
>>
On 05/16/2018 08:18 AM, Luis Machado wrote:
On 05/16/2018 06:08 AM, Kyrill Tkachov wrote:
On 15/05/18 12:12, Luis Machado wrote:
Hi,
On 05/15/2018 06:37 AM, Kyrill Tkachov wrote:
Hi Luis,
On 14/05/18 22:18, Luis Machado wrote:
Hi,
Here's an updated version of the patch (now reverted)
Hello!
Attached patch implements scalar unsigned int->float conversions with AVX512F.
2018-05-22 Uros Bizjak
* config/i386/i386.md (*floatuns2_avx512):
New insn pattern.
(floatunssi2): Also enable for AVX512F and TARGET_SSE_MATH.
Rewrite expander pattern. Emit gen_floatunssi2
On May 22, 2018 6:53:57 PM GMT+02:00, Joseph Myers
wrote:
>On Tue, 22 May 2018, Richard Biener wrote:
>
>> + if (*sptr & (1 << (CHAR_BIT * sizeof (T) - 1)))
>> +gcc_unreachable ();
>> + m_flag = 1 << ((CHAR_BIT * sizeof (T)) - clz_hwi (*sptr));
>
>I don't see how the use of clz_hwi
On Tue, May 22, 2018 at 10:11 AM, H.J. Lu wrote:
> On Tue, May 22, 2018 at 9:21 AM, Jan Hubicka wrote:
>>> > > class ipa_opt_pass_d;
>>> > > typedef ipa_opt_pass_d *ipa_opt_pass;
>>> > > @@ -2894,7 +2896,8 @@
>>> > > cgraph_node::only_called_directly_or_aliased_p (void)
>>> >>>
Evidently I forgot the patch.
[gcc]
2018-05-21 Michael Meissner
PR target/85657
* config/rs6000/rs6000-builtin.def (BU_IBM128_2): New helper macro
for __builtin_{,un}pack_ibm128.
(PACK_IF): Declare __builtin_{,un}pack_ibm128.
(UNPACK_IF): Likewise.
On 05/21/2018 05:02 PM, Jeff Law wrote:
On 05/10/2018 01:26 PM, Martin Sebor wrote:
GCC 8.1 warns for unbounded (and some bounded) string comparisons
involving arrays declared attribute nonstring (i.e., char arrays
that need not be nul-terminated). For instance:
extern __attribute__((nonstri
Ping for the following patch sent in 3 months ago in the end of GCC8:
https://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg184075.html
I have rebased the patch on the latest GCC9 thunk.
bootstraped and tested on both X86 and Aarch64. no regression.
the following are more details:
Wilco Dijkstra writes:
> A recent commit removing '*' from the md files caused a large regression
> in h264ref.
> It turns out aarch64_ira_change_pseudo_allocno_class is no longer
> effective after the
> SVE changes, and the combination results in the regression. This patch
> fixes it by
> using
On Tue, May 22, 2018 at 9:21 AM, Jan Hubicka wrote:
>> > > class ipa_opt_pass_d;
>> > > typedef ipa_opt_pass_d *ipa_opt_pass;
>> > > @@ -2894,7 +2896,8 @@ cgraph_node::only_called_directly_or_aliased_p
>> > > (void)
>> > > && !DECL_STATIC_CONSTRUCTOR (decl)
>>
Switch from using generic address costs to using Falkor-specific ones, which
give Falkor better results overall.
OK for trunk?
Given this is a Falkor-specific adjustment, would this be an acceptable
backport for GCC 8 as well?
gcc/ChangeLog:
2018-05-22 Luis Machado
* config/aarch64/
On Tue, 22 May 2018, Richard Biener wrote:
> + if (*sptr & (1 << (CHAR_BIT * sizeof (T) - 1)))
> + gcc_unreachable ();
> + m_flag = 1 << ((CHAR_BIT * sizeof (T)) - clz_hwi (*sptr));
I don't see how the use of clz_hwi works with a type T that may be
narrower than HOST_WIDE_INT. Sur
Hi,
This patch partially improves loop distribution for PR85720. It now supports
runtime
loop versioning if the loop can be distributed into builtin functions. Note
for this
moment only coarse-grain runtime alias is checked, while different overlapping
cases
for different dependence relations
> > > class ipa_opt_pass_d;
> > > typedef ipa_opt_pass_d *ipa_opt_pass;
> > > @@ -2894,7 +2896,8 @@ cgraph_node::only_called_directly_or_aliased_p
> > > (void)
> > > && !DECL_STATIC_CONSTRUCTOR (decl)
> > > && !DECL_STATIC_DESTRUCTOR (decl)
> > >
On Tue 22 May, 2018, 9:26 PM James Greenhalgh,
wrote:
> On Mon, Apr 30, 2018 at 06:35:11PM -0500, Sameera Deshpande wrote:
> > On 13 April 2018 at 20:21, James Greenhalgh
> wrote:
> > > On Fri, Apr 13, 2018 at 03:39:32PM +0100, Sameera Deshpande wrote:
> > >> On Fri 13 Apr, 2018, 8:04 PM James G
A recent commit removing '*' from the md files caused a large regression in
h264ref.
It turns out aarch64_ira_change_pseudo_allocno_class is no longer effective
after the
SVE changes, and the combination results in the regression. This patch fixes
it by
using the new POINTER_AND_FP_REGS registe
On Tue, May 22, 2018 at 10:37:30AM -0500, Wilco Dijkstra wrote:
> James Greenhalgh wrote:
>
> > +/* Determine whether a frame chain needs to be generated. */
> > +static bool
> > +aarch64_needs_frame_chain (void)
> > +{
> > + /* Force a frame chain for EH returns so the return address is at FP+8
On Mon, Apr 30, 2018 at 06:35:11PM -0500, Sameera Deshpande wrote:
> On 13 April 2018 at 20:21, James Greenhalgh wrote:
> > On Fri, Apr 13, 2018 at 03:39:32PM +0100, Sameera Deshpande wrote:
> >> On Fri 13 Apr, 2018, 8:04 PM James Greenhalgh,
> >> mailto:james.greenha...@arm.com>> wrote:
> >> On
James Greenhalgh wrote:
> +/* Determine whether a frame chain needs to be generated. */
> +static bool
> +aarch64_needs_frame_chain (void)
> +{
> + /* Force a frame chain for EH returns so the return address is at FP+8. */
> + if (frame_pointer_needed || crtl->calls_eh_return)
> + return tr
On Tue, May 22, 2018 at 10:06:15AM -0500, Kyrill Tkachov wrote:
> [sending on behalf of Jackson Woodruff]
>
> Hi all,
>
> This patch removes a lot of duplicated code in aarch64-ldpstp.md.
>
> The patterns that did not previously generate a base register now
> do not check for aarch64_mem_pair_op
On Tue, May 22, 2018 at 08:13:22AM -0500, Kyrill Tkachov wrote:
> [sending on behalf of Jackson Woodruff]
>
> Hi all,
>
> This patch merges loads and stores from D-registers that are of different
> modes.
>
> Code like this:
>
> typedef int __attribute__((vector_size(8))) vec;
> stru
On Tue, May 15, 2018 at 08:11:21AM -0500, Wilco Dijkstra wrote:
>
> ping
>
>
> From: Wilco Dijkstra
> Sent: 25 October 2017 16:29
> To: GCC Patches
> Cc: nd
> Subject: [PATCH][AArch64] Simplify frame pointer logic
>
>
> Simplify frame pointer logic based on review comments here
> (https://gc
[sending on behalf of Jackson Woodruff]
Hi all,
This patch removes a lot of duplicated code in aarch64-ldpstp.md.
The patterns that did not previously generate a base register now
do not check for aarch64_mem_pair_operand in the pattern. This has
been extracted to a check in aarch64_operands_ok
On Tue, 22 May 2018, David Malcolm wrote:
> On Tue, 2018-05-22 at 10:43 +0200, Richard Biener wrote:
> > On Mon, 21 May 2018, Jeff Law wrote:
> >
> > > On 05/18/2018 07:15 AM, David Malcolm wrote:
> > > > On Fri, 2018-05-18 at 13:11 +0200, Richard Biener wrote:
> > > > > The following adds a simp
In a sequence like
(d)(c) (b) (a)
c++ raises <-- Ada calls c++, <-- c++ call Ada <-- Ada calls
exception others handler and handles c++
gets foreignc++ exception
exception and
re-raises
t
This patch fixes an issue whereby the compiler failed to properly warn against
unreferenced formal parameters when analyzing expression functions.
Tested on x86_64-pc-linux-gnu, committed on trunk
2018-05-22 Justin Squirek
gcc/ada/
* sem_ch6.adb (Analyze_Expression_Function): Propaga
This patch modifies the late expansion of record aggregates to ensure that the
generated code which handles a controlled component initialized by a function
call is inserted in line with the rest of the initialization code, rather than
before the record aggregate. This way the function call has pro
Although the sysconf SC_NPROCESSORS_ONLN is also defined by the API, the
only documented way to retrieve the number of CPUs is by using the syspage.
This also better organise the QNX-specific macros in adaint.c
Tested on x86_64-pc-linux-gnu, committed on trunk
2018-05-22 Jerome Lambourg
gcc/
This patch optimizes the initialization and allocation of scalar array objects
when pragma Initialize_Scalars is in effect. The patch also extends the syntax
and semantics of pragma Initialize_Scalars to allow for the specification of
invalid values pertaining to families of scalar types. The new s
The trampoline now properly restores the link register as well as the stack
pointer. As a minor optimisation, now only callee-saved registers are
restored: the scratch registers don't need that.
Tested on x86_64-pc-linux-gnu, committed on trunk
2018-05-22 Jerome Lambourg
gcc/ada/
* s
In order to avoid exposing internal names of tagged types in the
binary code generated by the compiler this enhancement facilitates
initializes the External_Tag of a tagged type with an empty string
when pragma No_Tagged_Streams is applicable to the tagged type, and
facilitates initializes its Expa
This patch improves on the error message for an attempt to apply 'Access
to a formal subprogram. It also applies the check to a renaming of a formal
subprogram.
Compiling p.adb must yield:
p.adb:15:18: not subtype conformant with declaration at line 2
p.adb:15:18: formal subprograms are not subty
This patch cleans up the implementation of routine Get_Simple_Init_Val. It also
eliminates potentially large and unnecessary tree replications in the context
of object default initialization.
No change in behavior, no test needed.
Tested on x86_64-pc-linux-gnu, committed on trunk
2018-05-22 Hri
This patch fixes a compiler abort on a discriminant constraint when the
constraint is a subtype indication.
Tested on x86_64-pc-linux-gnu, committed on trunk
2018-05-22 Patrick Bernardi
gcc/ada/
* sem_ch3.adb (Build_Discriminant_Constraints): Raise an error if the
user tries
This patch dismantles the prototype implementation of the first proposal
for Reduction expressions, one of the important potentially parallel
constructs for Ada2020. The ARG is going in a different direction with
a simpler syntax.
Tested on x86_64-pc-linux-gnu, committed on trunk
2018-05-22 Ed S
This patch fixes a compiler abort on an object declaration whose type
is a private type with discriminants, and whose full view is a derived
type that renames some discriminant of its parent.
Tested on x86_64-pc-linux-gnu, committed on trunk
2018-05-22 Ed Schonberg
gcc/ada/
* sem_ch3
This patch modifies the analysis and expansion of attribute 'Valid_Scalars. It
is now possible to specify the attribute on a prefix of an untagged private
type.
-- Source --
-- gnat.adc
pragma Initialize_Scalars;
-- pack1.ads
package Pack1 is
type Acc_1 is priva
This patch fixes a spurious visibility error with a nested instance of a
generic unit with a formal package, when the actual for it is a formal
package PA of an enclosing generic, and there are subsequent uses of the
formals of PA in that generic unit.
Tested on x86_64-pc-linux-gnu, committed on t
This patch modifies the analysis of pragma [Refined_]Depends to emit an error
when the pragma is asspciated with a [generic] function, and one of its clauses
contains a non-null, non-'Result output item.
-- Source --
-- pack.ads
package Pack with SPARK_Mode is
Obj_1
This patch fixes a spurious visiblity error on an instantiation of a generic
package that contains a type declaration with an aspect specification for
an aspect that must be delayed (i.e. an aspect whose value may be specified
at a later point).
The package g.ads must compile quietly:
with S
This path fixes a spurious size error on a fixed point that carries an
aspect specification for the 'Small of the type, when there is a subsequent
derivation of that type before the type is frozen, the given 'Small is not
not a power of two, and the bounds of the type require its full size, also
gi
This patch fixes a compiler abort on a pragma Compile_Time_Warning when its
second argument is a reference to a constsant string (rather than a string
literal or an expression that evaluates to a string literal).
Compiling main.adb must yield:
main.adb:5:33: warning: Good
main.adb:6:33: war
This patch fixes an issue whereby placement of the pragma/aspect Pure_Function
was not verified to have been in the same declarative part as the function
declaration incorrectly allowing it to appear after a function body or in a
different region like a private section.
Tested on x86_64-pc-linux-g
This patch adds generic support for the Ada.Locales package that
relies on the setlocale() C service.
Tested on x86_64-pc-linux-gnu, committed on trunk
2018-05-22 Javier Miranda
gcc/ada/
* locales.c: New implementation for the Ada.Locales package.
* libgnat/a-locale.ads: Remo
We now only have the executable code section boundaries at hand,
so can only infer offsets for symbols within those boundaries.
Symbols outside of this region are non-text symbols, pointless for
traceback symbolization anyway.
Tested on x86_64-pc-linux-gnu, committed on trunk
2018-05-22 Olivier
This patch modifies the analysis of subprogram declarations to ensure that an
aspect which is converted into a categorization pragma is properly taken into
account when verifying the dependencies of a subprogram unit.
-- Source --
-- pack.ads
package Pack is end Pack;
On Tue, 2018-05-22 at 10:43 +0200, Richard Biener wrote:
> On Mon, 21 May 2018, Jeff Law wrote:
>
> > On 05/18/2018 07:15 AM, David Malcolm wrote:
> > > On Fri, 2018-05-18 at 13:11 +0200, Richard Biener wrote:
> > > > The following adds a simple alloc/free_flag machinery
> > > > allocating
> > > >
[sending on behalf of Jackson Woodruff]
Hi all,
This patch merges loads and stores from D-registers that are of different modes.
Code like this:
typedef int __attribute__((vector_size(8))) vec;
struct pair
{
vec v;
double d;
}
Now generates a store pair instruction
On Tue, May 22, 2018 at 05:37:03AM -0700, H.J. Lu wrote:
> has been removed from glibc 2.28 by:
>
> commit cf2478d53ad7071e84c724a986b56fe17f4f4ca7
> Author: Adhemerval Zanella
> Date: Sun Mar 18 11:28:59 2018 +0800
>
> Deprecate ustat syscall interface
>
> This patch removes its referen
has been removed from glibc 2.28 by:
commit cf2478d53ad7071e84c724a986b56fe17f4f4ca7
Author: Adhemerval Zanella
Date: Sun Mar 18 11:28:59 2018 +0800
Deprecate ustat syscall interface
This patch removes its reference from libsanitizer for Linux.
The LLVM patch is posted at
https://revie
Richard Biener writes:
> On Mon, May 21, 2018 at 3:14 PM Bin Cheng wrote:
>
>> Hi,
>> As reported in PR85804, bump step is wrongly computed for vector(1) load
> of
>> single-element group access. This patch fixes the issue by correcting
> bump
>> step computation for the specific VMAT_CONTIGUOUS
Hi,
On 22/05/2018 11:24, Richard Biener wrote:
On Mon, May 21, 2018 at 7:01 PM François Dumont
wrote:
I just committed this patch as trivial.
I must have run tests without rebuilding pre-compiled headers. I'll have
to find out how to build tests without pre-compiled headers to avoid it
in the
Hi,
so this is the patch only adding INDIRECT_TYPE_P to the C++ front-end
and using it instead of the misleading POINTER_TYPE_P. It also replaces
a couple of existing TYPE_PTR_P || TYPE_REF_P. Poisoning at the same
time POINTER_TYPE_P in the front-end - via #pragma GCC poison - seems
tricky,
I originally forgot to restrict memset args to constants - instead of
adding that check the following properly fixes non-constant handling.
I'm not quite sure that ao_ref with offset % 8 == 0 but size != maxsize
has any guarantee that all accesses that this covers are aligned to 8
bits but I fail
Hi Shaokun,
On 22/05/18 09:40, Shaokun Zhang wrote:
This patch adds HiSilicon's an mcpu: tsv110.
---
gcc/ChangeLog| 9 +++
gcc/config/aarch64/aarch64-cores.def | 5 ++
gcc/config/aarch64/aarch64-cost-tables.h | 103 +++
gcc/config
On Tue, May 22, 2018 at 9:40 AM, Shaokun Zhang
wrote:
> tsv110 is designed by HiSilicon and supports v8_4A, it also optimizes
> L1 Icache which can access L1 Dcache.
> Therefore, DC CVAU is not necessary in __aarch64_sync_cache_range for
> tsv110, is there any good idea to skip DC CVAU operation f
The following fixes mishandling of widening invariant comparisons
in vect_is_simple_cond which isn't supported for SLP code generation.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk,
queued for backports.
Richard.
2018-05-22 Richard Biener
PR tree-optimizatio
On Mon, May 21, 2018 at 7:01 PM François Dumont
wrote:
> I just committed this patch as trivial.
> I must have run tests without rebuilding pre-compiled headers. I'll have
> to find out how to build tests without pre-compiled headers to avoid it
> in the future.
I configure with --disable-libst
On Mon, May 21, 2018 at 3:14 PM Bin Cheng wrote:
> Hi,
> As reported in PR85804, bump step is wrongly computed for vector(1) load
of
> single-element group access. This patch fixes the issue by correcting
bump
> step computation for the specific VMAT_CONTIGUOUS case.
> Bootstrap and test on x86
On Mon, May 21, 2018 at 9:27 AM Martin Liška wrote:
> PING^1
OK.
> On 05/11/2018 03:12 PM, Martin Liška wrote:
> > On 05/11/2018 11:35 AM, Richard Biener wrote:
> >> On Thu, May 10, 2018 at 9:58 AM, Martin Liška wrote:
> >>> Hi.
> >>>
> >>> It's removal of an assert at place where we calculate
On Sun, May 20, 2018 at 9:45 PM Yuri Gribov wrote:
> On Sun, May 20, 2018 at 1:01 PM, Alexander Monakov
wrote:
> > On Sun, 20 May 2018, Yuri Gribov wrote:
> >
> >> Hi all,
> >>
> >> This fixes PR 85822 by removing incorrect reversal of condition in VRP
> >> assertion. Bootstrapped and regtested
On Fri, May 18, 2018 at 11:52 PM Eric Botcazou
wrote:
> > + /* If the next declaration is a PARM_DECL pointing to
theDECL,
> > +we need to adjust its VALUE_EXPR directly, since
chains of
> > +VALUE_EXPRs run afoul of garbage collection. This
occurs
> >
On Tue, May 22, 2018 at 8:58 AM Richard Sandiford <
richard.sandif...@linaro.org> wrote:
> This PR showed that the normal function for expanding directly-mapped
> internal functions didn't handle the case in which the call was only
> being kept for its side-effects.
> Tested on aarch64-linux-gnu
On 05/21/2018 10:17 PM, Eric Botcazou wrote:
>> Simple format extension which prints working directory of TU when it was
>> compiled. It's requested by LCOV folks.
>
> Can we make that optional, please? Having the coverage results depends on
> the
> current working directory is quite annoying,
On Mon, 21 May 2018, Jeff Law wrote:
> On 05/18/2018 07:15 AM, David Malcolm wrote:
> > On Fri, 2018-05-18 at 13:11 +0200, Richard Biener wrote:
> >> The following adds a simple alloc/free_flag machinery allocating
> >> bits from an int typed pool and applies that to bb->flags and edge-
> >>> flag
This patch adds HiSilicon's an mcpu: tsv110.
---
gcc/ChangeLog| 9 +++
gcc/config/aarch64/aarch64-cores.def | 5 ++
gcc/config/aarch64/aarch64-cost-tables.h | 103 +++
gcc/config/aarch64/aarch64-tune.md | 2 +-
gcc/config/aar
tsv110 is designed by HiSilicon and supports v8_4A, it also optimizes
L1 Icache which can access L1 Dcache.
Therefore, DC CVAU is not necessary in __aarch64_sync_cache_range for
tsv110, is there any good idea to skip DC CVAU operation for tsv110.
Any thoughts and ideas are welcome.
Shaokun Zhang
Gimple match results are represented by a code_helper for the operation,
a tree for the type, and an array of three trees for the operands.
This patch wraps them up in a class so that they don't need to be
passed around individually.
The main reason for doing this is to make it easier to increase
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