Re: Fix Debug DR2354

2017-12-23 Thread Jonathan Wakely
On 19 December 2017 at 21:33, François Dumont wrote: > Hi > > I plan to apply attached patch tomorrow to fix those _GLIBCXX_DEBUG > failures: > > FAIL: 23_containers/map/modifiers/insert/dr2354.cc (test for excess errors) > FAIL: 23_containers/multimap/modifiers/insert/dr2354.cc (test for excess

Re: [PATCH v2] PR rtl-optimization/83565: Fix 32-bit rotate on ia64

2017-12-23 Thread Jim Wilson
On 12/23/2017 04:36 PM, James Clarke wrote: PR rtl-optimization/83565 * gcc/config/ia64/ia64.md ("*rotrsi3_internal"): Mask out higher 32 bits from the shift result. ("*rotlsi3_internal"): Likewise This doesn't look right to me. On ia64, the upper 32-bits of a 3

[PATCH v2] PR rtl-optimization/83565: Fix 32-bit rotate on ia64

2017-12-23 Thread James Clarke
On ia64, 32-bit rotates are implemented by copying the lower 32 bits of a register into the upper half, then performing a right shift. However, depending on the bit pattern in question, this can leave the upper 32 bits as non-zero, despite being only a 32-bit unsigned result. Therefore add an extra

[PATCH] PR rtl-optimization/83565: Fix 32-bit rotate on ia64

2017-12-23 Thread James Clarke
From: James Clarke On ia64, 32-bit rotates are implemented by copying the lower 32 bits of a register into the upper half, then performing a right shift. However, depending on the bit pattern in question, this can leave the upper 32 bits as non-zero, despite being only a 32-bit unsigned result. T

Re: [PATCH] Fix Bug 83237 - Values returned by std::poisson_distribution are not distributed correctly

2017-12-23 Thread Michele Pezzutti
I got confirmation from Luc. He also added it to the errata file---the entries regarding p. 511, page 6 of http://luc.devroye.org/errors.pdf On 12/14/2017 11:11 AM, mp...@tiscali.it wrote: If Luc's explicit green light will not arrive before it is decision time, Paolo's point 2- below is doabl

Re: [PATCH] Change PRED_LOOP_EXIT from 85 to 92

2017-12-23 Thread Segher Boessenkool
On Fri, Dec 22, 2017 at 04:53:47PM -0600, David Esparza wrote: > With a value of 85 GCC has a CPU performance degradation of 11%, > reverting PRED_LOOP_EXIT to 92 this degradation disappear. > Those values where measured by running c-ray ray-tracer that is a > floating point benchmark that runs out

Re: [045/nnn] poly_int: REG_ARGS_SIZE

2017-12-23 Thread Richard Sandiford
Andreas Schwab writes: > This breaks gcc.dg/tls/opt-3.c, gcc.dg/tls/pr47715-3.c and > gcc.dg/tls/struct-1.c on m68k: > > /daten/aranym/gcc/gcc-20171222/gcc/testsuite/gcc.dg/tls/opt-3.c:11:3: > internal compiler error: in add_args_size_note, at rtlanal.c:2379 > 0xae7aa9 add_args_size_note(rtx_insn*

Re: [PATCH] Fix COND_EXPR folding with CASE_LABEL_EXPRs (PR c++/83553)

2017-12-23 Thread Richard Biener
On December 23, 2017 9:33:03 AM GMT+01:00, Jakub Jelinek wrote: >Hi! > >The problem here is that for loops that have constant 0/false condition >the C++ FE wants to correctly emit if (0) { body; incr-expr; } >but doesn't just build3 (COND_EXPR, ...), but fold_build3, and >COND_EXPR >folding with

[PATCH] Fix COND_EXPR folding with CASE_LABEL_EXPRs (PR c++/83553)

2017-12-23 Thread Jakub Jelinek
Hi! The problem here is that for loops that have constant 0/false condition the C++ FE wants to correctly emit if (0) { body; incr-expr; } but doesn't just build3 (COND_EXPR, ...), but fold_build3, and COND_EXPR folding with constant condition optimizes away the unused branch completely if it does

[C++ PATCH] Fix replace_placeholders (PR c++/83556)

2017-12-23 Thread Jakub Jelinek
Hi! Recently I've changed replace_placeholders to walk trees without duplicates to avoid compile time explosion with lots of nested SAVE_EXPRs. The problem as the following testcase shows is that it also prevents replacement of PLACEHOLDER_EXPRs we want to replace, if the same PLACEHOLDER_EXPR app