On 11/17/2017 12:36 PM, Martin Sebor wrote:
> The attached patch enhances -Wstringop-overflow to detect more
> instances of buffer overflow at compile time by handling non-
> constant offsets into the destination object that are known to
> be in some range. The solution could be improved by handli
Implement std::to_address for C++2a
* include/bits/ptr_traits.h (to_address): Implement to_address.
* testsuite/20_util/to_address/1.cc: New tests.
Tested x86_64-pc-linux-gnu.
commit fffc95183120866461b363b19fe04f269d5f9299
Author: Glen Fernandes
Date: Fri Nov 17 15:43:19 2017
On 11/15/2017 08:06 AM, Pedro Alves wrote:
On 11/15/2017 07:34 AM, Aldy Hernandez wrote:
On 11/14/2017 02:38 PM, David Malcolm wrote:
On Tue, 2017-11-14 at 14:08 -0500, Aldy Hernandez wrote:
https://gcc.gnu.org/codingconventions.html#Class_Form
says that:
"When defining a class, fir
On 11/17/2017 10:30 PM, Peter Bergner wrote:
> On POWER8 in little endian mode, the lxvd2x and stxvd2x instructions we use
> for loading and storing vectors do not perform a byte swap as part of their
> operation. This means we have to explicitly byte swap a vector before we
> store to memory and
On 11/17/2017 12:12 PM, Wilco Dijkstra wrote:
> GCC currently defaults to -fcommon. This is an optional C feature dating
> back to early C implementations. On many targets this means global variable
> accesses having an unnecessary codesize and performance penalty in C code
> (the same source gen
On POWER8 in little endian mode, the lxvd2x and stxvd2x instructions we use
for loading and storing vectors do not perform a byte swap as part of their
operation. This means we have to explicitly byte swap a vector before we
store to memory and byte swap it after we load it from memory. These swa
On 11/17/2017 12:01 PM, Wilco Dijkstra wrote:
> Remove SLOW_BYTE_ACCESS given it's confusing, badly named,
> badly documented and used incorrectly. Although most targets
> define it as 1, there are several targets which confuse it
> (based on comments next to it) and set it to 0 since the name
>
On 11/15/2017 12:34 AM, Aldy Hernandez wrote:
>
>
> On 11/14/2017 02:38 PM, David Malcolm wrote:
>> On Tue, 2017-11-14 at 14:08 -0500, Aldy Hernandez wrote:
>
>> https://gcc.gnu.org/codingconventions.html#Class_Form
>> says that:
>>
>> "When defining a class, first [...]
>> declare all public
On 10/23/2017 11:07 AM, Richard Sandiford wrote:
> This patch changes the offset and size arguments of
> rtx_addr_can_trap_p_1 from HOST_WIDE_INT to poly_int64. It also
> uses a size of -1 rather than 0 to represent an unknown size and
> BLKmode rather than VOIDmode to represent an unknown mode.
>
On 10/23/2017 11:06 AM, Richard Sandiford wrote:
> This patch makes RTL DSE use poly_int for offsets and sizes.
> The local phase can optimise them normally but the global phase
> treats them as wild accesses.
>
>
> 2017-10-23 Richard Sandiford
> Alan Hayward
> David Sher
On 10/23/2017 11:06 AM, Richard Sandiford wrote:
> This patch changes the offset, size and max_size fields
> of ao_ref from HOST_WIDE_INT to poly_int64 and propagates
> the change through the code that references it. This includes
> changing the off field of vn_reference_op_struct in the same way.
On Fri, Nov 17, 2017 at 8:50 AM, Jason Merrill wrote:
> On Thu, Nov 16, 2017 at 11:21 AM, Nathan Froyd wrote:
>> diff --git a/gcc/cp/init.c b/gcc/cp/init.c
>> index c76460d..53d6133 100644
>> --- a/gcc/cp/init.c
>> +++ b/gcc/cp/init.c
>> @@ -4038,6 +4038,15 @@ build_vec_init (tree base, tree maxi
Hi, all,
There will new registers in nds32 target for floating point
and special purpose. This patch is prepared for such changes.
We modify the FIRST_PSEUDO_REGISTER number and corresponding
register content.
Committed as Rev.254854: http://gcc.gnu.org/r254854
gcc/
* config/nds32/nds3
Hi, all,
This is the preparation for future nds32 vector implementation.
Committed as Rev.254853: http://gcc.gnu.org/r254853
gcc/
* config/nds32/nds32-modes.def: Add vector mode V4QI V2HI V8QI V4HI
V2SI.
* config/nds32/iterators.md: Add vector mode iterators and attribut
This is incomplete, and untested, but covers some of the cases
where an attribute's value's TREE_CODE is tested (e.g. via STRING_CST).
Alternatively, maybe we need a helper function for extracting
the value (and location_t) of an attribute, issuing an error if it's
not a STRING_CST?
gcc/ChangeLog
Fixes "self." e.g. in obj-c++.dg/property/dotsyntax-5.mm.
gcc/objc/ChangeLog:
* objc-act.c (objc_maybe_build_component_ref): Handle location
wrappers.
---
gcc/objc/objc-act.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/objc/objc-act.c b/gcc/objc/objc-act.c
index 7651
Fixes e.g. g++.dg/abi/regparm1.C
gcc/ChangeLog:
* config/i386/i386.c (ix86_handle_cconv_attribute): Handle
location wrappers.
---
gcc/config/i386/i386.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index b2c2934..7014e84 10064
gcc/cp/ChangeLog:
* call.c (build_conditional_expr_1): Handle location wrappers.
(build_new_op_1): Likewise.
* class.c (mark_or_check_attr_tags): Likewise.
* constexpr.c (cxx_eval_constant_expression): Likewise.
* cvt.c (ocp_convert): Likewise.
* decl
Fixes e.g. c-c++-common/Wsizeof-pointer-memaccess1.c
gcc/ChangeLog:
* fold-const.c (operand_equal_p): Handle location wrappers.
* tree.c (inchash::add_expr): Likewise.
---
gcc/fold-const.c | 3 +++
gcc/tree.c | 1 +
2 files changed, 4 insertions(+)
diff --git a/gcc/fold-con
gcc/c-family/ChangeLog:
* c-attribs.c (handle_tm_wrap_attribute): Handle location
wrappers.
* c-common.c (c_common_truthvalue_conversion): Likewise.
(check_user_alignment): Likewise.
(get_nonnull_operand): Likewise.
(fold_offsetof_1): Likewise.
This is needed to recognize calls to known functions, otherwise
such calls get erroneously handled by cp_build_function_call_vec.
gcc/cp/ChangeLog:
* semantics.c (finish_call_expr): Strip any location wrapper from
fn.
---
gcc/cp/semantics.c | 2 ++
1 file changed, 2 insertions(+)
This is needed by perform_koenig_lookup.
gcc/cp/ChangeLog:
* cp-tree.h (cp_expr::strip_any_location_wrapper): New method.
---
gcc/cp/cp-tree.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
index 63e9bff..f9c589d 100644
--- a/gcc/cp/cp-tree.h
We occasionally need to handle the NULL case when stripping trees,
so this patch introduces a variant of STRIP_ANY_LOCATION_WRAPPER to
do so.
gcc/ChangeLog:
* tree.h (STRIP_ANY_LOCATION_WRAPPER_SAFE): New macro.
---
gcc/tree.h | 8
1 file changed, 8 insertions(+)
diff --git a/gc
For simplicity, add a gate on !processing_template_decl
to cp_tree::maybe_add_location_wrapper.
gcc/cp/ChangeLog:
* cp-tree.h (cp_expr::maybe_add_location_wrapper): Do nothing if
processing_template_decl.
---
gcc/cp/cp-tree.h | 16 +++-
1 file changed, 11 insertions(+)
This redoes the approach in the v1 patch, doing it for all constants
and decls, rather than just at callsite args.
gcc/cp/ChangeLog:
* parser.c (cp_parser_primary_expression): Add location wrappers
to constants.
(cp_parser_postfix_expression): Remove the "wrap_locations_p"
Here's a follow-up patch kit to v2 which extends the C++ FE to capture
source location information for *all* constants and uses-of-decls,
not just at callsites like v2 does.
I kept the simplifying restriction of not adding wrapper nodes when
processing_template_decl.
Unfortunately it's not comple
Hi, all,
This patch is to prepare more constraints in nds32 implementation.
They will be used in the future patch.
Committed as Rev.254800: http://gcc.gnu.org/r254800
gcc/
* config/nds32/constraints.md: Provide more constraints.
* config/nds32/nds32.h (enum reg_class, REG_CLASS_
Hi, all,
The constant UNSPEC_VOLATILE_FUNC_RETURN is now useless
in current nds32 implementation. Remove it.
Committed as Rev.254799: http://gcc.gnu.org/r254799
gcc/
* config/nds32/constants.md (UNSPEC_VOLATILE_FUNC_RETURN): Remove.
Best regards,
jasonwucj
>From 3bc69293a88b0614789b
Hi, all,
This is the patch to add more nds32-specific options.
With those options, the extension instructions are able to be generated.
Committed as Rev.254798: http://gcc.gnu.org/r254798
gcc/
* config/nds32/nds32.opt: Add mext-perf, mext-perf2, mext-string.
* config/nds32/nds32
On 11/17/2017 04:09 PM, Palmer Dabbelt wrote:
From: Kito Cheng
2017-11-17 Kito Cheng
* longlong.h [__riscv] (__umulsidi3): Define.
[__riscv] (umul_ppmm) Likewise.
[__riscv] (__muluw3) Likewise.
Apparently the point of this is that by defining __mulsi3/__muldi3 a
Applied.
Gerald
Index: index.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/index.html,v
retrieving revision 1.1069
diff -u -r1.1069 index.html
--- index.html 3 Nov 2017 12:35:51 - 1.1069
+++ index.html 18 Nov 2017 01:07:58 -
On Fri, Nov 17, 2017 at 08:06:09AM -0600, Segher Boessenkool wrote:
> Hi!
>
> On Fri, Nov 17, 2017 at 12:04:45AM -0500, Michael Meissner wrote:
> > This patch is an enhancement of a previous page that never got approved.
> > https://gcc.gnu.org/ml/gcc-patches/2017-10/threads.html#02124
> >
> > In
From: Kito Cheng
2017-11-17 Kito Cheng
* longlong.h [__riscv] (__umulsidi3): Define.
[__riscv] (umul_ppmm) Likewise.
[__riscv] (__muluw3) Likewise.
---
include/longlong.h | 50 ++
1 file changed, 50 insertions(+)
diff -
Hi,
this patch fixes remaining IPA profile updating issues I am aware of. With
this change there is 1 profile mismatch after inlining for tramp3d -Ofast
and 112 of them in .optimized dump which is about 10 times less than before.
I did not inspect them all but they seems mostly justified and not v
On 3 Nov 2017 16:55, "Wilco Dijkstra" wrote:
Almost all targets add an explict -fomit-frame-pointer in the target
specific
options. Rather than doing this in a target-specific way, do this in the
generic options so it works identically across all targets. In many cases
the
target no longer need
On Tue, Oct 31, 2017 at 02:47:29PM +0100, Dominik Inführ wrote:
> Hi,
>
> I have a custom optimization pass, that moves an expression into an
> POST_INC-expression. GCC then ICE’s in df-scan.c since it expects REG_P to be
> true for POST_INC’s operand. aarch64_simd_mem_operand_p doesn’t seem to ch
This patch adds runtime alias checks for loops with variable strides,
so that we can vectorise them even without a restrict qualifier.
There are several parts to doing this:
1) For accesses like:
x[i * n] += 1;
we need to check whether n (and thus the DR_STEP) is nonzero.
vect_analyze
Why do we need fno-omit-frame-pointer on aarch64 ?
Ramana
From: James Greenhalgh
Sent: Friday, 17 November, 22:02
Subject: Re: [COMMITTED][AArch64] Fix frame tests
To: Wilco Dijkstra
Cc: GCC Patches, nd, Richard Earnshaw, Marcus Shawcroft, Ramana Radhakrishnan
On Thu, Nov 16, 2017 at 11:34:46
This is mostly a mechanical extension of the previous gather load
support to scatter stores. The internal functions in this case are:
IFN_SCATTER_STORE (base, offsets, scale, values)
IFN_MASK_SCATTER_STORE (base, offsets, scale, values, mask)
However, one nonobvious change is to vect_analyze
On Tue, Nov 14, 2017 at 03:54:56PM +, Tamar Christina wrote:
> Hi All,
>
> Dot Product is intended to only be available for Armv8.2-a and newer.
> While this restriction is reflected in the intrinsics, the patterns
> themselves were missing the Armv8.2-a bit.
>
> This means that using -march=
Following on from the previous patch for strided accesses, this patch
allows gather loads to be used with grouped accesses, if we otherwise
would need to fall back to VMAT_ELEMENTWISE. However, as the comment
says, this is restricted to single-element groups for now:
??? Although the cod
This patch tries to use gather loads for strided accesses,
rather than falling back to VMAT_ELEMENTWISE.
Tested on aarch64-linux-gnu (with and without SVE), x86_64-linux-gnu
and powerpc64le-linux-gnu. OK to install?
Richard
2017-11-17 Richard Sandiford
Alan Hayward
On Thu, Nov 16, 2017 at 11:34:46AM +, Wilco Dijkstra wrote:
> Improve the AArch64 frame tests - add -f(no-)omit-frame-pointer,
> update checks and add missing tests. As a result all tests now
> pass.
>
> Committed as obvious.
Some of these are far from obvious... Even if they were obvious to
This patch adds support for SVE gather loads. It uses the basically
the same analysis code as the AVX gather support, but after that
there are two major differences:
- It uses new internal functions rather than target built-ins.
The interface is:
IFN_GATHER_LOAD (base, offsets, scale)
Originally the SVE port used the names for 256-bit vectors, as the
next available increment after Advanced SIMD. However, that was
always a bit of a hack and is bound to confuse people new to the code.
Nothing actually requires vector modes to have names of the form
V, and after talking it over w
On Fri, Sep 15, 2017 at 07:22:39PM +0100, Steve Ellcey wrote:
> PR 81356 points out that doing a __builtin_strcpy of an empty string on
> aarch64 does a copy from memory instead of just writing out a zero byte.
> In looking at this I found that it was because of
> aarch64_use_by_pieces_infrastructu
On Fri, Oct 06, 2017 at 10:01:21PM +0100, Steve Ellcey wrote:
> This patch is a follow up to a discussion at:
>
> https://gcc.gnu.org/ml/gcc/2017-06/msg00126.html
>
> For some reason the simd version of fnma in aarch64-simd.md
> is not in the canonical form of having the neg operator on
> the fi
On Fri, Nov 17, 2017 at 08:06:09AM -0600, Segher Boessenkool wrote:
> Hi!
>
> On Fri, Nov 17, 2017 at 12:04:45AM -0500, Michael Meissner wrote:
> > This patch is an enhancement of a previous page that never got approved.
> > https://gcc.gnu.org/ml/gcc-patches/2017-10/threads.html#02124
> >
> > In
While working on I/O for std::decimal types (which I'm not going to
complete for gcc 8) I realised that std::num_get still uses the old
COW std::string for reading floating point types, which always
allocates memory.
With this patch (which is missing the fixes for the linker script to
give the ne
Thomas,
Even though Paul OK the patch, I have a question below.
On Fri, Nov 17, 2017 at 06:38:20PM +0100, Thomas Koenig wrote:
> +{
> + if (expr->value.function.esym)
> + return expr->value.function.esym->result->attr.contiguous;
> + else
> + {
> + /* We have to jump
This is a straightforward change that we can do now that the ABI has
been bumped (again!).
Regtested on x86_64-pc-linux-gnu, Ok for trunk?
gcc/fortran/ChangeLog:
2017-11-17 Janne Blomqvist
PR fortran/44292
* ioparm.def (IOPARM): Make recl_in intio, and recl_out pintio.
libgf
On 17/11/17 15:05 -0500, Ed Smith-Rowland wrote:
This is an embarrassment actually, after the excellent analysis in the
PR trail.
We've (I've) been using the wrong sign convention for the nu parameter
in comp_ellint_3 and in ellint_3 in tr1 and now std for years. In my
defence the World seem
On Fri, 17 Nov 2017 11:01:21 PST (-0800), wilco.dijks...@arm.com wrote:
Remove SLOW_BYTE_ACCESS given it's confusing, badly named,
badly documented and used incorrectly. Although most targets
define it as 1, there are several targets which confuse it
(based on comments next to it) and set it to
If removing a target macro, it should be poisoned in system.h.
--
Joseph S. Myers
jos...@codesourcery.com
Hi Thomas,
This is OK.
Thanks
Paul
On 17 November 2017 at 17:38, Thomas Koenig wrote:
> Hello world,
>
> the attached patch fixes the PR by looking at the function interface if
> one exists.
>
> Regression-tested. OK for trunk?
>
> Regards
>
> Thomas
>
> 2017-11-17 Thomas Koenig
>
Hi,
this patch makes static profile to be in range 0...2^30 rather than
0...1. This is safe now as profile-counts are taking care of
possible overflow when the profile ends up cummulating too high after
inlining.
MThere are two testcases that needs adusting. dump-2.c simply checks
for specific
Hi,
with tail recursion and accumulation it is quite common case that the profile
is unrealistic and the recursive call is triggered more often then the
entry block. This patch prevents tailcall from dropping entry block profile
to 0 (and making it very cold) in this case.
Bootstrapped/regtested
Hi,
with frequencies not being capped by 100 it is easy to run into roundoff errors
that are more than 1. Maybe I will need to give up on this assert (which would
be pity as it is useful) but for now I just made it bit more tolerant.
Bootstrapped/regtested x86_64-linux.
Honza
* ipa-fnsu
Hi,
this patch makes ipa-cp to not drop profile to 0 when clonning across
all active apths and tree-cfg to do same profile updating as tree-inline.
I will factor out the common code as a followup.
Bootstrapped/regtested x86_64-linux.
* ipa-cp.c (update_profiling_info): Handle conversion t
On 11/17/2017 09:03 AM, Richard Sandiford wrote:
> This patch:
>
> - tweaks the handling of legitimize_address_displacement
> so that it gets called before rather than after the address has
> been expanded. This means that we're no longer at the mercy
> of LRA being able to interpret the ex
The attached patch enhances -Wstringop-overflow to detect more
instances of buffer overflow at compile time by handling non-
constant offsets into the destination object that are known to
be in some range. The solution could be improved by handling
even more cases (e.g., anti-ranges or offsets re
On 11/16/2017 11:50 AM, Alan Hayward wrote:
>
>> On 16 Nov 2017, at 18:24, Richard Biener wrote:
>>
>> On November 16, 2017 7:05:30 PM GMT+01:00, Jeff Law wrote:
>>> On 11/16/2017 05:34 AM, Alan Hayward wrote:
This is a set of patches aimed at supporting aarch64 SVE register
preservati
Hi Dominique,
Quite suddenly, I am seeing fault too. I don't know what has changed.
I'm on to it.
Thanks
Paul
On 15 November 2017 at 11:40, Dominique d'Humières wrote:
> Hi Paul,
>
> Your patch fixes the ICE and pass the tests. However I see
>
> At line 22 of file pr78990.f90
> Fortran runti
GCC currently defaults to -fcommon. This is an optional C feature dating
back to early C implementations. On many targets this means global variable
accesses having an unnecessary codesize and performance penalty in C code
(the same source generates better code when built as C++). Given there is
On 11/17/2017 11:57 AM, Nathan Sidwell wrote:
> On 11/17/2017 01:37 PM, Jeff Law wrote:
>
>> ISTM the better way to drive this is to query the branch probabilities.
>> It'd probably be simpler too. Is there some reason that's not a good
>> solution?
>
> (a) I'd have to learn how to do that
Yea,
Remove SLOW_BYTE_ACCESS given it's confusing, badly named,
badly documented and used incorrectly. Although most targets
define it as 1, there are several targets which confuse it
(based on comments next to it) and set it to 0 since the name
obviously implies it should be 0 when byte accesses are
On 11/17/2017 02:21 AM, Richard Sandiford wrote:
> After the previous patches, it's easier to see that the remaining
> inlined transform code in vectorizable_mask_load_store is just a
> cut-down version of the VMAT_CONTIGUOUS handling in vectorizable_load
> and vectorizable_store. This patch there
On 11/17/2017 01:37 PM, Jeff Law wrote:
ISTM the better way to drive this is to query the branch probabilities.
It'd probably be simpler too. Is there some reason that's not a good
solution?
(a) I'd have to learn how to do that
(b) in the case where the condition is just a null check,
ma.cc
On 11/17/2017 02:20 AM, Richard Sandiford wrote:
> vectorizable_mask_load_store and vectorizable_load used the same
> code to build a gather load call, except that the former also
> vectorised a mask argument and used it for both the src and mask
> inputs. The latter instead used a src input of ze
On 11/17/2017 02:19 AM, Richard Sandiford wrote:
> This patch splits out the code to build an all-bits-one or all-bits-zero
> input to a gather load. The catch is that both masks can have
> floating-point type, in which case they are implicitly treated in
> the same way as an integer bitmask.
>
>
On 11/17/2017 02:18 AM, Richard Sandiford wrote:
> This patch splits out the rhs checking code that's common to both
> vectorizable_mask_load_store and vectorizable_store.
>
> Richard
>
>
> 2017-11-17 Richard Sandiford
>
> gcc/
> * tree-vect-stmts.c (vect_check_store_rhs): New function
On 11/17/2017 02:18 AM, Richard Sandiford wrote:
> This patch splits the mask argument checking out of
> vectorizable_mask_load_store, so that a later patch can use it in both
> vectorizable_load and vectorizable_store. It also adds dump messages
> for false returns. This is mostly useful for the
On 11/17/2017 02:17 AM, Richard Sandiford wrote:
> This patch makes vect_model_store_cost take a vec_load_store_type
> instead of a vect_def_type. It's a wash on its own, but it helps
> with later patches.
>
> Richard
>
>
> 2017-11-17 Richard Sandiford
>
> gcc/
> * tree-vectorizer.h (
On 11/17/2017 02:17 AM, Richard Sandiford wrote:
> vectorizable_mask_load_store replaces scalar IFN_MASK_LOAD calls with
> dummy assignments, so that they never survive vectorisation. This patch
> moves the code to vect_transform_loop instead, so that we only change
> the scalar statements once al
On 11/17/2017 08:33 AM, Richard Sandiford wrote:
> This allows LD3 to be used for isolated a[i * 3] accesses, in a similar
> way to the current a[i * 2] and a[i * 4] for LD2 and LD4 respectively.
> Given the problems with the cost model underestimating the cost of
> elementwise accesses, the patch
On 11/17/2017 09:07 AM, Nathan Sidwell wrote:
> We currently optimize a malloc/memset pair into a calloc call (when the
> values match, of course). This turns out to be a pessimization for
> mysql 5.6, where the allocator looks like:
>
> void *ptr = malloc (size);
> if (ptr && other_condition)
>
On 11/15/2017 10:58 PM, Nathan Rossi wrote:
Remove the MicroBlaze specific TARGET_ASM_OUTPUT_IDENT definition, and
use the default.
This resolves issues associated with the use of the .sdata2 operation in
cases where emitted assembly after the ident output is incorrectly in
the .sdata2 section i
On 11/15/2017 11:58 PM, Nathan Rossi wrote:
> Remove the MicroBlaze specific TARGET_ASM_OUTPUT_IDENT definition, and
> use the default.
>
> This resolves issues associated with the use of the .sdata2 operation in
> cases where emitted assembly after the ident output is incorrectly in
> the .sdata2
On 11/17/2017 04:23 AM, Claudiu Zissulescu wrote:
Hi,
gcc/
* config/arc/linux.h: GLIBC_DYNAMIC_LINKER update per glibc
upstreaming review comments
Accepted and committed. Thank you for your contribution,
Claudiu
Hi,
Please also consider this for backporting as that is the g
On 11/17/2017 06:48 AM, Bin Cheng wrote:
> Hi,
> This is an obvious patch removing redundant check on component distance in
> tree-predcom.c Bootstrap and test along with next patch. Is it OK?
>
> Thanks,
> bin
> 2017-11-15 Bin Cheng
>
> * tree-predcom.c (add_ref_to_chain): Remove chec
On 11/17/2017 08:15 AM, Richard Sandiford wrote:
> This patch adds a hook to control whether we avoid executing masked
> (predicated) stores when the mask is all false. We don't want to do
> that by default for SVE.
>
> Tested on aarch64-linux-gnu (with and without SVE), x86_64-linux-gnu
> and po
On Wed, 8 Nov 2017, Jakub Jelinek wrote:
> On Wed, Nov 08, 2017 at 06:51:34PM +0100, Marek Polacek wrote:
> > > Ok, so like this if it passes bootstrap/regtest?
> > >
> > > Changes from the last patch:
> > > 1) false instead of lval for COMPOUND_EXPR and *COND_EXPR op1/op2
> >
> > So...
>
> Oop
On 11/17/2017 09:06 AM, Richard Sandiford wrote:
> The call to ifc_temp_var in predicate_mem_writes become redundant
> in r230099. Before that point the mask was calculated using
> fold_build_*s, but now it's calculated by gimple_build and so
> is already a valid gimple value.
>
> As it stands, t
On Fri, 3 Nov 2017, H.J. Lu wrote:
> Here is the updated patch to use rcrt1.o/grcrt1.o.
>
> OK for trunk?
OK.
--
Joseph S. Myers
jos...@codesourcery.com
On 10/23/2017 11:05 AM, Richard Sandiford wrote:
> This patch makes indirect_refs_may_alias_p use ranges_may_overlap_p
> rather than ranges_overlap_p. Unlike the former, the latter can handle
> negative offsets, so the fix for PR44852 should no longer be necessary.
> It can also handle offset_int,
On 17 November 2017 14:45:29 CET, Richard Biener
wrote:
>On Fri, Nov 17, 2017 at 8:41 AM, Jeff Law wrote:
>> This patch introduces the evrp_range_analyzer class. This is the
>class
>> we're going to be able to embed into existing dominator walkers to
>> provide them with context sensitive range
On Fri, 17 Nov 2017, DJ Delorie wrote:
> Richard Biener writes:
> > The question is what ptrdiff_t is for a specific address space. Or
> > rather if that type may be dependent on the address space or if we can
> > always use that of the default address space.
>
> Some targets have a "far" addres
On Fri, 17 Nov 2017, Richard Biener wrote:
> The question is what ptrdiff_t is for a specific address space. Or
> rather if that type may be dependent on the address space or if we can
> always use that of the default address space.
ptrdiff_t is a fixed type which does not depend on the address
Richard Biener writes:
> The question is what ptrdiff_t is for a specific address space. Or
> rather if that type may be dependent on the address space or if we can
> always use that of the default address space.
Some targets have a "far" address space that's bigger than the default.
rl78 for ex
On November 17, 2017 6:20:22 PM GMT+01:00, Joseph Myers
wrote:
>On Fri, 17 Nov 2017, Richard Biener wrote:
>
>> Joseph may have an idea about the address-space issue.
>
>I'm not clear what the question is. The TR 18037 rule on subtractions
>with address spaces is "For subtraction, if the two op
On Fri, Nov 3, 2017 at 2:15 PM, David Malcolm wrote:
> += get_cp_stdlib_header_for_name (IDENTIFIER_POINTER (name));
> + new suggest_missing_header (loc,
> + IDENTIFIER_POINTER (name),
Maybe add overloads that take identifie
Hello world,
the attached patch fixes the PR by looking at the function interface if
one exists.
Regression-tested. OK for trunk?
Regards
Thomas
2017-11-17 Thomas Koenig
PR fortran/83012
* expr.c (gfc_is_simply_contiguous): If a function call through a
clas
On 10/23/2017 11:04 AM, Richard Sandiford wrote:
> This patch adds support for DWARF location expressions
> that involve polynomial offsets. It adds a target hook that
> says how the runtime invariants used in the offsets should be
> represented in DWARF. SVE vectors have to be a multiple of
> 12
Hi
Assorted testcase updates to reflect codegen differences on
Power9 versus Power8 and earlier systems.
Tested on P9, this is expected to clean up the majority of the
currently failing tests on that system.
OK for trunk?
Thanks
-Will
2017-11-17 Will Schmidt
[testsuite]
* f
On Fri, 17 Nov 2017, Richard Biener wrote:
> Joseph may have an idea about the address-space issue.
I'm not clear what the question is. The TR 18037 rule on subtractions
with address spaces is "For subtraction, if the two operands are pointers
into different address spaces, the address spaces
On 11/17/2017 05:40 AM, Jonathan Wakely wrote:
> On 16/11/17 09:18 -0700, Martin Sebor wrote:
>> On 11/16/2017 03:49 AM, Jonathan Wakely wrote:
>>> On 15/11/17 20:28 -0700, Martin Sebor wrote:
On 11/15/2017 07:31 AM, Jonathan Wakely wrote:
> The docs for -Wmaybe-uninitialized have some iss
This patch adds support for in-order floating-point addition reductions,
which are suitable even in strict IEEE mode.
Previously vect_is_simple_reduction would reject any cases that forbid
reassociation. The idea is instead to tentatively accept them as
"FOLD_LEFT_REDUCTIONs" and only fail later
The 82836 testcase fell out of creduce. In c++17 mode it fails horribly
with missing return errors.
Applying this fix, so it's valid in c++17. It still ICEs (in both 14
and 17 modes) with the 82836 fix removed.
nathan
--
Nathan Sidwell
2017-11-17 Nathan Sidwell
* g++.dg/pr82836.C: Fix
On 17 November 2017 14:31:45 CET, Richard Biener
wrote:
>On Fri, Nov 17, 2017 at 11:23 AM, Eric Botcazou
>wrote:
>> Hi,
>>
>> this is a cleaned up and updated revision of Mike's latest posted
>patch
>> implementing #pragma GCC unroll in the C and C++ compilers. To be
>honest,
>> we're not so mu
Hi,
as discussed at IRC, currently vectorizer costmodel ignores the fact that not
all vector operations are supported. In particular when vectorizing byte and
64bit integer loops we quite often end up producing slower vector sequence by
believing that we can use vector operations which does not exi
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