Re: Splitting up gcc/omp-low.c?

Hi! Ping. Given that we conceptually agreed about this task, but apparently nobody is now interested in reviewing my proposed changes (and tells me how they'd like me to submit the patch for review), should I maybe just execute the steps? On Wed, 18 May 2016 13:42:37 +0200, Thomas Schwinge wro

Re: [PATCH] Fix up Yr constraint

On Tue, May 24, 2016 at 9:02 PM, Jakub Jelinek wrote: > On Tue, May 24, 2016 at 08:35:12PM +0200, Uros Bizjak wrote: >> On Tue, May 24, 2016 at 6:55 PM, Jakub Jelinek wrote: >> > Hi! >> > >> > The Yr constraint contrary to what has been said when it has been submitted >> > actually is always NO_R

Re: libgomp: In OpenACC testing, cycle though $offload_targets, and by default only build for the offload target that we're actually going to test

Hi! Ping... On Wed, 18 May 2016 13:41:25 +0200, I wrote: > Ping. > > On Wed, 11 May 2016 15:45:13 +0200, I wrote: > > Ping. > > > > On Mon, 02 May 2016 11:54:27 +0200, I wrote: > > > On Fri, 29 Apr 2016 09:43:41 +0200, Jakub Jelinek > > > wrote: > > > > On Thu, Apr 28, 2016 at 12:43:43PM +020

Re: [Patch] Implement is_[nothrow_]swappable (p0185r1)

2016-05-23 13:50 GMT+02:00 Jonathan Wakely : > On 17/05/16 20:39 +0200, Daniel Krügler wrote: >> >> This is an implementation of the Standard is_swappable traits according to >> >> http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2016/p0185r1.html >> >> During that work it has been found that std

RE: [Patch V2] Fix SLP PR58135.

Hi Christophe, > -Original Message- > From: Christophe Lyon [mailto:christophe.l...@linaro.org] > Sent: Tuesday, May 24, 2016 8:45 PM > To: Kumar, Venkataramanan > Cc: Richard Biener ; gcc-patches@gcc.gnu.org > Subject: Re: [Patch V2] Fix SLP PR58135. > > Hi Venkat, > > > On 23 May 20

Re: More backwards/FSM jump thread refactoring and extension

On 05/24/2016 06:03 PM, Trevor Saunders wrote: On Tue, May 24, 2016 at 10:58:18AM -0600, Jeff Law wrote: --- a/gcc/tree-ssa-threadbackward.c +++ b/gcc/tree-ssa-threadbackward.c @@ -356,6 +356,44 @@ profitable_jump_thread_path (vec *&path, return taken_edge; } +/* PATH is vector of blocks f

Re: [PATCH][MIPS] Add support for code_readable function attribute

On 05/24/2016 08:25 AM, Robert Suchanek wrote: [snip] diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index e4d6c1c..dd23c70 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -4441,6 +4441,23 @@ On MIPS targets, you can use the @code{nocompression} function attribute to loc

Re: [PATCH][MIPS] Add -minline-intermix to ignore compression flags when inlining

On 05/24/2016 08:23 AM, Robert Suchanek wrote: [snip] diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 73f1cb6..2f6195e 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -837,6 +837,7 @@ Objective-C and Objective-C++ Dialects}. -mips16 -mno-mips16 -mflip-mips16 @gol

Re: More backwards/FSM jump thread refactoring and extension

On Tue, May 24, 2016 at 10:58:18AM -0600, Jeff Law wrote: > --- a/gcc/tree-ssa-threadbackward.c > +++ b/gcc/tree-ssa-threadbackward.c > @@ -356,6 +356,44 @@ profitable_jump_thread_path (vec > *&path, >return taken_edge; > } > > +/* PATH is vector of blocks forming a jump threading path in r

Re: C++ PATCH for c++/70735 (static locals and generic lambdas)

On May 24, 2016, at 3:35 PM, Paolo Carlini wrote: > On 23/05/2016 21:01, Jason Merrill wrote: >> +// PR c++/70735 >> +// { dg-do run { target c++1y } } >> + > [...] >> @@ -0,0 +1,19 @@ >> +// PR c++/70735 >> +// { dg-do run { target c++1y } } > I'm changing these c++1y to c++14. Thanks. :-) I

Re: C++ PATCH for c++/70735 (static locals and generic lambdas)

Hi, On 23/05/2016 21:01, Jason Merrill wrote: +// PR c++/70735 +// { dg-do run { target c++1y } } + [...] @@ -0,0 +1,19 @@ +// PR c++/70735 +// { dg-do run { target c++1y } } I'm changing these c++1y to c++14. Paolo.

Re: [PATCH, rs6000 testsuite] PR71050, Fix lhs-1.c testcase

On Tue, May 24, 2016 at 04:55:45PM -0500, Pat Haugen wrote: > The following simplifies the given testcase so it is no longer sensitive to > subreg (and hopefully other) codegen changes. Tested on powerpc64, ok for > trunk? > > -Pat > > > testsuite/ChangeLog: > 2016-05-24 Pat Haugen > >

[PATCH, rs6000 testsuite] PR71050, Fix lhs-1.c testcase

The following simplifies the given testcase so it is no longer sensitive to subreg (and hopefully other) codegen changes. Tested on powerpc64, ok for trunk? -Pat testsuite/ChangeLog: 2016-05-24 Pat Haugen PR target/71050 * gcc.target/powerpc/lhs-1.c: Fix testcase to avoid su

Re: [PATCH], Add support for PowerPC ISA 3.0 VNEGD/VNEGW instructions

On Wed, May 18, 2016 at 02:30:31PM -0400, Michael Meissner wrote: > Unlike some of my patches, this is a fairly simple patch to add support for > the > VNEGW and VNEGD instructions that were added in ISA 3.0. Note, ISA 3.0 does > not provide negation for V16QImode/V8HImode, just V4SImode/V2DImode

Re: [PATCH] Use flag_general_regs_only with -mgeneral-regs-only

On Tue, 24 May 2016, Uros Bizjak wrote: > > I have thrown together a quick patch that defines target_flags as > > HOST_WIDE_INT. > > > > (Patch still needs a small correction, so opth-gen.awk will emit > > HOST_WIDE_INT_1 for MASK_* defines, have to go now, but I was able to > > compile functiona

Re: [PATCH], Add PowerPC ISA 3.0 vector count trailing zeros and vector parity support

On Tue, May 24, 2016 at 05:05:14PM -0400, Michael Meissner wrote: > This patch adds support for two sets of new instructions in ISA 3.0, vector > count trailing zeros, and vector parity. In addition, it defines many of the > support macros that will be used by other built-in functions that will be

Re: [PATCH] nvptx per-warp compiler-defined stacks (-msoft-stack)

On Fri, 20 May 2016, Nathan Sidwell wrote: > ah, that's much more understandable, thanks. Presumably this doesn't > support worker-single mode (in OpenACC parlance, I don't know what the OpenMP > version of that is?) I don't see why you have concerns. In OpenMP, what OpenACC calls 'worker-sing

Re: [PATCH] c++/71147 - [6 Regression] Flexible array member wrongly rejected in template

On 05/24/2016 04:43 PM, Martin Sebor wrote: On 05/24/2016 12:51 PM, Jason Merrill wrote: On 05/24/2016 12:15 PM, Martin Sebor wrote: + else if (TREE_CODE (type) == ARRAY_TYPE /* && TYPE_DOMAIN (type) */) Why is this commented out rather than removed in this version of the patch? Let's remov

[PATCH], Add PowerPC ISA 3.0 vector count trailing zeros and vector parity support

This patch adds support for two sets of new instructions in ISA 3.0, vector count trailing zeros, and vector parity. In addition, it defines many of the support macros that will be used by other built-in functions that will be added shortly. I have bootstraped this and there were no regressions.

Re: New hashtable power 2 rehash policy

Attached patch applied then. I had to regorganize things a little now that some pieces have been integrated in 71181 patch. 2016-05-24 François Dumont * include/bits/c++config (_GLIBCXX14_USE_CONSTEXPR): New. * include/bits/hashtable_policy.h (_Prime_rehash_policy::__has_load_f

Re: C++ PATCH for c++/70584 (parenthesized argument to x86 builtin)

On 05/23/2016 02:58 PM, Jason Merrill wrote: The C++14 decltype(auto) obfuscation was confusing the x86 builtin; it's a simple matter to undo it during delayed folding, thanks to the maybe_undo_parenthesized_ref function that Patrick recently introduced. But using cp_fold_maybe_rvalue here is w

Re: [PATCH] Use flag_general_regs_only with -mgeneral-regs-only

On Tue, May 24, 2016 at 12:06 PM, H.J. Lu wrote: > On Tue, May 24, 2016 at 11:44 AM, Uros Bizjak wrote: >> On Tue, May 24, 2016 at 8:15 PM, Uros Bizjak wrote: >>> On Tue, May 24, 2016 at 7:18 PM, H.J. Lu wrote: >>> > Oh, target_flags is only a 32bit integer :(. Is there a reason it > ca

Re: [PATCH] c++/71147 - [6 Regression] Flexible array member wrongly rejected in template

On 05/24/2016 12:51 PM, Jason Merrill wrote: On 05/24/2016 12:15 PM, Martin Sebor wrote: + else if (TREE_CODE (type) == ARRAY_TYPE /* && TYPE_DOMAIN (type) */) Why is this commented out rather than removed in this version of the patch? Let's remove it, as before. OK with that change. It w

Re: [patch,openacc] use firstprivate pointers for subarrays in c and c++

On Tue, May 24, 2016 at 12:16:35PM -0700, Cesar Philippidis wrote: > --- a/gcc/c/c-typeck.c > +++ b/gcc/c/c-typeck.c > @@ -11939,8 +11939,7 @@ c_finish_omp_cancellation_point (location_t loc, tree > clauses) > > static tree > handle_omp_array_sections_1 (tree c, tree t, vec &types, > -

Re: [patch,openacc] use firstprivate pointers for subarrays in c and c++

On 05/23/2016 11:09 PM, Jakub Jelinek wrote: > On Mon, May 23, 2016 at 07:31:53PM -0700, Cesar Philippidis wrote: >> @@ -12559,7 +12560,7 @@ c_finish_omp_clauses (tree clauses, enum >> c_omp_region_type ort) >>t = OMP_CLAUSE_DECL (c); >>if (TREE_CODE (t) == TREE_LIST) >> {

Re: [PATCH] Use flag_general_regs_only with -mgeneral-regs-only

On Tue, May 24, 2016 at 11:44 AM, Uros Bizjak wrote: > On Tue, May 24, 2016 at 8:15 PM, Uros Bizjak wrote: >> On Tue, May 24, 2016 at 7:18 PM, H.J. Lu wrote: >> Oh, target_flags is only a 32bit integer :(. Is there a reason it can't be extended to HOST_WIDE_INT, as is the case with >>>

Re: [PATCH] Fix up Yr constraint

On Tue, May 24, 2016 at 08:35:12PM +0200, Uros Bizjak wrote: > On Tue, May 24, 2016 at 6:55 PM, Jakub Jelinek wrote: > > Hi! > > > > The Yr constraint contrary to what has been said when it has been submitted > > actually is always NO_REX_SSE_REGS or NO_REGS, never ALL_SSE_REGS, so > > the RA rest

Re: [PATCH] c++/71147 - [6 Regression] Flexible array member wrongly rejected in template

On 05/24/2016 12:15 PM, Martin Sebor wrote: + else if (TREE_CODE (type) == ARRAY_TYPE /* && TYPE_DOMAIN (type) */) Why is this commented out rather than removed in this version of the patch? Let's remove it, as before. OK with that change. Jason

Re: [PATCH] Use flag_general_regs_only with -mgeneral-regs-only

On Tue, May 24, 2016 at 8:15 PM, Uros Bizjak wrote: > On Tue, May 24, 2016 at 7:18 PM, H.J. Lu wrote: > >>> Oh, target_flags is only a 32bit integer :(. Is there a reason it >>> can't be extended to HOST_WIDE_INT, as is the case with >>> ix86_isa_flags? >> >> target_flags is generic, not target s

Re: [PATCH] Fix one more Yr use

On Tue, May 24, 2016 at 6:52 PM, Jakub Jelinek wrote: > Hi! > > Another case (separate patch because I thought I should add an avx512f > alternative here, but later on found out it is already handled by > having the vrndscale* patterns defined before these ones > and having the same RTL for them (

Re: [PATCH] Fix Yr constraint uses in various insns

On Tue, May 24, 2016 at 6:50 PM, Jakub Jelinek wrote: > Hi! > > Similarly to the last patch, this one fixes various misc patterns. > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? > > 2016-05-24 Jakub Jelinek > > * config/i386/sse.md (vec_set_0): Use sse4_noavx i

Re: [PATCH] Fix Yr constraint uses in vpmov* insns

On Tue, May 24, 2016 at 6:49 PM, Jakub Jelinek wrote: > Hi! > > Looking at the Yr constraint, it seems to me it is really meant to be used > for noavx, only in that case whether we use xmm0-xmm7 or xmm8+ matters for > the size of the instruction (number of prefixes). > In most of the places where

Re: [PATCH] Fix up Yr constraint

On Tue, May 24, 2016 at 6:55 PM, Jakub Jelinek wrote: > Hi! > > The Yr constraint contrary to what has been said when it has been submitted > actually is always NO_REX_SSE_REGS or NO_REGS, never ALL_SSE_REGS, so > the RA restriction to only the first 8 regs is done no matter what we tune > for. >

Re: [PATCH] Use flag_general_regs_only with -mgeneral-regs-only

On Tue, May 24, 2016 at 7:18 PM, H.J. Lu wrote: >> Oh, target_flags is only a 32bit integer :(. Is there a reason it >> can't be extended to HOST_WIDE_INT, as is the case with >> ix86_isa_flags? > > target_flags is generic, not target specific. I want to limit my > change to x86 backend and -mge

[gomp4.5] Linear clause modifiers

Hi! This patch adds parsing/resolving/translation of linear clause modifiers, adds support for linear-step that is a uniform dummy argument and tweaks a couple of further linear clause related things. Tested on x86_64-linux, committed to gomp-4_5-branch. 2016-05-24 Jakub Jelinek * gf

Re: [PATCH #3], Add PowerPC ISA 3.0 vpermr/xxpermr support

I have committed gcc.target/powerpc/p9-vpermr.c to trunk (separately from the other files mentioned in this ChangeLog), revision 236655. Approved offline. On 05/23/2016 05:16 PM, Segher Boessenkool wrote: > On Mon, May 23, 2016 at 06:22:22PM -0400, Michael Meissner wrote: >> Here are the patches

Re: [PATCH 2/2][GCC] Add one more pattern to RTL if-conversion

On 05/23/2016 05:15 PM, Kyrill Tkachov wrote: > > expand_simple_binop may fail. I think you should add a check that diff_rtx is > non-NULL > and bail out early if it is. > Fixed. -- Regards, Mikhail Maltsev diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c index a9c146b..e1473eb 100644 --- a/gcc/ifcvt

Re: [PATCH] Use flag_general_regs_only with -mgeneral-regs-only

On Tue, May 24, 2016 at 9:53 AM, Uros Bizjak wrote: > On Tue, May 24, 2016 at 6:22 PM, H.J. Lu wrote: >> On Tue, May 24, 2016 at 8:52 AM, Uros Bizjak wrote: >>> On Tue, May 24, 2016 at 5:40 PM, H.J. Lu wrote: >>> > No, this is a flag, not a variable. Let's figure out how to extend > tar

Re: [PATCH] Fix PR70434, change FE IL for vector indexing

On May 24, 2016 6:17:19 PM GMT+02:00, Jakub Jelinek wrote: >On Mon, May 23, 2016 at 04:22:57PM +0200, Richard Biener wrote: >> *** /dev/null1970-01-01 00:00:00.0 + >> --- gcc/testsuite/c-c++-common/vector-subscript-5.c 2016-05-23 >16:17:41.148043066 +0200 >> *** >>

Re: [PATCH, ARM] Do not set ARM_ARCH_ISA_THUMB for armv5

Hi Thomas, On 10/05/16 14:26, Thomas Preudhomme wrote: Hi, ARM_ARCH_ISA_THUMB is currently set to 1 when compiling for armv5 despite armv5 not supporting Thumb instructions (armv5t does): arm-none-eabi-gcc -dM -march=armv5 -E - < /dev/null | grep ISA_THUMB #define __ARM_ARCH_ISA_THUMB 1 The r

More backwards/FSM jump thread refactoring and extension

Here's the next patch which does a bit more refactoring in the backwards jump threader and extends the backwards jump threader to handle simple copies and constant initializations. The extension isn't all that useful right now -- while it does fire often during bootstraps, its doing so for cas

[PATCH] Fix up Yr constraint

Hi! The Yr constraint contrary to what has been said when it has been submitted actually is always NO_REX_SSE_REGS or NO_REGS, never ALL_SSE_REGS, so the RA restriction to only the first 8 regs is done no matter what we tune for. This is because we test X86_TUNE_AVOID_4BYTE_PREFIXES, which is an

Re: [PATCH] Use flag_general_regs_only with -mgeneral-regs-only

On Tue, May 24, 2016 at 6:22 PM, H.J. Lu wrote: > On Tue, May 24, 2016 at 8:52 AM, Uros Bizjak wrote: >> On Tue, May 24, 2016 at 5:40 PM, H.J. Lu wrote: >> No, this is a flag, not a variable. Let's figure out how to extend target flags to more than 63 flags first. >>> >>> Extending tar

[PATCH] Fix one more Yr use

Hi! Another case (separate patch because I thought I should add an avx512f alternative here, but later on found out it is already handled by having the vrndscale* patterns defined before these ones and having the same RTL for them (except allowing 0 to 255 instead of just 0 to 15). Bootstrapped/r

[PATCH] Fix Yr constraint uses in various insns

Hi! Similarly to the last patch, this one fixes various misc patterns. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2016-05-24 Jakub Jelinek * config/i386/sse.md (vec_set_0): Use sse4_noavx isa instead of sse4 for the first alternative, drop %v from th

[PATCH] Fix Yr constraint uses in vpmov* insns

Hi! Looking at the Yr constraint, it seems to me it is really meant to be used for noavx, only in that case whether we use xmm0-xmm7 or xmm8+ matters for the size of the instruction (number of prefixes). In most of the places where Yr is used, we typically have 2 noavx alternatives, one with Yr co

Re: [v3 PATCH] PR libstdc++/66338

On 24 May 2016 at 19:35, Ville Voutilainen wrote: > Slight tweak. The avoidance of _NotSameTuple wasn't quite correct for > the templates that > take const tuple<_UElements...>& or tuple<_UElements...>&& instead of > const _UElements&... > or _UElements&&... > > This patch introduces a new helper

Re: [PATCH, ARM, ping1] Do not set ARM_ARCH_ISA_THUMB for armv5

Ping? Best regards, Thomas On Tuesday 10 May 2016 14:26:04 Thomas Preudhomme wrote: > Hi, > > ARM_ARCH_ISA_THUMB is currently set to 1 when compiling for armv5 despite > armv5 not supporting Thumb instructions (armv5t does): > > arm-none-eabi-gcc -dM -march=armv5 -E - < /dev/null | grep ISA_TH

Re: [v3 PATCH] PR libstdc++/66338

On 24 May 2016 at 17:59, Ville Voutilainen wrote: Slight tweak. The avoidance of _NotSameTuple wasn't quite correct for the templates that take const tuple<_UElements...>& or tuple<_UElements...>&& instead of const _UElements&... or _UElements&&... This patch introduces a new helper alias to c

[committed] Allow non-integer/pointer references in linear(ref()) (PR c++/71257)

Hi! Something I've discovered only when looking at the standard again while working on Fortran changes - linear clause with ref modifier should in C++ accept all arguments with reference type, not just those where it references integer or pointer (that is the restriction of all the other kinds).

C/C++ OpenACC routine directive, undeclared name error: try to help the user, once

Hi! Some users of C/C++ OpenACC are surprised to see code such as: #pragma acc routine (F) [declaration or definition of F] ... run into "error: 'F' has not been declared". If the routine directive is meant to apply to the lexically following function declaration or definition, either d

Re: [PATCH] Use flag_general_regs_only with -mgeneral-regs-only

On Tue, May 24, 2016 at 8:52 AM, Uros Bizjak wrote: > On Tue, May 24, 2016 at 5:40 PM, H.J. Lu wrote: > >>> No, this is a flag, not a variable. Let's figure out how to extend >>> target flags to more than 63 flags first. >> >> Extending target flags to more than 63 bits requires replacing >> HOST

RE: [PATCH][MIPS] Add support for P6600

Hi Robert, A few comments inlined. I'd like to review again and/or let Catherine comment before commit. Thanks, Matthew > diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c > index 06acd30..cbe1007 100644 > --- a/gcc/config/mips/mips.c > +++ b/gcc/config/mips/mips.c > @@ -18496,6 +1851

Re: [PATCH] Fix PR70434, change FE IL for vector indexing

On Mon, May 23, 2016 at 04:22:57PM +0200, Richard Biener wrote: > *** /dev/null 1970-01-01 00:00:00.0 + > --- gcc/testsuite/c-c++-common/vector-subscript-5.c 2016-05-23 > 16:17:41.148043066 +0200 > *** > *** 0 > --- 1,13 > + /* { dg-do compile } */ > + > + type

Re: [PATCH] c++/71147 - [6 Regression] Flexible array member wrongly rejected in template

Thanks for the suggestions. I implemented them in the attached update to the the patch. The macro I added evaluates its argument multiple times. That normally isn't a problem unless it's invoked with a non-trivial argument like a call to complete_type() that's passed to COMPLETE_TYPE_P() in gro

Re: RFC [1/2] divmod transform

On 24 May 2016 at 19:39, Richard Biener wrote: > On Tue, 24 May 2016, Prathamesh Kulkarni wrote: > >> On 24 May 2016 at 17:42, Richard Biener wrote: >> > On Tue, 24 May 2016, Prathamesh Kulkarni wrote: >> > >> >> On 23 May 2016 at 17:35, Richard Biener >> >> wrote: >> >> > On Mon, May 23, 2016

[PATCH] Add priority_queue::value_compare (LWG 2684)

* include/bits/stl_queue.h (priority_queue::value_compare): Define. This is only Tentatively Ready but I don't think there's any harm in making the change now. Libc++ have been shipping this for years, without realising it wasn't actually in the standard :-) Tested x86_64, committed to t

Re: [PATCH] Use flag_general_regs_only with -mgeneral-regs-only

On Tue, May 24, 2016 at 5:40 PM, H.J. Lu wrote: >> No, this is a flag, not a variable. Let's figure out how to extend >> target flags to more than 63 flags first. > > Extending target flags to more than 63 bits requires replacing > HOST_WIDE_INT with a bit vector. Since target flags is used in >

Re: Allow embedded timestamps by C/C++ macros to be set externally (3)

On 05/23/2016 04:59 PM, Dhole wrote: PING Note Bernd is on PTO for another week or so. jeff

Re: [C/C++ PATCH] Fix bogus warning with -Wswitch-unreachable (PR c/71249)

OK. Jason On Tue, May 24, 2016 at 7:41 AM, Marek Polacek wrote: > Martin S. noticed that cc1plus bogusly warns on the following test. That's > because I didn't realize that GIMPLE_BINDs might be nested in C++ so we need > to > look through them, and only then get the first statement in the seq

Re: [C++ Patch] PR 69872 ("[6/7 Regression] -Wnarrowing note without warning/errror")

OK. Jason On Tue, May 24, 2016 at 8:32 AM, Paolo Carlini wrote: > Hi, > > in this small diagnostic regression we emit an inform without a preceding > warning/error: checking the return value of the pedwarn, as we normally want > to do, fixes the problem. Tested x86_64-linux. > > Thanks, > Paolo

[PATCH] Fixes to must-tail-call tests

The following fixes the known failures of the must-tail-call tests. Tested with --target= * aarch64-unknown-linux-gnu * ia64-unknown-linux-gnu * m68k-unknown-linux-gnu * x86_64-pc-linux-gnu OK for trunk? gcc/testsuite/ChangeLog: * gcc.dg/plugin/must-tail-call-2.c (test_2_caller): Genera

Re: [PATCH] Use flag_general_regs_only with -mgeneral-regs-only

On Sat, May 21, 2016 at 12:48 AM, Uros Bizjak wrote: > On Fri, May 20, 2016 at 7:49 PM, H.J. Lu wrote: >> On Fri, May 20, 2016 at 10:15 AM, Rainer Orth >> wrote: >>> "H.J. Lu" writes: >>> On Thu, May 12, 2016 at 10:54 AM, H.J. Lu wrote: >>> Here is a patch to add >>> -mgeneral-reg

Re: [PATCH][AArch64] Improve aarch64_case_values_threshold setting

On 05/23/16 15:32, Evandro Menezes wrote: I'm fine with this patch, as it achieves in part what I intended before: going beyond the default_case_values_threshold, too conservative for Exynos M1. My concern is particularly what happens to in-order targets, like the ubiquitous A53. I'll get

Re: [Patch V2] Fix SLP PR58135.

Hi Venkat, On 23 May 2016 at 11:54, Kumar, Venkataramanan wrote: > Hi Richard, > >> -Original Message- >> From: Richard Biener [mailto:richard.guent...@gmail.com] >> Sent: Thursday, May 19, 2016 4:08 PM >> To: Kumar, Venkataramanan >> Cc: gcc-patches@gcc.gnu.org >> Subject: Re: [Patch V

Re: [PATCH][AArch64] Improve aarch64_case_values_threshold setting

On 05/24/16 07:08, Wilco Dijkstra wrote: Jim Wilson wrote: It looks like a slight lose on qdf24xx on SPEC CPU2006 at -O3. I see about a 0.37% loss on the integer benchmarks, and no significant change on the FP benchmarks. The integer loss is mainly due to 458.sjeng which drops 2%. We had trie

[v3 PATCH] PR libstdc++/66338

Tested on Linux-PPC64. The idea here is to get the constructor templates to step out of the way if what they are dealing with will be handled by a special member function, like the copy constructor. Doing so properly fixes the bug at hand and likely other similar cases, too. The problem in getting

RE: [PATCH][MIPS] Remove "new" MIPS TLS access patterns

Robert Suchanek writes: > The below finishes the revert of r137670 that was already partially reverted > in r137734 as part of PR target/35802. > > It would appear that the revert was not completed because of a spill failure > at the time. As LRA can handle the 'v' constraint just fine and MIPS

RE: [PATCH][MIPS] P5600 scheduler fix

Robert Suchanek writes: > gcc/ > * config/mips/p5600.md (p5600_fpu_fadd): Remove checking for > `fabs' and `fneg' type attributes. > (p5600_fpu_fabs): Add `fmove' to the comment. OK. Thanks, Matthew

[PATCH][MIPS] P5600 scheduler fix

Hi, The below is a fix for the P5600 scheduler. Ok to commit? Regards, Robert 2016-05-24 Simon Dardis Prachi Godbole gcc/ * config/mips/p5600.md (p5600_fpu_fadd): Remove checking for `fabs' and `fneg' type attributes. (p5600_fpu_fabs): Add `fmove' to th

[PATCH][MIPS] Remove "new" MIPS TLS access patterns

Hi, The below finishes the revert of r137670 that was already partially reverted in r137734 as part of PR target/35802. It would appear that the revert was not completed because of a spill failure at the time. As LRA can handle the 'v' constraint just fine and MIPS is going to drop the support f

[PATCH][MIPS] Don't split shifts by default for MIPS16.

Hi, The following changes the default behaviour of shift splitting for MIPS16 e.g. the shifts will be split only when used with undocumented -mno-debugd option that is now switched on by default. This appears to enable better optimization in certain cases, and hence, giving slightly better perfor

[PATCH][MIPS] Add support for code_readable function attribute

Hi, The patch adds support for __attribute__ ((code_readable)) with optional argument that accepts `no', `yes' or `pcrel' just like the -mcode-readable= command line switch. If the argument is not specified then the default `yes' is applied. This of course has only effect on targets supporting -

[PATCH][MIPS] Add -minline-intermix to ignore compression flags when inlining

Hi, The below allows us to inline functions that have different compression flags for better tuning of performance/code size balance. Ok to commit? Regards, Robert 2016-05-24 Matthew Fortune gcc/ * config/mips/mips.c (mips_can_inline_p): Allow inlining of functions with oppo

RE: [PATCH] Disable -mbranch-likely for -Os when targetting generic architecture

Hi Catherine, Apologies for the (very) late reply. It appears that I never replied to the last message. > > gcc/ > > * config/mips/mips-cpus.def: Replace PTF_AVOID_BRANCHLIKELY > > with > > PTF_AVOID_BRANCHLIKELY_ALWAYS for generic architecture and > > with > > PTF_AVOID_BRANCHLIKELY_

Re: [PATCH] Fix PR71230

On Tue, 24 May 2016, Jakub Jelinek wrote: > On Tue, May 24, 2016 at 03:28:42PM +0200, Richard Biener wrote: > > The following fixes the ICEs in PR71230. > > > > Bootstrap and regtest running on x86_64-unknown-linux-gnu. > > Wouldn't it be enough to use TYPE_SIZE_UNIT instead of TYPE_PRECISION >

Re: [PATCH] Fix PR71230

On Tue, May 24, 2016 at 03:28:42PM +0200, Richard Biener wrote: > The following fixes the ICEs in PR71230. > > Bootstrap and regtest running on x86_64-unknown-linux-gnu. Wouldn't it be enough to use TYPE_SIZE_UNIT instead of TYPE_PRECISION for the non-INTEGRAL_TYPE_Ps and just deal with it at the

Re: RFC [1/2] divmod transform

On Tue, 24 May 2016, Prathamesh Kulkarni wrote: > On 24 May 2016 at 17:42, Richard Biener wrote: > > On Tue, 24 May 2016, Prathamesh Kulkarni wrote: > > > >> On 23 May 2016 at 17:35, Richard Biener wrote: > >> > On Mon, May 23, 2016 at 10:58 AM, Prathamesh Kulkarni > >> > wrote: > >> >> Hi, > >

Re: Tighten syntax checking for OpenACC routine construct in C

Hi! On Tue, 24 May 2016 10:54:53 +0200, Jakub Jelinek wrote: > On Tue, May 24, 2016 at 10:51:15AM +0200, Thomas Schwinge wrote: > > OK for trunk? > Ok. Committed without changes in r236639: commit c9d624bd2672463771546e73bf3d6446d64e43c0 Author: tschwinge Date: Tue May 24 14:00:39 2016 +000

Re: [PATCH] Introduce can_remove_lhs_p

On Tue, May 24, 2016 at 02:17:10PM +0200, Richard Biener wrote: > On Mon, 23 May 2016, Marek Polacek wrote: > > > On Mon, May 23, 2016 at 04:36:30PM +0200, Jakub Jelinek wrote: > > > On Mon, May 23, 2016 at 04:28:33PM +0200, Marek Polacek wrote: > > > > As promised in > > > >

Re: RFC [1/2] divmod transform

On 24 May 2016 at 17:42, Richard Biener wrote: > On Tue, 24 May 2016, Prathamesh Kulkarni wrote: > >> On 23 May 2016 at 17:35, Richard Biener wrote: >> > On Mon, May 23, 2016 at 10:58 AM, Prathamesh Kulkarni >> > wrote: >> >> Hi, >> >> I have updated my patch for divmod (attached), which was ori

Re: [PATCH] Vectorize inductions that are live after the loop.

On Mon, May 23, 2016 at 2:53 PM, Alan Hayward wrote: > > Thanks for the review. > > On 23/05/2016 11:35, "Richard Biener" wrote: > >> >>@@ -6332,79 +6324,81 @@ vectorizable_live_operation (gimple *stmt, >> stmt_vec_info stmt_info = vinfo_for_stmt (stmt); >> loop_vec_info loop_vinfo = STMT_VIN

Re: [PATCH v3] gcov: Runtime configurable destination output

On 05/23/16 16:03, Aaron Conole wrote: The previous gcov behavior was to always output errors on the stderr channel. This is fine for most uses, but some programs will require stderr to be untouched by libgcov for certain tests. This change allows configuring the gcov output via an environment va

[PATCH][ARM][3/4] Cleanup casts from INTVAL to [unsigned] HOST_WIDE_INT

Hi all, We have a few instances in the arm backend where we take the INTVAL of an RTX and immediately cast it to an (unsigned HOST_WIDE_INT). This is exactly equivalent to taking the UINTVAL of the RTX. This patch fixes such uses. A couple of uses in arm.md take the INTVAL and then compare it

[PATCH] Fix PR71230 some more

There were more omissions in how zero_one_operation works with the new way of processing negates in the context of multiplication chains. Bootstrapped on x86_64-unknown-linux-gnu, testing in progress. CPU 2006 build in progress as well. Richard. 2016-05-24 Richard Biener PR tree-op

[PATCH][ARM][2/4] Replace casts of 1 to HOST_WIDE_INT by HOST_WIDE_INT_1 and HOST_WIDE_INT_1U

Hi all, hwint.h defines a number of useful macros to access the constants -1,0,1 cast to HOST_WIDE_INT or unsigned HOST_WIDE_INT. We can use these to save some horizontal space and parentheses when we need such constants. This patch replaces such uses with these macros to slightly improve the

[PATCH][ARM][1/4] Replace uses of int_log2 by exact_log2

Hi all, The int_log2 function in arm.c is not really useful since we already have a generic function for calculating the log2 of HOST_WIDE_INTs. The only difference in functionality is that int_log2 also asserts that the result is no greater than 31. This patch removes int_log2 in favour of ex

[PATCH] Fix PR71230

The following fixes the ICEs in PR71230. Bootstrap and regtest running on x86_64-unknown-linux-gnu. Richard. 2016-05-24 Richard Biener PR tree-optimization/71240 * tree-ssa-math-opts.c (init_symbolic_number): Verify the source has integral type. * gcc.dg/opt

Re: [fortran] Re: Make array_at_struct_end_p to grok MEM_REFs

> As said I'd simply use NULL TYPE_MAX_VALUE, not drop TYPE_DOMAIN > completely (yes, NULL TYPE_DOMAIN is equal to [0:] so we can as well > print that - as you say, not sure what else breaks with that ;)) NULL TYPE_MAX_VALUE was used by my previous patch, because it used gfc_array_range_type tha

[PATCH][ARM][4/4] Simplify checks for CONST_INT_P and comparison against 1/0

Hi all, Following up from patch 3/4 there are a few more instances where we check that an RTX is CONST_INT_P and then compare its INTVAL against 1 or 0. These can be replaced by just comparing the RTX directly against CONST1_RTX or CONST0_RTX. This patch does that. Bootstrapped and tested on

Re: [fortran] Re: Make array_at_struct_end_p to grok MEM_REFs

On Tue, 24 May 2016, Jan Hubicka wrote: > Hi, > I tried the attached patch that gets rid of gfc_array_range_type because it > seems pointless from middle-end POV. It however affects .original dumps in the > following way: > --- assumed_type_2.f90.003t.original2016-05-24 14:32:45.771503552 +020

Re: [PATCH][ARM] PR target/70830: Avoid POP-{reglist}^ when returning from interrupt handlers

Ping. https://gcc.gnu.org/ml/gcc-patches/2016-05/msg01211.html Thanks, Kyrill On 17/05/16 11:40, Kyrill Tkachov wrote: On 13/05/16 12:05, Kyrill Tkachov wrote: Hi Christophe, On 12/05/16 20:57, Christophe Lyon wrote: On 12 May 2016 at 11:48, Ramana Radhakrishnan wrote: On Thu, May 5, 2016

Re: [fortran] Re: Make array_at_struct_end_p to grok MEM_REFs

Hi, I tried the attached patch that gets rid of gfc_array_range_type because it seems pointless from middle-end POV. It however affects .original dumps in the following way: --- assumed_type_2.f90.003t.original2016-05-24 14:32:45.771503552 +0200 +++ ../assumed_type_2.f90.003t.original 2016-05-2

Re: [fortran] Re: Make array_at_struct_end_p to grok MEM_REFs

> > Hmm, you are probably right. If we can have array with TYPE_DOMAIN != NULL > > and sane bounds, but with TYPE_SIZE == NULL, we probably need to punt on > > NULL > > TYPE_SIZE. I can add it just to be sure. > > As a MEM_REF embeds a VIEW_CONVERT you can placement-new > > struct { int a[5]; c

Re: [fortran] Re: Make array_at_struct_end_p to grok MEM_REFs

On Tue, 24 May 2016, Jan Hubicka wrote: > > > > Ah, yes. Now I see. > > > > > The test I updated that looks for DECL simply assumes > > > that declarations can not be accessed past their end. > > > It would make more sense to use object size machinery here somehow. > > > (i.e. even in fortran

[C++ Patch] PR 69872 ("[6/7 Regression] -Wnarrowing note without warning/errror")

Hi, in this small diagnostic regression we emit an inform without a preceding warning/error: checking the return value of the pedwarn, as we normally want to do, fixes the problem. Tested x86_64-linux. Thanks, Paolo. / /cp 2016-05-24 Paolo Carlini PR c++/69872

Re: [fortran] Re: Make array_at_struct_end_p to grok MEM_REFs

> > Ah, yes. Now I see. > > > The test I updated that looks for DECL simply assumes > > that declarations can not be accessed past their end. > > It would make more sense to use object size machinery here somehow. > > (i.e. even in fortran we have accesses to mallocated buffers of constant > >

Re: [PATCH v2] Ensure source_date_epoch is always initialised

On 16-05-24 12:06:48, James Clarke wrote: > Hi, > > On 24 May 2016, at 11:59, Dhole wrote: > > > > Hey! > > > > I'm the original author of the SOURCE_DATE_EPOCH patch. > > > > I've just seen this. I believe that this bug was fixed in the the > > rework of the patch I sent some days ago [1], al

Re: [PATCH] Introduce can_remove_lhs_p

On Mon, 23 May 2016, Marek Polacek wrote: > On Mon, May 23, 2016 at 04:36:30PM +0200, Jakub Jelinek wrote: > > On Mon, May 23, 2016 at 04:28:33PM +0200, Marek Polacek wrote: > > > As promised in , > > > this is a simple clean-up which makes

Re: RFC [1/2] divmod transform

On Tue, 24 May 2016, Prathamesh Kulkarni wrote: > On 23 May 2016 at 17:35, Richard Biener wrote: > > On Mon, May 23, 2016 at 10:58 AM, Prathamesh Kulkarni > > wrote: > >> Hi, > >> I have updated my patch for divmod (attached), which was originally > >> based on Kugan's patch. > >> The patch tran

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