[Fixed the subject and added ARM maintainers to recipient.]
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Thursday, December 17, 2015 3:51 PM
> To: gcc-patches@gcc.gnu.org
> Subject: [PATCH, ARM
Hi,
We decided to apply the following patch to the ARM embedded 5 branch.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Thursday, December 17, 2015 3:51 PM
> To: gcc-patch
Hi,
This patch is part of a patch series to add support for ARMv8-M[1] to GCC. This
specific patch fixes the indentation of FL_FOR_ARCH* macros definition
following the patch to add support for ARMv8-M. Since this is an obvious
change, I'm not expecting a review and will commit it as soon as th
Hi,
We decided to apply the following patch to the ARM embedded 5 branch.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Thursday, December 17, 2015 3:25 PM
> To: gcc-patch
Hi!
Committed to gomp-4_0-branch in r231738:
commit d0b110f2163a5b186f15d05c9bfc6f51a42d652c
Merge: 2a5a682 565bc8f
Author: tschwinge
Date: Thu Dec 17 07:11:02 2015 +
svn merge -r 231118:231689 svn+ssh://gcc.gnu.org/svn/gcc/trunk
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc
Mike Stump writes:
> On Dec 15, 2015, at 5:35 AM, Rainer Orth
> wrote:
>> Right: I'm effectively keeping just the first configure test for .stabs
>> support in the assembler to enable or disable
>> DBX_DEBUG/DBX_DEBUGGING_INFO. I'll post it later since …
>
>> ... testing revealed another insta
Hi,
This patch is part of a patch series to add support for ARMv8-M[1] to GCC. This
specific patch adds basic support for the new architecture, allowing the new
names to be accepted by -march and the compiler to behave like ARMv6-M (for
ARMv8-M Baseline) and or ARMv7-M (for ARMv8-M Mainline). T
The following was committed, once rebased on top of the embedded branch (patch
was generated on top of gcc-5-branch):
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index
8c10ea3c9053e89b8eae1e5353b92d6020499409..bf1a0e874b1669f3ebe1e5870556a46b80686b82
100644
--- a/gcc/config/arm/arm
Hi,
We decided to apply the following patch to the ARM embedded 5 branch. This is
*not* intended for trunk for now. We will send a separate email for trunk.
This patch is part of a patch series to add support for ARMv8-M[1] to GCC. This
specific patch fixes some assumptions related to M profile
Hi,
I'll be posting a patch series intended for trunk whose aim is to add support
for ARMv8-M. This patch series does not include changes to support the security
extensions [nor does it include atomics for ARMv8-M Baseline]. This will be
posted as a separate patch series.
=== Quick overview o
OK, thanks.
Jason
In the C FE, c_parser_statement_after_labels passes "xloc" to
c_finish_return, which is the location of the first token
within the returned expression.
Hence we don't get a full underline for the following:
diagnostic-range-bad-return.c:34:10: warning: function returns address of local
variable
The attached patch fixes a reload error in one of the new 64-bit atomic
patterns in a 32-bit kernel build.
Kernel builds disable the use of floating point registers with
-mdisable-fpregs. The atomic patterns need
to use floating point loads and stores and should have been disabled when
-mdisab
Kyrill,
I have attached a patch that address your comments. The only change I
would ask you to re-consider renaming is the function 'bool
aarch32_simd_check_vect_par_cnst_half'. This function was copied from
the aarch64 port and I thought it as important to match the naming for
maintenance pu
On Wed, Dec 16, 2015 at 6:20 PM, Michael Meissner
wrote:
> My first mail did not seem to be delivered, so I'm trying again.
>
> This fixes a bug with the debug switch -mvsx-timode that we would eventually
> like to enable by default on PowerPC little endian server systems. The bug is
> that the l
* graphite-dependences.c: Move all isl include files to...
* graphite-isl-ast-to-gimple.c: Same.
* graphite-optimize-isl.c: Same.
* graphite-poly.c: Same.
* graphite-scop-detection.c: Same.
* graphite.c: Same.
* graphite.h: ... here.
---
gcc/
Since sibcall never returns, we can only use call-clobbered register
as GOT base. Otherwise, callee-saved register used as GOT base won't
be properly restored.
Tested on x86-64 with -m32. OK for trunk?
H.J.
---
gcc/
PR target/68937
* config/i386/i386.c (ix86_function_ok_for_si
My first mail did not seem to be delivered, so I'm trying again.
This fixes a bug with the debug switch -mvsx-timode that we would eventually
like to enable by default on PowerPC little endian server systems. The bug is
that the load with rotate or rotate with store instructions needed on power8
Hi,
this is just an idea, how to avoid use of malloc in unwind-ia64.c.
I can compile this with my cross-compiler, but can not test anything.
If you find it interesting, then someone should continue this work and test
and/or fix it until it really works.
The idea is, I can use alloca instead of
On 12/14/2015 12:36 PM, Cesar Philippidis wrote:
> On 12/08/2015 11:55 AM, Thomas Schwinge wrote:
>> On Sat, 14 Nov 2015 09:36:36 +0100, I wrote:
>> C front end:
>>
>> --- gcc/c/c-parser.c
>> +++ gcc/c/c-parser.c
>> @@ -11607,6 +11607,8 @@ c_parser_oacc_clause_async (c_parser *parser,
we used to translate the just computed schedule tree into a union_map,
and then in the code generation it would be translated back to a schedule tree
just before generating AST code.
---
gcc/graphite-isl-ast-to-gimple.c | 65 ++--
gcc/graphite-optimize-isl.c
On 17 December 2015 at 00:12, Ville Voutilainen
wrote:
> Tested on Linux-PPC64.
>
> 2015-12-17 Ville Voutilainen
>
> PR libstdc++/68276
>
> * src/c++11/ios.cc (_M_grow_words): Use nothrow new.
> * testsuite/27_io/ios_base/storage/11584.cc: Adjust.
Shock horror, inconsistent indenta
On 12/16/2015 02:22 PM, Nathan Sidwell wrote:
This patch https://gcc.gnu.org/ml/gcc-patches/2015-12/msg01273.html
breaks builds using static libisl & libgmp. (a whole slew of undefined
__gmpz_FOO symbols).
Fixed with the attached patch to add -lgmp etc to the isl link test. ok?
OK.
jeff
On 12/16/2015 10:13 AM, Bernd Schmidt wrote:
This is a relatively straightforward PR where we should mention a macro
expansion in a warning message. The patch below implements the
suggestion by Marek to pass a location down from
build_function_call_vec. Ok if tests pass on x86_64-linux?
One ques
Tested on Linux-PPC64.
2015-12-17 Ville Voutilainen
PR libstdc++/68276
* src/c++11/ios.cc (_M_grow_words): Use nothrow new.
* testsuite/27_io/ios_base/storage/11584.cc: Adjust.
diff --git a/libstdc++-v3/src/c++11/ios.cc b/libstdc++-v3/src/c++11/ios.cc
index 4adc701..4241bef 100644
On Wed, 16 Dec 2015, Jason Merrill wrote:
On 12/15/2015 04:16 PM, Patrick Palka wrote:
+ if (MAYBE_CLASS_TYPE_P (type))
+;
What does this patch do with conversion to const reference to class? I think
we want to check MAYBE_CLASS_TYPE_P (non_reference (type)) here.
That makes sense.
Hi!
As can be seen on the testcases below, on > 64 bit precision bitfields
we either ICE or miscompile.
get_int_cst_ext_nunits already has code that for unsigned precision
in multiplies of HOST_BITS_PER_WIDE_INT it forces TREE_INT_CST_EXT_NUNITS
to be bigger than TREE_INT_CST_NUNITS, the former h
On 2015.12.14 at 19:34 -0500, Jason Merrill wrote:
> OK.
This patch caused https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68936
--
Markus
On 12/15/2015 04:16 PM, Patrick Palka wrote:
+ if (MAYBE_CLASS_TYPE_P (type))
+;
What does this patch do with conversion to const reference to class? I
think we want to check MAYBE_CLASS_TYPE_P (non_reference (type)) here.
Jason
Looks good.
Jason
On Wed, 16 Dec 2015, Michael Matz wrote:
Hi,
On Mon, 14 Dec 2015, Patrick Palka wrote:
This should use cp_tree_operand_length.
Hmm, I don't immediately see how I can use this function here. It
expects a tree but I dont have an appropriate tree to give to it, only a
tree_code.
True. So le
On 10/30/2015 05:24 AM, Marcus Shawcroft wrote:
On 20 October 2015 at 00:40, Evandro Menezes wrote:
In the existing targets, it seems that it's always faster to zero up a DF
register with "movi %d0, #0" instead of "fmov %d0, xzr".
This patch modifies the respective pattern.
Hi Evandro,
This
On 12/16/2015 03:53 AM, Pierre-Marie de Rodat wrote:
+ /* Called from finalize_size_functions for functions whose body is needed to
+ generate complete debug info. For instance, functions used to compute the
+ size of variable-length structures. */
+ void (* function_body) (tree decl)
This patch https://gcc.gnu.org/ml/gcc-patches/2015-12/msg01273.html breaks
builds using static libisl & libgmp. (a whole slew of undefined __gmpz_FOO
symbols).
Fixed with the attached patch to add -lgmp etc to the isl link test. ok?
nathan
2015-12-16 Nathan Sidwell
* config/isl.m4 (ISL_C
On 12/16/2015 11:04 AM, David Malcolm wrote:
Currently trunk emits range information for most bad binary operations
in the C++ frontend; but not in the C frontend.
The helper function binary_op_error shared by C and C++ takes a
location_t. In the C++ frontend, a location_t containing the range
Sorry for the delay finishing this review, some of the code kept
melting my brain ;-)
On 14/11/15 20:45 +0100, Torvald Riegel wrote:
diff --git a/libstdc++-v3/config/abi/pre/gnu.ver
b/libstdc++-v3/config/abi/pre/gnu.ver
index 1b3184a..d902b03 100644
--- a/libstdc++-v3/config/abi/pre/gnu.ver
++
> On 12/12/15 09:44, Nathan Sidwell wrote:
> >On 12/11/15 13:15, Jan Hubicka wrote:
> >>>Jan,
> >
> >>>b) augment can_replace_by_local_alias_in_vtable to check whether
> >>>aliases can be created?
> >>
> >>I think this is best: can_replace_by_local_alias_in_vtable exists to
> >>prevent the
> >>bod
Hi,
The attached patch removes the use of the map structure
(struct map) from the NVPTX plugin.
Regtested on x86_64-pc-linux-gnu
Ok for trunk?
Thanks!
Jim
ChangeLog
=
2015-12-XX James Norris
libgomp/
* plugin/plugin-nvptx.c (struct map): Removed.
(map_init
On 12/01/2015 12:32 PM, Richard Sandiford wrote:
Jeff Law writes:
@@ -1080,6 +1070,18 @@ add_removable_extension (const_rtx expr, rtx_insn *insn,
}
}
+ /* Fourth, if the extended version occupies more registers than the
+original and the source of the exten
On 12/12/15 09:44, Nathan Sidwell wrote:
On 12/11/15 13:15, Jan Hubicka wrote:
Jan,
b) augment can_replace_by_local_alias_in_vtable to check whether
aliases can be created?
I think this is best: can_replace_by_local_alias_in_vtable exists to prevent the
body walk in cases we are not going t
On 12/16/2015 05:24 AM, Richard Earnshaw (lists) wrote:
On 15/12/15 23:34, Evandro Menezes wrote:
On 12/14/2015 05:26 AM, James Greenhalgh wrote:
On Thu, Dec 03, 2015 at 03:07:43PM -0600, Evandro Menezes wrote:
On 11/20/2015 05:53 AM, James Greenhalgh wrote:
On Thu, Nov 19, 2015 at 04:04:41PM
This patch removes OUTGOING_STATIC_CHAIN_REGNUM -- there's no need for it to be
distinct from STATIC_CHAIN_REGNUM. Also, when we have to emit a frame or
outgoing args, but it's zero sized, there's no need to actually emit the frame
or arg array. We can just initialize the appropriate register
Hi,
On Mon, 14 Dec 2015, Patrick Palka wrote:
> >>> >This should use cp_tree_operand_length.
> >> Hmm, I don't immediately see how I can use this function here. It
> >> expects a tree but I dont have an appropriate tree to give to it, only a
> >> tree_code.
> >
> > True. So let's introduce cp_t
Hi,
I checked the ipa-pta and pta implementations and these seems to work just
fine with presence of aliases because get_constraint_for_ssa_var already
looks into the alias targets.
This patch adds a testcase I constructed. Since I am done with auditing
*alias*.c for variable aliases I will close
Hi,
just to summarize a discussion on IRC. The problem is that we produce debug
statements for eliminated arguments only in ipa-sra and ipa-split, while we
don't do anything for cgraph clones. This is a problem on release branches,
too.
It seems we have all the necessary logic, but the callee modi
On 12/01/2015 12:32 PM, Richard Sandiford wrote:
Jeff Law writes:
@@ -1080,6 +1070,18 @@ add_removable_extension (const_rtx expr, rtx_insn *insn,
}
}
+ /* Fourth, if the extended version occupies more registers than the
+original and the source of the exten
Matthew pointed out this test was failing for arm-none-eabi because the
rtx_code enum is represented in 8 bits which causes this error:
pr68619-4.c:42:17: error: width of 'code' exceeds its type
enum rtx_code code:16;
I changed the size of the bitfield in the obvious way. I verified all
On Wed, 2015-12-16 at 00:52 +0100, Bernd Schmidt wrote:
> On 12/15/2015 08:30 PM, David Malcolm wrote:
>
> > I got thinking about what we'd have to do to support Perforce-style
> > markers, and began to find my token-matching approach to be a little
> > clunky (in conjunction with reading Martin's
On Wed, 2015-12-09 at 18:44 +0100, Bernd Schmidt wrote:
> On 12/09/2015 05:58 PM, David Malcolm wrote:
> > On Wed, 2015-11-04 at 14:56 +0100, Bernd Schmidt wrote:
> >>
> >> This seems like fairly low impact but also low cost, so I'm fine with it
> >> in principle. I wonder whether the length of the
My patch for 63809 fixed non-capturing use of a parameter pack in a
regular lambda, but not in a generic lambda, where we can't rely on
being instantiated within the enclosing context. So we use the existing
support for references to parameters from trailing return type, another
situation wher
Currently trunk emits range information for most bad binary operations
in the C++ frontend; but not in the C frontend.
The helper function binary_op_error shared by C and C++ takes a
location_t. In the C++ frontend, a location_t containing the range
has already been built, so we get the underline
Hi
This patch addresses incorrect recognition of VEC_PERM_EXPRs as VUZP
and VZIP on armeb-* targets. It also fixes the definition of the
vuzpq_* and vzipq_* NEON intrinsics which use incorrect lane
specifiers in the use of __builtin_shuffle().
The problem with arm_neon.h can be seen by temporari
On Wed, Dec 16, 2015 at 06:15:33PM +0100, Jan Hubicka wrote:
> > On Wed, Dec 16, 2015 at 05:24:25PM +0100, Jan Hubicka wrote:
> > > I am trying to understand Jakub's debug code and perhaps it can be
> > > improved. But in
> > > the case of optimized out unused parameters I think it is perfectly
>
On 12/16/2015 10:00 AM, Kyrill Tkachov wrote:
On 16/12/15 12:18, Bernd Schmidt wrote:
On 12/15/2015 05:21 PM, Kyrill Tkachov wrote:
Then for the shift pattern in the MD file we'd have to
dynamically select the scheduling type depending on whether or
not the shift amount is 1 and the costs line
> On Wed, Dec 16, 2015 at 05:24:25PM +0100, Jan Hubicka wrote:
> > I am trying to understand Jakub's debug code and perhaps it can be
> > improved. But in
> > the case of optimized out unused parameters I think it is perfectly
> > resonable to
> > say that the variable was optimized out.
>
> As
This is a relatively straightforward PR where we should mention a macro
expansion in a warning message. The patch below implements the
suggestion by Marek to pass a location down from
build_function_call_vec. Ok if tests pass on x86_64-linux?
One question I have is about -Wformat, which is dea
On 12/04/2015 05:39 AM, Szabolcs Nagy wrote:
As described in pr other/67627, the all-multi target can be
built in parallel with the %_.lo targets which generate make
dependencies that are parsed during the build of all-multi.
gcc -MD does not generate the makefile dependencies in an
atomic way s
On 12/04/2015 05:39 AM, Szabolcs Nagy wrote:
As described in pr other/67627, the all-multi target can be
built in parallel with the %_.lo targets which generate make
dependencies that are parsed during the build of all-multi.
gcc -MD does not generate the makefile dependencies in an
atomic way s
On 16/12/15 12:18, Bernd Schmidt wrote:
On 12/15/2015 05:21 PM, Kyrill Tkachov wrote:
Then for the shift pattern in the MD file we'd have to dynamically
select the scheduling type depending on whether or not the shift
amount is 1 and the costs line up?
Yes. This isn't unusual, take a look at
we check for a the isl compute timeout function added in isl 0.13.
That means GCC could still be configured with isl 0.13, 0.14, and 0.15.
* config/isl.m4 (ISL_CHECK_VERSION): Check for
isl_ctx_get_max_operations.
* configure: Regenerate.
gcc/
* config.in:
PTX doesn't support sibcalls, so this test is doomed to fail.
2015-12-16 Nathan Sidwell
* gcc.dg/sibcall-9.c: Xfail for nvptx.
Index: gcc.dg/sibcall-9.c
===
--- gcc.dg/sibcall-9.c (revision 231689)
+++ gcc.dg/sibcall-9.c (workin
> -Original Message-
> From: Steve Ellcey [mailto:sell...@imgtec.com]
> Sent: Tuesday, December 15, 2015 4:09 PM
> To: Moore, Catherine
> Cc: gcc-patches@gcc.gnu.org; matthew.fort...@imgtec.com
> Subject: RE: [Patch] Fix for MIPS PR target/65604
>
> On Tue, 2015-12-15 at 15:13 +, Moo
On 12/16/2015 07:58 AM, Marek Polacek wrote:
The following improves the location for "statement with no effect" warning by
using the location of the expression if available. Can't use EXPR_LOCATION as
*_DECLs still don't carry a location.
Bootstrapped/regtested on x86_64-linux, ok for trunk?
2
On Wed, Dec 16, 2015 at 05:24:25PM +0100, Jan Hubicka wrote:
> I am trying to understand Jakub's debug code and perhaps it can be improved.
> But in
> the case of optimized out unused parameters I think it is perfectly resonable
> to
> say that the variable was optimized out.
As long as the valu
> On Thu, Dec 10, 2015 at 08:30:37AM +0100, Jan Hubicka wrote:
> > * ipa-cp.c (ipcp_cloning_candidate_p): Use node->optimize_for_size_p.
> > (good_cloning_opportunity_p): Likewise.
> > (gather_context_independent_values): Do not return true when
> > polymorphic call context is known
Hi!
On Mon, 14 Dec 2015 20:17:33 +0300, Ilya Verbin wrote:
> [updated patch]
This regresses libgomp.oacc-c-c++-common/declare-4.c compilation for
nvptx offloading:
spawn [...]/build-gcc/gcc/xgcc -B[...]/build-gcc/gcc/
[...]/source-gcc/libgomp/testsuite/libgomp.oacc-c/../libgomp.oacc-c-c++-
On 10/12/15 14:14, Tom de Vries wrote:
[ copy-pasting-with-quote from
https://gcc.gnu.org/ml/gcc-patches/2015-12/msg00420.html , for some
reason I didn't get this email ]
On Thu, 3 Dec 2015, Tom de Vries wrote:
The flag is set here in expand_omp_target:
...
12682 /* Prevent IPA from re
I think this caused PR68932 - FAIL:
obj-c++.dg/property/at-property-23.mm -fgnu-runtime (internal compiler
error)
Sorry about that. I'll look into it today.
Martin
I think this caused PR68932 - FAIL:
obj-c++.dg/property/at-property-23.mm -fgnu-runtime (internal compiler
error)
Sorry about that. I'll look into it today.
Martin
OK.
Jason
On 16.12.2015 05:59, Bernd Edlinger wrote:
> Hi,
>
> On 16.12.2015 00:55 Bernd Schmidt wrote:
>> On 12/15/2015 10:13 PM, Bernd Edlinger wrote:
>>> due to recent discussion on the basic asm, and the special handling
>>> of ASM_INPUT in ia64, I tried to build a bare-metal cross-compiler
>>> for ia6
On 10/09/15 12:28, Jiong Wang wrote:
TLS instruction sequences are always with fixed format, there is no need
to use operand modifier, we can hardcode the relocation modifiers into
instruction pattern, all those redundant checks in aarch64_print_operand
can be removed.
OK for trunk?
2015-09-1
On Wed, Dec 16, 2015 at 10:04:05AM -0500, David Malcolm wrote:
> On Wed, 2015-12-16 at 15:58 +0100, Marek Polacek wrote:
> > The following improves the location for "statement with no effect" warning
> > by
> > using the location of the expression if available. Can't use EXPR_LOCATION
> > as
> >
On Wed, 2015-12-16 at 16:09 +0100, Marek Polacek wrote:
> On Wed, Dec 16, 2015 at 10:04:05AM -0500, David Malcolm wrote:
> > On Wed, 2015-12-16 at 15:58 +0100, Marek Polacek wrote:
> > > The following improves the location for "statement with no effect"
> > > warning by
> > > using the location of
On Wed, 2015-12-16 at 15:58 +0100, Marek Polacek wrote:
> The following improves the location for "statement with no effect" warning by
> using the location of the expression if available. Can't use EXPR_LOCATION as
> *_DECLs still don't carry a location.
Out of interest, does it emit sane underl
The following patch adds a heuristic to prefer store/load-lanes
over SLP when vectorizing. Compared to the variant attached to
the PR I made the STMT_VINFO_STRIDED_P behavior explicit (matching
what you've tested).
It's a heuristic that may end up vectorizing less loops or loops
in a less optima
On Fri, Dec 04, 2015 at 09:30:45AM +, Kyrill Tkachov wrote:
> Hi all,
>
> We don't handle properly the patterns for the [us]bfiz and [us]bfx
> instructions when they
> have an extend+ashift form. For example, the
> *_ashl pattern.
> This leads to rtx costs recuring into the extend and assign
The following improves the location for "statement with no effect" warning by
using the location of the expression if available. Can't use EXPR_LOCATION as
*_DECLs still don't carry a location.
Bootstrapped/regtested on x86_64-linux, ok for trunk?
2015-12-16 Marek Polacek
PR c/64637
On Tue, Dec 08, 2015 at 09:21:29AM +, Kyrill Tkachov wrote:
> Hi all,
>
> The test gcc.target/aarch64/vbslq_u64_1.c started failing recently due to
> some tree-level changes.
> This just exposed a deficiency in our xor-and-xor pattern for the vector
> bit-select pattern:
> aarch64_simd_bsl_i
This extends the previous fix for the CFG cleanup issue WRT dead SSA
defs to properly avoid doing sth fancy with conditons in the first pass.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied.
Richard.
2015-12-16 Richard Biener
PR tree-optimization/68870
* tree-cf
On 16/12/15 14:16, Richard Biener wrote:
On Mon, 14 Dec 2015, Tom de Vries wrote:
On 14/12/15 14:26, Richard Biener wrote:
On Sun, 13 Dec 2015, Tom de Vries wrote:
On 11/12/15 14:00, Richard Biener wrote:
On Fri, 11 Dec 2015, Tom de Vries wrote:
On 13/11/15 12:39, Jakub Jelinek wrote:
We
On Wed, Dec 16, 2015 at 3:36 PM, Yuri Rumyantsev wrote:
> Richard,
>
> Here is updated patch which includes (1) a test on exit proposed by
> you and (2) another test from PR68021 which is caught by new check on
> counted loop. Outer-loop unswitching is not performed for both new
> tests.
As said
On Tue, Dec 15, 2015 at 11:17:35AM +, Wilco Dijkstra wrote:
> ping
>
> > -Original Message-
> > From: Wilco Dijkstra [mailto:wdijk...@arm.com]
> > Sent: 28 October 2015 17:33
> > To: GCC Patches
> > Subject: [PATCH][AArch64] Avoid emitting zero immediate as zero register
> >
> > Sever
Richard,
Here is updated patch which includes (1) a test on exit proposed by
you and (2) another test from PR68021 which is caught by new check on
counted loop. Outer-loop unswitching is not performed for both new
tests.
Bootstrapping and regression testing did not show any new failures.
Is it O
On Wed, Dec 16, 2015 at 01:05:21PM +, Wilco Dijkstra wrote:
> James Greenhalgh wrote:
> > On Tue, Dec 15, 2015 at 10:54:49AM +, Wilco Dijkstra wrote:
> > > ping
> > >
> > > > -Original Message-
> > > > From: Wilco Dijkstra [mailto:wilco.dijks...@arm.com]
> > > > Sent: 06 November 20
Dominik Vogt wrote:
> On Wed, Dec 16, 2015 at 01:51:45PM +0100, Ulrich Weigand wrote:
> > Dominik Vogt wrote:
> > > > r2 through r4 should be fine. [ Not sure if there will be many (any?)
> > > > cases
> > > > where one of those is unused but r5 isn't, however. ]
> > >
> > > This can happen if t
PTX's machine_function structure squirrels away the function type to calculate
the presence of varadic args later, rather than calculate it immediately. It
also uses an rtx field as a boolean. This patch reorganizes it with less
verbose names and more apt types.
I also noticed that nvptx_h
On Wed, Dec 16, 2015 at 01:51:45PM +0100, Ulrich Weigand wrote:
> Dominik Vogt wrote:
> > > r2 through r4 should be fine. [ Not sure if there will be many (any?)
> > > cases
> > > where one of those is unused but r5 isn't, however. ]
> >
> > This can happen if the function only uses register pai
Hello,
ix86_target_macros_internal () contains duplicated check of `clzero'
option.
I've committed to main trunk as obvious patch in the bottom.
gcc/
* config/i386/i386-c.c (ix86_target_macros_internal): Remove
duplicate check (__CLZERO__).
--
Thanks, K
Index: gcc/config/i386/i38
On Tue, Dec 15, 2015 at 12:06 AM, Steve Ellcey wrote:
> On Mon, 2015-12-14 at 09:57 +0100, Richard Biener wrote:
>
>> I don't know enough to assess the effect of this but
>>
>> 1) not all archs can do auto-incdec so either the comment is misleading
>> or the test should probably be amended
>> 2)
Hi,
This is an update of my previous patch. Cesar (thanks!)
pointed out some issues with the original patch that
have now been addressed.
Regtested on x86_64
OK for trunk?
Thanks!
Jim
diff --git a/gcc/fortran/openmp.c b/gcc/fortran/openmp.c
index 276f2f1..9350dc4 100644
--- a/gcc/fortran/ope
The following fixes the SLP miscompile in PR68861 which happens because
we didn't think of stmts appering multiple times in a SLP node when
doing the operand swapping support.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk.
Richard.
2015-12-16 Richard Biener
P
On Fri, Dec 11, 2015 at 3:03 PM, Yuri Rumyantsev wrote:
> Richard.
> Thanks for your review.
> I re-designed fix for assert by adding additional checks for vector
> comparison with boolean result to fold_binary_op_with_conditional_arg
> and remove early exit to combine_cond_expr_cond.
> Unfortunat
Hi,
Attached is the patch to add OpenACC documentation for libgomp.
Ok to commit to trunk?
Thanks!
Jim
Index: libgomp.texi
===
--- libgomp.texi (revision 231662)
+++ libgomp.texi (working copy)
@@ -94,10 +94,25 @@
@comment better
On Thu, Dec 10, 2015 at 1:27 AM, Kugan
wrote:
> Hi Riachard,
>
> Thanks for the reviews.
>
> I think since we have some unresolved issues here, it is best to aim for
> the next stage1. I however would like any feedback so that I can
> continue to improve this.
Yeah, sorry I've been distracted lat
On 12/16/2015 12:54 PM, Ajit Kumar Agarwal wrote:
/* If there is a call in the loop body, the call-clobbered registers
are not available for loop invariants. */
+
if (call_p)
available_regs = available_regs - target_clobbered_regs;
-
+
/* If we have enough registers, we
On Mon, 14 Dec 2015, Tom de Vries wrote:
> On 14/12/15 14:26, Richard Biener wrote:
> > On Sun, 13 Dec 2015, Tom de Vries wrote:
> >
> > > On 11/12/15 14:00, Richard Biener wrote:
> > > > On Fri, 11 Dec 2015, Tom de Vries wrote:
> > > >
> > > > > On 13/11/15 12:39, Jakub Jelinek wrote:
> > > > >
James Greenhalgh wrote:
> On Tue, Dec 15, 2015 at 10:54:49AM +, Wilco Dijkstra wrote:
> > ping
> >
> > > -Original Message-
> > > From: Wilco Dijkstra [mailto:wilco.dijks...@arm.com]
> > > Sent: 06 November 2015 20:06
> > > To: 'gcc-patches@gcc.gnu.org'
> > > Subject: [PATCH][AArch64] A
On Wed, Dec 16, 2015 at 1:14 PM, Yuri Rumyantsev wrote:
> Hi All,
>
> Here is simple patch which cures the issue with outer-loop unswitching
> - added invocation of number_of_latch_executions() to reject
> unswitching for non-iterated loops.
>
> Bootstrapping and regression testing did not show an
Dominik Vogt wrote:
> On Mon, Dec 14, 2015 at 04:08:32PM +0100, Ulrich Weigand wrote:
> > I don't think that r1 is actually safe here. Note that it may be used
> > (unconditionally) as temp register in s390_emit_prologue in certain cases;
> > the upcoming split-stack code will also need to use r1
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