Re: [PATCH, AArch64] Support BICS instruction in the backend

2013-05-01 Thread Marcus Shawcroft
On 1 May 2013, at 21:12, "Ian Bolton" wrote: >> Can we have the patch attached ? > > OK > OK /Marcus

Re: [PATCH, AArch64] Fix for LDR/STR to/from S and D registers

2013-05-01 Thread Marcus Shawcroft
On 1 May 2013, at 19:41, "Ian Bolton" wrote: > This is a fix for this patch: > http://gcc.gnu.org/ml/gcc-patches/2013-04/msg01621.html > > If someone compiles with -mgeneral-regs-only then those instructions > shouldn't be used. We can enforce that by adding the fp attribute to > the relevant a

[committed] Add testcase from PR57131

2013-05-01 Thread Jakub Jelinek
Hi! This got fixed by Vlad in PR57097, I've committed the testcase as obvious (so far to trunk, because the fix hasn't been backported to 4.8 branch yet, will commit there too afterwards). 2013-05-02 Jakub Jelinek PR rtl-optimization/57131 * gcc.c-torture/execute/pr57131.c: Ne

RE: [PATCH, ARM, iWMMXT] PR target/54338 - Include IWMMXT_GR_REGS in ALL_REGS

2013-05-01 Thread Xinyu Qi
At 2013-04-30 18:45:42,"Matthew Gretton-Dann" wrote: > Hi, > > On 08/04/13 06:28, Xinyu Qi wrote: > > At 2013-04-02 17:50:03,"Ramana Radhakrishnan" > wrote: > >> On 04/02/13 10:40, Xinyu Qi wrote: > >>> Hi, > >>> According to Vladimir Makarov's analysis, the root cause of PR > target/54338

Re: [Patch, testsuite] Require scheduling support for test that uses -fschedule-insns

2013-05-01 Thread Mike Stump
On May 1, 2013, at 2:40 AM, Senthil Kumar Selvaraj wrote: > gcc.dg/torture/alias-1.c specifies -fschedule-insns in its dg-options, > and this causes it to fail for targets that don't support that option. > > This patch makes the test unsupported for those targets. Ok.

Re: RFC: PATCH to avoid linking multiple front ends at once with parallel make

2013-05-01 Thread Mike Stump
On Apr 30, 2013, at 7:02 PM, Jason Merrill wrote: > Releasing the lock is not reliable; if the user interrupts the link with ^C, > the lock will remain. So I adjusted 'make all' to remove the lock early on, > though that only works for the typical case, and users that do something like > 'make

FW: Fortran Compiler Hangs

2013-05-01 Thread Iyer, Balaji V
Hello Everyone, Sorry for the repost, but when I downloaded the trunk, then configured with just the prefix option in the build directory and tried to compile it (both make and make -j8), the Fortran compiler seem to hang. I am not using the Fortran compiler, but the build script seem t

[c++-concepts] Merge from trunk

2013-05-01 Thread Gabriel Dos Reis
Trunk was merged into the c++-concept branch as of revision 198506. -- Gaby

Re: Patch ping - Add a new option "-fstack-protector-strong"

2013-05-01 Thread Jeff Law
On 04/26/2013 10:45 AM, Han Shen(沈涵) wrote: Hi, I'd like to ping the patch '-fstack-protector-strong': - http://gcc.gnu.org/ml/gcc-patches/2013-04/msg00945.html Add a new option '-fstack-protector-strong' to protect only stack-smashing-vulnerable functions. Thanks, H. In cfgexpand.c, plea

[RFA][PATCH] Fix tree-optimization/57124

2013-05-01 Thread Jeff Law
range_fits_type_p erroneously returns true in cases where the range has overflowed. So for example, we might have a range [0, +INF(OVF)] and conclude the range fits in an unsigned type. This in turn can cause VRP to rewrite a conditional in an unsafe way as seen by the testcase. Bootstrap

RE: [PATCH, AArch64] Support BICS instruction in the backend

2013-05-01 Thread Ian Bolton
> Can we have the patch attached ? OK Index: gcc/testsuite/gcc.target/aarch64/bics_1.c === --- gcc/testsuite/gcc.target/aarch64/bics_1.c (revision 0) +++ gcc/testsuite/gcc.target/aarch64/bics_1.c (revision 0) @@ -0,0 +1,107 @@ +/*

Re: [gomp4] Some progress on #pragma omp simd

2013-05-01 Thread Jeff Law
On 05/01/2013 01:53 PM, Aldy Hernandez wrote: I am not sure about the upcoming spec, but as per today's spec vectorlength in pragma simd can have multiple parameters and so I think it would be a good idea to use a max. As discussed here: http://software.intel.com/en-us/forums/topic/391056 "

Re: [gomp4] Some progress on #pragma omp simd

2013-05-01 Thread Aldy Hernandez
I am not sure about the upcoming spec, but as per today's spec vectorlength in pragma simd can have multiple parameters and so I think it would be a good idea to use a max. As discussed here: http://software.intel.com/en-us/forums/topic/391056 "The use of multiple vectorlength arguments is b

[C++ Patch/RFC] PR 52282

2013-05-01 Thread Paolo Carlini
Hi, with the recent fix for c++/57092, we don't ICE anymore on the various testcases part of c++/52282, but we still have problems. An issue I can see - maybe we already discussed it a bit in the past - is that of NOP_EXPRs which I don't fully understand: anyway, with the attached patchlet, t

RE: [gomp4] Some progress on #pragma omp simd

2013-05-01 Thread Iyer, Balaji V
> -Original Message- > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- > ow...@gcc.gnu.org] On Behalf Of Aldy Hernandez > Sent: Wednesday, May 01, 2013 12:02 PM > To: Iyer, Balaji V > Cc: Jakub Jelinek; Richard Henderson; gcc-patches@gcc.gnu.org > Subject: Re: [gomp4] Some progre

Re: [C++ Patch] PR 57132

2013-05-01 Thread Jason Merrill
OK. Jason

patch to fix PR57091

2013-05-01 Thread Vladimir Makarov
The following patch fixes http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57091 The problem was in choosing alternative with AREG class in an insn and AREG lives through the insn (until call insn). Reload chooses alternative with GENERAL_REGS. The problem was solved by tweaking alternative cost

[PATCH, AArch64] Fix for LDR/STR to/from S and D registers

2013-05-01 Thread Ian Bolton
This is a fix for this patch: http://gcc.gnu.org/ml/gcc-patches/2013-04/msg01621.html If someone compiles with -mgeneral-regs-only then those instructions shouldn't be used. We can enforce that by adding the fp attribute to the relevant alternatives in the patterns. Regression tests all good. OK

Re: [PATCH, AArch64] Support BICS instruction in the backend

2013-05-01 Thread Marcus Shawcroft
On 01/05/13 18:45, Ian Bolton wrote: From: Marcus Shawcroft [mailto:marcus.shawcr...@gmail.com] + /* { dg-final { scan-assembler "bics\tx\[0-9\]+, x\[0-9\]+, x\[0- 9\]+" } } */ + /* { dg-final { scan-assembler "bics\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, lsl 3" } } */ Ian, These two patterns have

RE: [PATCH, AArch64] Support BICS instruction in the backend

2013-05-01 Thread Ian Bolton
> From: Marcus Shawcroft [mailto:marcus.shawcr...@gmail.com] > + /* { dg-final { scan-assembler "bics\tx\[0-9\]+, x\[0-9\]+, x\[0- > 9\]+" } } */ > > + /* { dg-final { scan-assembler "bics\tx\[0-9\]+, x\[0-9\]+, > x\[0-9\]+, lsl 3" } } */ > > Ian, These two patterns have the same issue Richard

Re: [GOOGLE] Change function naming to use context function assembler name to replace function id

2013-05-01 Thread Dehao Chen
I see a case when the DECL_ASSEMBLER_NAME has " *INTERNAL* " as the suffix. Dehao On Wed, May 1, 2013 at 9:49 AM, Teresa Johnson wrote: > On Wed, May 1, 2013 at 8:01 AM, Dehao Chen wrote: >> The patch is updated to fix some bugs in the impl. >> >> Thanks, >> Dehao >> >> Index: gcc/l-ipo.c >> ==

Re: [GOOGLE] Change function naming to use context function assembler name to replace function id

2013-05-01 Thread Dehao Chen
I've seen a case when func_id in aux module is not the same (off by 1). This is when -fexception is specified. I had not looked into why though. I'll find out why it is off-by-1 Dehao On Wed, May 1, 2013 at 9:57 AM, Xinliang David Li wrote: > On Tue, Apr 30, 2013 at 4:10 PM, Dehao Chen wrote: >

Re: [GOOGLE] Change function naming to use context function assembler name to replace function id

2013-05-01 Thread Xinliang David Li
On Tue, Apr 30, 2013 at 4:10 PM, Dehao Chen wrote: > This patch changes to use context function name to replace function > id, which is not available in AutoFDO builds. Why isn't func_id not available in autofdo builds? The func-id for the the same function should remain the same regardless wheth

Re: [GOOGLE] Change function naming to use context function assembler name to replace function id

2013-05-01 Thread Teresa Johnson
On Wed, May 1, 2013 at 8:01 AM, Dehao Chen wrote: > The patch is updated to fix some bugs in the impl. > > Thanks, > Dehao > > Index: gcc/l-ipo.c > === > --- gcc/l-ipo.c (revision 198362) > +++ gcc/l-ipo.c (working copy) > @@ -1713,10

RE: [PATCH] [MIPS] Support microMIPS HI/QI moves

2013-05-01 Thread Maciej W. Rozycki
On Mon, 22 Apr 2013, Moore, Catherine wrote: > > Dumb question: what's the difference between "all" and "*" in the > > compression attribute? > > The port defines the compression and enabled attributes like this: > > (define_attr "compression" "none,all,micromips" > (const_string "none")) >

Re: [gomp4] Some progress on #pragma omp simd

2013-05-01 Thread Aldy Hernandez
On 05/01/13 10:58, Iyer, Balaji V wrote: Well, it looks like things are bit simpler than expected. Multiple vectorlength clauses are being deprecated or eliminated in the upcoming spec. So it looks like vectorlength is the same thing as the safelen clause. If you agree then I can get rid of O

RE: [gomp4] Some progress on #pragma omp simd

2013-05-01 Thread Iyer, Balaji V
> -Original Message- > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- > ow...@gcc.gnu.org] On Behalf Of Aldy Hernandez > Sent: Wednesday, May 01, 2013 11:52 AM > To: Jakub Jelinek > Cc: Iyer, Balaji V; Richard Henderson; gcc-patches@gcc.gnu.org > Subject: Re: [gomp4] Some progre

Re: [gomp4] Some progress on #pragma omp simd

2013-05-01 Thread Aldy Hernandez
On 04/24/13 01:01, Jakub Jelinek wrote: On Tue, Apr 23, 2013 at 09:32:29PM +, Iyer, Balaji V wrote: My apologies if the documentation did not explain this correctly. It was written by compiler developers and not language developers. #pragma simd is the guarantee the user gives the c

Re: [AArch64] Support float->int conversions in vector registers.

2013-05-01 Thread Marcus Shawcroft
On 01/05/13 16:09, James Greenhalgh wrote: Hi, The fcvt instructions also have forms which leave their integer result as a scalar in the SIMD register set. This patch adds those alternatives for the lceil family of standard patterns. Regression tested on aarch64-none-elf with no regressions.

[AArch64] Support float->int conversions in vector registers.

2013-05-01 Thread James Greenhalgh
Hi, The fcvt instructions also have forms which leave their integer result as a scalar in the SIMD register set. This patch adds those alternatives for the lceil family of standard patterns. Regression tested on aarch64-none-elf with no regressions. Thanks, James --- 2013-05-01 James Greenha

Re: [GOOGLE] Change function naming to use context function assembler name to replace function id

2013-05-01 Thread Dehao Chen
The patch is updated to fix some bugs in the impl. Thanks, Dehao Index: gcc/l-ipo.c === --- gcc/l-ipo.c (revision 198362) +++ gcc/l-ipo.c (working copy) @@ -1713,10 +1713,11 @@ static tree create_unique_name (tree decl, unsigned mod

Re: [gomp4] Some progress on #pragma omp simd

2013-05-01 Thread Aldy Hernandez
On 04/28/13 09:45, Iyer, Balaji V wrote: One more question Balaji, the Cilk Plus spec says that for #pragma simd, the private, firstprivate, lastprivate, and reduction clauses are as OpenMP. However, for <#omp simd>, there is no firstprivate in the OpenMP 4.0rc2 spec. Is the firstprivate clause

Re: [AArch64] Rewrite v_<8, 16, 32, 64> intrinsics using builtins.

2013-05-01 Thread Marcus Shawcroft
OK /Marcus On 1 May 2013 12:01, James Greenhalgh wrote: > > Hi, > > This patch takes the v_<8, 16, 32, 64> intrinsics > and rewrites them using builtins. > > We also add a new compile and execute test for the maximum and minimum > reductions. > > Regression tested on aarch64-none-elf with no regr

Re: [google/gcc-4_8] Fix libatomic testsuite for when GCC_UNDER_TEST is not plain xgcc

2013-05-01 Thread Ollie Wild
On Wed, May 1, 2013 at 9:04 AM, Simon Baldwin wrote: > Fix libatomic testsuite for when GCC_UNDER_TEST is not plain xgcc. > > Libatomic tests fail if GCC_UNDER_TEST is set to something other than a plain > xgcc invocation (for example, when $CC requires a special -sysroot). Fix > testsuite files

[google/gcc-4_8] Fix libatomic testsuite for when GCC_UNDER_TEST is not plain xgcc

2013-05-01 Thread Simon Baldwin
Fix libatomic testsuite for when GCC_UNDER_TEST is not plain xgcc. Libatomic tests fail if GCC_UNDER_TEST is set to something other than a plain xgcc invocation (for example, when $CC requires a special -sysroot). Fix testsuite files so that it uniformly uses CC_UNDER_TEST rather than any result

RFA: RL78: Improve interrupt function generation

2013-05-01 Thread Nick Clifton
Hi DJ, The patch below makes some changes to the way the RL78 backend handles the generation of interrupt functions. Specifically it: * Uses register bank 3 instead of register bank 0 inside the handler. * Tweaks the need_to_save() function so only those registers that w

[C++ Patch] PR 57132

2013-05-01 Thread Paolo Carlini
Hi, in tsubst_copy_and_build, particularly so after c++/11856, we are already wrapping the evaluation of most expressions in ++c_inhibit_evaluation_warnings/--c_inhibit_evaluation_warnings, but we are failing to do so in case MODOP_EXPR. Tested x86_64-linux. Ok for mainline? Thanks, Paolo.

[AArch64] Rewrite v_<8, 16, 32, 64> intrinsics using builtins.

2013-05-01 Thread James Greenhalgh
Hi, This patch takes the v_<8, 16, 32, 64> intrinsics and rewrites them using builtins. We also add a new compile and execute test for the maximum and minimum reductions. Regression tested on aarch64-none-elf with no regressions. Thanks, James --- gcc/ 2013-05-01 James Greenhalgh

Re: [PATCH,ARM] Internal memcpy using LDRD/STRD

2013-05-01 Thread Richard Earnshaw
On 30/04/13 18:18, Greta Yorsh wrote: This patch for gcc's internal memcpy emits LDRD/STRD whenever possible, if prefer_ldrd_strd field is set in tune_params. It uses DImode moves in both ARM and Thumb modes. The generic move_by_pieces implementation cannot be used as is to generate the same in

RE: [PATCH, AArch64] Testcases for ANDS instruction

2013-05-01 Thread Ian Bolton
> From: Richard Earnshaw > This rule > > + /* { dg-final { scan-assembler "and\tw\[0-9\]+, w\[0-9\]+, w\[0- > 9\]+" } } */ > > Will match anything that this rule > > > + /* { dg-final { scan-assembler "and\tw\[0-9\]+, w\[0-9\]+, w\[0- > 9\]+, lsl 3" } } */ > > matches (though not vice versa).

[Patch, testsuite] Require scheduling support for test that uses -fschedule-insns

2013-05-01 Thread Senthil Kumar Selvaraj
gcc.dg/torture/alias-1.c specifies -fschedule-insns in its dg-options, and this causes it to fail for targets that don't support that option. This patch makes the test unsupported for those targets. If ok, could someone apply please? I don't have commit access. Regards Senthil gcc/testsuite/Ch

Re: [PATCH][ARM] Fix PR 56809

2013-05-01 Thread Richard Earnshaw
On 30/04/13 17:53, Kyrylo Tkachov wrote: -Original Message- From: Ramana Radhakrishnan Sent: 03 April 2013 16:16 To: Kyrylo Tkachov Cc: GCC Patches Subject: Re: [PATCH][ARM] Fix PR 56809 On 04/03/13 16:07, Kyrylo Tkachov wrote: Hi all, This patch fixes an ICE that we encounter when bui

Re: [Patch, ARM][11/n] Split patterns that output multiple assembly instructions - thumb2.md

2013-05-01 Thread Richard Earnshaw
On 30/04/13 17:37, Greta Yorsh wrote: This patch continues to clean up patterns that output multiple assembly instructions. It handles most of the patterns in thumb2.md. The following patterns are not split: thumb2_movcond, thumb2_cond_move - complex, maybe later. tls_load_dot_plus_four -

Re: [patch, fortran, committed] Change 1**k to 1

2013-05-01 Thread Thomas Koenig
Hi Steve, s/cand/and Fixed, thanks. Thomas

Re: [Patch][google/gcc-4_8] Fix arm build broken

2013-05-01 Thread Diego Novillo
On 2013-04-24 19:11 , Han Shen(沈涵) wrote: ARM build (on chrome) is broken. This patch fixed the problem. Tested by building arm cross compiler successfully. * gcc/config/config.cc: Removed duplicated header files which causes error in generating gtyp-input.list. * gcc