[gcc r16-688] c++/modules: Clean up importer_interface

https://gcc.gnu.org/g:c875748cdc468ec604c904e19a688998aa4d7a1f commit r16-688-gc875748cdc468ec604c904e19a688998aa4d7a1f Author: Nathaniel Shead Date: Fri Mar 28 23:30:31 2025 +1100 c++/modules: Clean up importer_interface This patch removes some no longer needed special casing in

[gcc r16-699] Forwprop: add a debug dump after propagate into comparison does something

https://gcc.gnu.org/g:ead0a713aa6c7657b18c684aefb8fb97bd3fe017 commit r16-699-gead0a713aa6c7657b18c684aefb8fb97bd3fe017 Author: Andrew Pinski Date: Wed May 14 20:41:22 2025 -0700 Forwprop: add a debug dump after propagate into comparison does something I noticed that fowprop does

[gcc] Created branch 'riscv/heads/gcc-15-with-riscv-opts' in namespace 'refs/vendors'

The branch 'riscv/heads/gcc-15-with-riscv-opts' was created in namespace 'refs/vendors' pointing to: e968c7311c62... Alpha: Fix base block alignment calculation regression

[gcc r16-705] Update cpplib es.po

https://gcc.gnu.org/g:71fb2e6b0ee5f2650fcf9d6066f362a92bb7d4c6 commit r16-705-g71fb2e6b0ee5f2650fcf9d6066f362a92bb7d4c6 Author: Joseph Myers Date: Fri May 16 18:40:24 2025 + Update cpplib es.po * es.po: Update. Diff: --- libcpp/po/es.po | 60 +

[gcc r16-692] forwprop: Add alias walk limit to optimize_memcpy_to_memset.

https://gcc.gnu.org/g:6d4e8847f74d3c7f8e36f64d009dd0d856826533 commit r16-692-g6d4e8847f74d3c7f8e36f64d009dd0d856826533 Author: Andrew Pinski Date: Mon Apr 21 13:00:19 2025 -0700 forwprop: Add alias walk limit to optimize_memcpy_to_memset. As sugguested in https://gcc.gnu.org/pip

[gcc r15-9693] Update cpplib es.po

https://gcc.gnu.org/g:9fa72d779246c1196d7a5cb43c78f272a4367ec2 commit r15-9693-g9fa72d779246c1196d7a5cb43c78f272a4367ec2 Author: Joseph Myers Date: Fri May 16 18:41:15 2025 + Update cpplib es.po * es.po: Update. Diff: --- libcpp/po/es.po | 60

[gcc/devel/omp/gcc-15] ChangeLog.omp bump

changed, 17 insertions(+), 1 deletion(-) diff --git a/gcc/DATESTAMP.omp b/gcc/DATESTAMP.omp index 63e8d5b6f5bd..e01bdfb865b5 100644 --- a/gcc/DATESTAMP.omp +++ b/gcc/DATESTAMP.omp @@ -1 +1 @@ -20250515 +20250516 diff --git a/libgomp/ChangeLog.omp b/libgomp/ChangeLog.omp index e06fdeebc92c

[gcc/devel/omp/gcc-15] OpenMP: Fix mapping of zero-sized arrays with non-literal size: map(var[:n]), n = 0

https://gcc.gnu.org/g:d12326bd889cfcfa1e6aac8ca827fa97b578dba9 commit d12326bd889cfcfa1e6aac8ca827fa97b578dba9 Author: Tobias Burnus Date: Wed May 14 20:06:49 2025 +0200 OpenMP: Fix mapping of zero-sized arrays with non-literal size: map(var[:n]), n = 0 For map(ptr[:0]), the used

[gcc r16-700] libstdc++: Use __is_invocable/nothrow_invocable builtins more

https://gcc.gnu.org/g:259154325688cbfe6d3b50e91dbd6b997a969d6d commit r16-700-g259154325688cbfe6d3b50e91dbd6b997a969d6d Author: Patrick Palka Date: Fri May 16 13:06:04 2025 -0400 libstdc++: Use __is_invocable/nothrow_invocable builtins more As a follow-up to r15-1253 and r15-1254

[gcc r16-701] aarch64: Fix an oversight in aarch64_evpc_reencode

https://gcc.gnu.org/g:d77c3bc1c35e3032b91648dbef4e0ef1f6020017 commit r16-701-gd77c3bc1c35e3032b91648dbef4e0ef1f6020017 Author: Pengxuan Zheng Date: Thu May 15 17:52:29 2025 -0700 aarch64: Fix an oversight in aarch64_evpc_reencode Some fields (e.g., zero_op0_p and zero_op1_p) of t

[gcc r16-702] aarch64: Recognize vector permute patterns which can be interpreted as AND [PR100165]

https://gcc.gnu.org/g:dc501cb0dc857663f7fa762f3dbf0ae60973d2c3 commit r16-702-gdc501cb0dc857663f7fa762f3dbf0ae60973d2c3 Author: Pengxuan Zheng Date: Wed May 7 10:47:37 2025 -0700 aarch64: Recognize vector permute patterns which can be interpreted as AND [PR100165] Certain permute

[gcc r16-703] aarch64: Optimize AND with certain vector of immediates as FMOV [PR100165]

https://gcc.gnu.org/g:0417a630811404c2362060b7e15f99e5a4a0d76a commit r16-703-g0417a630811404c2362060b7e15f99e5a4a0d76a Author: Pengxuan Zheng Date: Mon May 12 10:12:11 2025 -0700 aarch64: Optimize AND with certain vector of immediates as FMOV [PR100165] We can optimize AND with c

[gcc r16-704] aarch64: Add more vector permute tests for the FMOV optimization [PR100165]

https://gcc.gnu.org/g:265fdb3fa91346f1be40111a9f3e8a0838f7d7fd commit r16-704-g265fdb3fa91346f1be40111a9f3e8a0838f7d7fd Author: Pengxuan Zheng Date: Mon May 12 10:21:49 2025 -0700 aarch64: Add more vector permute tests for the FMOV optimization [PR100165] This patch adds more test

[gcc r16-689] c++: Set the outer brace marker for missed cases.

https://gcc.gnu.org/g:689bc394efe9e042acb37799deec6568c0f63a45 commit r16-689-g689bc394efe9e042acb37799deec6568c0f63a45 Author: Iain Sandoe Date: Sat May 10 17:12:44 2025 +0100 c++: Set the outer brace marker for missed cases. In some cases, a function might be declared as FUNCTIO

[gcc r16-690] c++, coroutines: Allow NVRO in more cases for ramp functions.

https://gcc.gnu.org/g:d87caa9d3595ca845c9282cef8b0c9a656d8def0 commit r16-690-gd87caa9d3595ca845c9282cef8b0c9a656d8def0 Author: Iain Sandoe Date: Sat May 10 17:22:55 2025 +0100 c++, coroutines: Allow NVRO in more cases for ramp functions. The constraints of the c++ coroutines spec

[gcc r16-684] Automatic replacement of get_insns/end_sequence pairs

https://gcc.gnu.org/g:4dd13988c93c24ba3605f4b9cafc97515c34f2ac commit r16-684-g4dd13988c93c24ba3605f4b9cafc97515c34f2ac Author: Richard Sandiford Date: Fri May 16 13:24:01 2025 +0100 Automatic replacement of get_insns/end_sequence pairs This is the result of using a regexp to repl

[gcc r16-685] Automatic replacement of end_sequence/return pairs

https://gcc.gnu.org/g:e11ca9bc8c444b2a2fb12f8c1c2e4e203adeb39a commit r16-685-ge11ca9bc8c444b2a2fb12f8c1c2e4e203adeb39a Author: Richard Sandiford Date: Fri May 16 13:24:02 2025 +0100 Automatic replacement of end_sequence/return pairs This is the result of using a regexp to replace

[gcc r16-686] Manual tweak of some end_sequence callers

https://gcc.gnu.org/g:1b9c907a4c9f3a89970e5295c69aefa23a133958 commit r16-686-g1b9c907a4c9f3a89970e5295c69aefa23a133958 Author: Richard Sandiford Date: Fri May 16 13:24:03 2025 +0100 Manual tweak of some end_sequence callers This patch mops up obvious redundancies that weren't cau

[gcc r16-687] c++: one more coro test tweak

https://gcc.gnu.org/g:e8404a95e3e5c9e297dfeb8175f9ebd52afe4410 commit r16-687-ge8404a95e3e5c9e297dfeb8175f9ebd52afe4410 Author: Jason Merrill Date: Fri May 16 08:22:08 2025 -0400 c++: one more coro test tweak After my r16-670, running the testsuite with explicit --stds didn't run

[gcc r16-683] Make end_sequence return the insn sequence

https://gcc.gnu.org/g:84269eeecf3c31a7f6be1f210f5e6c38d0c01e31 commit r16-683-g84269eeecf3c31a7f6be1f210f5e6c38d0c01e31 Author: Richard Sandiford Date: Fri May 16 13:24:01 2025 +0100 Make end_sequence return the insn sequence The start_sequence/end_sequence interface was a big imp

[gcc r16-696] ipa: Dump cgraph_node UID instead of order into ipa-clones dump file

https://gcc.gnu.org/g:9fa534f0831892393885e64596a0d6ca8c4078b6 commit r16-696-g9fa534f0831892393885e64596a0d6ca8c4078b6 Author: Martin Jambor Date: Fri May 16 17:13:51 2025 +0200 ipa: Dump cgraph_node UID instead of order into ipa-clones dump file Since starting from GCC 15 the or

[gcc r16-707] RISC-V: Avoid scalar unsigned SAT_ADD test data duplication

https://gcc.gnu.org/g:83477c3f6650429a7cdcb1b6da950c421aa2f77d commit r16-707-g83477c3f6650429a7cdcb1b6da950c421aa2f77d Author: Pan Li Date: Fri May 16 15:34:51 2025 +0800 RISC-V: Avoid scalar unsigned SAT_ADD test data duplication Some of the previous scalar unsigned SAT_ADD test

[gcc(refs/users/aoliva/heads/testme)] [testsuite] [x86] forwprop-41 needs -msse

https://gcc.gnu.org/g:bd3a1698ab90e285580d8dfc49c07b74b092e407 commit bd3a1698ab90e285580d8dfc49c07b74b092e407 Author: Alexandre Oliva Date: Fri May 16 07:52:57 2025 -0300 [testsuite] [x86] forwprop-41 needs -msse The vector operations are only turned into BIT_INSERT_EXPR with -ms

[gcc r16-694] aarch64: Fix narrowing warning in driver-aarch64.cc [PR118603]

https://gcc.gnu.org/g:dca6f3534d2b6c52cecc770c40b204fb5e4a12b3 commit r16-694-gdca6f3534d2b6c52cecc770c40b204fb5e4a12b3 Author: Andrew Pinski Date: Fri May 9 21:13:48 2025 -0700 aarch64: Fix narrowing warning in driver-aarch64.cc [PR118603] Since the AARCH64_CORE defines in aarch6

[gcc r16-695] Further simplify the stdlib inline folding

https://gcc.gnu.org/g:fa365450352ae5cc7c0078e37e641341fb48e6b6 commit r16-695-gfa365450352ae5cc7c0078e37e641341fb48e6b6 Author: Ville Voutilainen Date: Thu May 15 16:26:52 2025 +0300 Further simplify the stdlib inline folding gcc/cp/ChangeLog: * cp-gimplify.cc (cp_fold

[gcc r16-693] aarch64: Fix narrowing warning in aarch64_detect_vector_stmt_subtype

https://gcc.gnu.org/g:60e24acbcd7e7fb844d0e98885f20f3fb1f49f0b commit r16-693-g60e24acbcd7e7fb844d0e98885f20f3fb1f49f0b Author: Andrew Pinski Date: Fri May 9 20:56:42 2025 -0700 aarch64: Fix narrowing warning in aarch64_detect_vector_stmt_subtype There is a narrowing warning in aa

[gcc/aoliva/heads/testme] (206 commits) [testsuite] [x86] vect-simd-clone-1[678]e.c adjust

The branch 'aoliva/heads/testme' was updated to point to: 64388b09fdcf... [testsuite] [x86] vect-simd-clone-1[678]e.c adjust It previously pointed to: 7233c056b80d... [testsuite] [ppc] adjust vsx-builtin-7.c xxpermdi/rldic cou Diff: !!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE

[gcc(refs/users/aoliva/heads/testme)] [testsuite] [vxworks] tolerate missing __atomic_feraiseexcept

https://gcc.gnu.org/g:c9fceb8f580da58efbc6d483522156a91240c810 commit c9fceb8f580da58efbc6d483522156a91240c810 Author: Alexandre Oliva Date: Thu May 15 05:11:06 2025 -0300 [testsuite] [vxworks] tolerate missing __atomic_feraiseexcept vxworks' libatomic comes from its libc, and it'

[gcc/aoliva/heads/testbase] (189 commits) OpenMP/Fortran: Fix allocatable-component mapping of derive

The branch 'aoliva/heads/testbase' was updated to point to: f99017c3125f... OpenMP/Fortran: Fix allocatable-component mapping of derive It previously pointed to: 9b13bea07706... Canonicalize vec_merge in simplify_ternary_operation Diff: Summary of changes (added commits): ---

[gcc(refs/users/aoliva/heads/testme)] [testsuite] [arm] add -mno-long-calls

https://gcc.gnu.org/g:ee3453db4c83bf90c7fe5244771c0467fcf3ec26 commit ee3453db4c83bf90c7fe5244771c0467fcf3ec26 Author: Alexandre Oliva Date: Thu May 15 05:11:11 2025 -0300 [testsuite] [arm] add -mno-long-calls Various arm tests, specifically epilog-1.c and fp16-aapcs-*.c, need

[gcc(refs/users/aoliva/heads/testme)] [testsuite] [arm] require fpic for pr115485

https://gcc.gnu.org/g:d89ccafb174db78992b076cd5f9035c1ad6cceed commit d89ccafb174db78992b076cd5f9035c1ad6cceed Author: Alexandre Oliva Date: Thu May 15 05:11:15 2025 -0300 [testsuite] [arm] require fpic for pr115485 The pr115485.C testcase uses -fPIE, so it needs to state a PIC

[gcc(refs/users/aoliva/heads/testme)] [testsuite] [x86] double copysign requires -msse2

https://gcc.gnu.org/g:eb3366e3eca592a20c86a4292ba4e48bce44d423 commit eb3366e3eca592a20c86a4292ba4e48bce44d423 Author: Alexandre Oliva Date: Fri May 16 07:45:42 2025 -0300 [testsuite] [x86] double copysign requires -msse2 SSE_FLOAT_MODE_P only holds for DFmode with SSE2, and that'

[gcc(refs/users/aoliva/heads/testme)] [testsuite] add missing require vect_early_break_hw for vect-tsvc

https://gcc.gnu.org/g:c7a859a7ee5307716be48d0d04a40b932ba45d90 commit c7a859a7ee5307716be48d0d04a40b932ba45d90 Author: Alexandre Oliva Date: Fri May 16 07:53:13 2025 -0300 [testsuite] add missing require vect_early_break_hw for vect-tsvc Some tsvc tests add vect_early_break option

[gcc(refs/users/aoliva/heads/testme)] [testsuite] [x86] pr108938-3.c needs -msse2 for bswap in foo2 with -m32

https://gcc.gnu.org/g:4a4bd7e5716c542bea3a3f559837443ebfca79fb commit 4a4bd7e5716c542bea3a3f559837443ebfca79fb Author: Alexandre Oliva Date: Fri May 16 07:53:39 2025 -0300 [testsuite] [x86] pr108938-3.c needs -msse2 for bswap in foo2 with -m32 Without SSE2, we don't combine the se

[gcc(refs/users/aoliva/heads/testme)] [testsuite] [ppc] add -mpowerpc-gfxopt or -mcmpb to copysign tests

https://gcc.gnu.org/g:5d1d9e9a8c367fd2eef7e4bc9ff4d7d236517815 commit 5d1d9e9a8c367fd2eef7e4bc9ff4d7d236517815 Author: Alexandre Oliva Date: Thu May 8 20:18:19 2025 -0300 [testsuite] [ppc] add -mpowerpc-gfxopt or -mcmpb to copysign tests When it comes to ifn_copysign on ppc, for S

[gcc(refs/users/aoliva/heads/testme)] [testsuite] tolerate missing std::stold

https://gcc.gnu.org/g:91567f852bf94671d0e30e867ae9e4ba87ccb86b commit 91567f852bf94671d0e30e867ae9e4ba87ccb86b Author: Alexandre Oliva Date: Thu May 15 05:11:23 2025 -0300 [testsuite] tolerate missing std::stold basic_string.h doesn't define the non-w string version of std::stold

[gcc(refs/users/aoliva/heads/testme)] [testsuite] [aarch64] match alt cache clear names in sme nonlocal_goto tests

https://gcc.gnu.org/g:9c0562eaef901a32e48b205d7484f7256cac01fd commit 9c0562eaef901a32e48b205d7484f7256cac01fd Author: Alexandre Oliva Date: Thu May 15 05:11:30 2025 -0300 [testsuite] [aarch64] match alt cache clear names in sme nonlocal_goto tests vxworks calls cacheTextUpdate in

[gcc(refs/users/aoliva/heads/testme)] [testsuite] [arm] use uint64_t in rwsr tests

https://gcc.gnu.org/g:0f13cbdc730d9056b5af1b328c1a86492f4d92a7 commit 0f13cbdc730d9056b5af1b328c1a86492f4d92a7 Author: Alexandre Oliva Date: Thu May 15 05:11:27 2025 -0300 [testsuite] [arm] use uint64_t in rwsr tests stdint.h defines uint64_t instead of __uint64_t, so use the form

[gcc(refs/users/aoliva/heads/testme)] [testsuite] [x86] vect-simd-clone-1[678]e.c adjust

https://gcc.gnu.org/g:64388b09fdcf0f40f664330f583ffde0202903a4 commit 64388b09fdcf0f40f664330f583ffde0202903a4 Author: Alexandre Oliva Date: Fri May 16 07:59:19 2025 -0300 [testsuite] [x86] vect-simd-clone-1[678]e.c adjust Since r13-6296, we haven't got 4 simdclone calls for these

[gcc(refs/users/aoliva/heads/testme)] [testsuite] [x86] pr31985.c needs -fomit-frame-pointer to match movl count

https://gcc.gnu.org/g:45009ea085022ebc4b1cea387c5746a3b6d07642 commit 45009ea085022ebc4b1cea387c5746a3b6d07642 Author: Alexandre Oliva Date: Fri May 16 07:59:03 2025 -0300 [testsuite] [x86] pr31985.c needs -fomit-frame-pointer to match movl count On an --enable-frame-pointer toolc

[gcc(refs/users/aoliva/heads/testme)] [testsuite] [x86] strlenopt-80 needs -msse2 on ia32

https://gcc.gnu.org/g:27737095d9d2eff025363f031bcacbc1ad73f340 commit 27737095d9d2eff025363f031bcacbc1ad73f340 Author: Alexandre Oliva Date: Fri May 16 07:52:41 2025 -0300 [testsuite] [x86] strlenopt-80 needs -msse2 on ia32 The string length optimizations at 8-byte blocks requires

[gcc(refs/users/aoliva/heads/testme)] [testsuite] [x86] memcpy-6 needs -msse2

https://gcc.gnu.org/g:42834053a4ab2ee0adb5aeb0fcc4aab8b4757419 commit 42834053a4ab2ee0adb5aeb0fcc4aab8b4757419 Author: Alexandre Oliva Date: Fri May 16 07:52:24 2025 -0300 [testsuite] [x86] memcpy-6 needs -msse2 The 8-byte memory operations will only be inlined on ia32 with -m

[gcc(refs/users/aoliva/heads/testme)] [testsuite] require sysconf for vect-early-break_109-pr113588.c

https://gcc.gnu.org/g:72d5ed7a53c8a8dab17494c8593358eab823c3fd commit 72d5ed7a53c8a8dab17494c8593358eab823c3fd Author: Alexandre Oliva Date: Thu May 15 05:50:57 2025 -0300 [testsuite] require sysconf for vect-early-break_109-pr113588.c The test calls sysconf but it doesn't require

[gcc(refs/users/aoliva/heads/testme)] [testsuite] [x86] no-callee-saved-16.c needs -fomit-frame-pointer

https://gcc.gnu.org/g:cbd499db356a42e2cd9fd4f4635acd8d08a3f074 commit cbd499db356a42e2cd9fd4f4635acd8d08a3f074 Author: Alexandre Oliva Date: Fri May 16 07:53:30 2025 -0300 [testsuite] [x86] no-callee-saved-16.c needs -fomit-frame-pointer If the toolchain is built with --enable-fra

[gcc r16-697] MAINTAINERS: add myself to write after approval

https://gcc.gnu.org/g:e211c49f277f9c3d2a9d3031e9d583220e15ae4e commit r16-697-ge211c49f277f9c3d2a9d3031e9d583220e15ae4e Author: Spencer Abson Date: Fri May 16 15:42:44 2025 + MAINTAINERS: add myself to write after approval ChangeLog: * MAINTAINERS: Add myself

[gcc r16-698] cobol: Eliminate exception "blob"; streamline some code generation.

https://gcc.gnu.org/g:92b6485a75cabaf64f1f74ba7ab73a5204c9d0aa commit r16-698-g92b6485a75cabaf64f1f74ba7ab73a5204c9d0aa Author: Robert Dubner Date: Fri May 16 11:12:04 2025 -0400 cobol: Eliminate exception "blob"; streamline some code generation. This eliminates some of the last v

[gcc r15-9692] Alpha: Fix base block alignment calculation regression

https://gcc.gnu.org/g:e968c7311c628f36871b0e0d9cf7f42b5a8956ac commit r15-9692-ge968c7311c628f36871b0e0d9cf7f42b5a8956ac Author: Maciej W. Rozycki Date: Fri May 16 17:18:53 2025 +0100 Alpha: Fix base block alignment calculation regression In determination of base block alignment w

[gcc r16-682] libstdc++: Fix proc check_v3_target_namedlocale for "" locale [PR65909]

https://gcc.gnu.org/g:c07ba5398be194cc390934ae159f7941890bd848 commit r16-682-gc07ba5398be194cc390934ae159f7941890bd848 Author: Jonathan Wakely Date: Thu May 15 16:03:53 2025 +0100 libstdc++: Fix proc check_v3_target_namedlocale for "" locale [PR65909] When the last format argumen

[gcc r16-691] forwprop: Move memcpy_to_memset from gimple fold to forwprop

https://gcc.gnu.org/g:c1cd1889392f0c6bb12a885d14e785d8f3677a1d commit r16-691-gc1cd1889392f0c6bb12a885d14e785d8f3677a1d Author: Andrew Pinski Date: Mon Apr 21 12:19:49 2025 -0700 forwprop: Move memcpy_to_memset from gimple fold to forwprop Since this optimization now walks the vop

[gcc r16-708] RISC-V: Since the loop increment i++ is unreachable, the loop body will never execute more than once

https://gcc.gnu.org/g:55cfd1c8fa2ad2c5d91eadd14daa35f695779a2b commit r16-708-g55cfd1c8fa2ad2c5d91eadd14daa35f695779a2b Author: Jin Ma Date: Fri May 16 15:27:13 2025 +0800 RISC-V: Since the loop increment i++ is unreachable, the loop body will never execute more than once Reporte

[gcc r16-672] RISC-V: Combine vec_duplicate + vsub.vv to vsub.vx on GR2VR cost

https://gcc.gnu.org/g:8814d5d50c6d4103f35545ec934be64a82b70d23 commit r16-672-g8814d5d50c6d4103f35545ec934be64a82b70d23 Author: Pan Li Date: Sun May 11 16:20:28 2025 +0800 RISC-V: Combine vec_duplicate + vsub.vv to vsub.vx on GR2VR cost This patch would like to combine the vec_dup

[gcc r16-680] RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 2

https://gcc.gnu.org/g:a484b523e3e4d78c810bb9a70a86a8fa567378b7 commit r16-680-ga484b523e3e4d78c810bb9a70a86a8fa567378b7 Author: Pan Li Date: Tue May 13 22:47:13 2025 +0800 RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 2 Add asm dump check test for ve

[gcc r16-681] RISC-V: Reuse test name for vx combine test data [NFC]

https://gcc.gnu.org/g:6eead9665eaf0d26aa162000df0aef142c55527e commit r16-681-g6eead9665eaf0d26aa162000df0aef142c55527e Author: Pan Li Date: Tue May 13 22:54:17 2025 +0800 RISC-V: Reuse test name for vx combine test data [NFC] For run test, we have a name like add/sub to indicate

[gcc r16-674] RISC-V: Adjust vx combine test case to avoid name conflict

https://gcc.gnu.org/g:4f4eb9b7dd7dad0eec4eae8443a98eeded4fe070 commit r16-674-g4f4eb9b7dd7dad0eec4eae8443a98eeded4fe070 Author: Pan Li Date: Tue May 13 11:12:53 2025 +0800 RISC-V: Adjust vx combine test case to avoid name conflict Given we will put all vx combine for int8 in a sin

[gcc r16-675] RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 0

https://gcc.gnu.org/g:2e459a5466dc66f90f108418e4cbfd5d2d91daa1 commit r16-675-g2e459a5466dc66f90f108418e4cbfd5d2d91daa1 Author: Pan Li Date: Sun May 11 16:27:48 2025 +0800 RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 0 Add asm dump check and run test

[gcc r16-673] RISC-V: Rename vx_vadd-* testcase to vx-* for all vx combine [NFC]

https://gcc.gnu.org/g:414d8f3d8574ec30e585404d7fc5c7268a006444 commit r16-673-g414d8f3d8574ec30e585404d7fc5c7268a006444 Author: Pan Li Date: Tue May 13 10:00:35 2025 +0800 RISC-V: Rename vx_vadd-* testcase to vx-* for all vx combine [NFC] We would like to arrange all vx combine as

[gcc r16-679] RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 1

https://gcc.gnu.org/g:5f523f6255cc48643adab431839557dc3d73d70f commit r16-679-g5f523f6255cc48643adab431839557dc3d73d70f Author: Pan Li Date: Tue May 13 22:38:57 2025 +0800 RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 1 Add asm dump check test for ve

[gcc r16-678] RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 0

https://gcc.gnu.org/g:621cb3dc9996a160e3e65bce4a8e61da26caafa7 commit r16-678-g621cb3dc9996a160e3e65bce4a8e61da26caafa7 Author: Pan Li Date: Tue May 13 22:32:03 2025 +0800 RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 0 Add asm dump check test for vec

[gcc r16-677] RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 15

https://gcc.gnu.org/g:f8cdcca76f28fae932079ebdf208b7586282369c commit r16-677-gf8cdcca76f28fae932079ebdf208b7586282369c Author: Pan Li Date: Sun May 11 16:32:51 2025 +0800 RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 15 Add asm dump check test for v

[gcc r16-676] RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 1

https://gcc.gnu.org/g:ee2dcc2236e28e8b86a9c953d4723364add61128 commit r16-676-gee2dcc2236e28e8b86a9c953d4723364add61128 Author: Pan Li Date: Sun May 11 16:31:16 2025 +0800 RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 1 Add asm dump check test for ve